2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
40 compatible = "arm,arm926ej-s";
45 asic: asic-interrupt-controller@68000000 {
46 compatible = "fsl,imx25-asic", "fsl,avic";
48 #interrupt-cells = <1>;
49 reg = <0x68000000 0x8000000>;
57 compatible = "fsl,imx-osc", "fixed-clock";
58 clock-frequency = <24000000>;
65 compatible = "simple-bus";
66 interrupt-parent = <&asic>;
69 aips@43f00000 { /* AIPS1 */
70 compatible = "fsl,aips-bus", "simple-bus";
73 reg = <0x43f00000 0x100000>;
79 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
80 reg = <0x43f80000 0x4000>;
90 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
91 reg = <0x43f84000 0x4000>;
99 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
100 reg = <0x43f88000 0x4000>;
102 clocks = <&clks 75>, <&clks 75>;
103 clock-names = "ipg", "per";
108 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
109 reg = <0x43f8c000 0x4000>;
111 clocks = <&clks 76>, <&clks 76>;
112 clock-names = "ipg", "per";
116 uart1: serial@43f90000 {
117 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
118 reg = <0x43f90000 0x4000>;
120 clocks = <&clks 120>, <&clks 57>;
121 clock-names = "ipg", "per";
125 uart2: serial@43f94000 {
126 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
127 reg = <0x43f94000 0x4000>;
129 clocks = <&clks 121>, <&clks 57>;
130 clock-names = "ipg", "per";
135 #address-cells = <1>;
137 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
138 reg = <0x43f98000 0x4000>;
146 #address-cells = <1>;
148 reg = <0x43f9c000 0x4000>;
155 spi1: cspi@43fa4000 {
156 #address-cells = <1>;
158 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
159 reg = <0x43fa4000 0x4000>;
160 clocks = <&clks 62>, <&clks 62>;
161 clock-names = "ipg", "per";
167 #address-cells = <1>;
169 reg = <0x43fa8000 0x4000>;
170 clocks = <&clks 102>;
177 compatible = "fsl,imx25-iomuxc";
178 reg = <0x43fac000 0x4000>;
182 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
183 reg = <0x43fb0000 0x4000>;
189 compatible = "fsl,spba-bus", "simple-bus";
190 #address-cells = <1>;
192 reg = <0x50000000 0x40000>;
195 spi3: cspi@50004000 {
196 #address-cells = <1>;
198 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
199 reg = <0x50004000 0x4000>;
201 clocks = <&clks 80>, <&clks 80>;
202 clock-names = "ipg", "per";
206 uart4: serial@50008000 {
207 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
208 reg = <0x50008000 0x4000>;
210 clocks = <&clks 123>, <&clks 57>;
211 clock-names = "ipg", "per";
215 uart3: serial@5000c000 {
216 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
217 reg = <0x5000c000 0x4000>;
219 clocks = <&clks 122>, <&clks 57>;
220 clock-names = "ipg", "per";
224 spi2: cspi@50010000 {
225 #address-cells = <1>;
227 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
228 reg = <0x50010000 0x4000>;
229 clocks = <&clks 79>, <&clks 79>;
230 clock-names = "ipg", "per";
236 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
237 reg = <0x50014000 0x4000>;
243 reg = <0x50018000 0x4000>;
247 uart5: serial@5002c000 {
248 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
249 reg = <0x5002c000 0x4000>;
251 clocks = <&clks 124>, <&clks 57>;
252 clock-names = "ipg", "per";
257 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
258 reg = <0x50030000 0x4000>;
260 clocks = <&clks 119>;
266 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
267 reg = <0x50034000 0x4000>;
272 fec: ethernet@50038000 {
273 compatible = "fsl,imx25-fec";
274 reg = <0x50038000 0x4000>;
276 clocks = <&clks 88>, <&clks 65>;
277 clock-names = "ipg", "ahb";
282 aips@53f00000 { /* AIPS2 */
283 compatible = "fsl,aips-bus", "simple-bus";
284 #address-cells = <1>;
286 reg = <0x53f00000 0x100000>;
290 compatible = "fsl,imx25-ccm";
291 reg = <0x53f80000 0x4000>;
296 gpt4: timer@53f84000 {
297 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
298 reg = <0x53f84000 0x4000>;
299 clocks = <&clks 9>, <&clks 45>;
300 clock-names = "ipg", "per";
304 gpt3: timer@53f88000 {
305 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
306 reg = <0x53f88000 0x4000>;
307 clocks = <&clks 9>, <&clks 47>;
308 clock-names = "ipg", "per";
312 gpt2: timer@53f8c000 {
313 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
314 reg = <0x53f8c000 0x4000>;
315 clocks = <&clks 9>, <&clks 47>;
316 clock-names = "ipg", "per";
320 gpt1: timer@53f90000 {
321 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
322 reg = <0x53f90000 0x4000>;
323 clocks = <&clks 9>, <&clks 47>;
324 clock-names = "ipg", "per";
328 epit1: timer@53f94000 {
329 compatible = "fsl,imx25-epit";
330 reg = <0x53f94000 0x4000>;
334 epit2: timer@53f98000 {
335 compatible = "fsl,imx25-epit";
336 reg = <0x53f98000 0x4000>;
340 gpio4: gpio@53f9c000 {
341 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
342 reg = <0x53f9c000 0x4000>;
346 interrupt-controller;
347 #interrupt-cells = <2>;
351 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
353 reg = <0x53fa0000 0x4000>;
354 clocks = <&clks 106>, <&clks 36>;
355 clock-names = "ipg", "per";
359 gpio3: gpio@53fa4000 {
360 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
361 reg = <0x53fa4000 0x4000>;
365 interrupt-controller;
366 #interrupt-cells = <2>;
370 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
372 reg = <0x53fa8000 0x4000>;
373 clocks = <&clks 107>, <&clks 36>;
374 clock-names = "ipg", "per";
378 esdhc1: esdhc@53fb4000 {
379 compatible = "fsl,imx25-esdhc";
380 reg = <0x53fb4000 0x4000>;
382 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
383 clock-names = "ipg", "ahb", "per";
387 esdhc2: esdhc@53fb8000 {
388 compatible = "fsl,imx25-esdhc";
389 reg = <0x53fb8000 0x4000>;
391 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
392 clock-names = "ipg", "ahb", "per";
396 lcdc: lcdc@53fbc000 {
397 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
398 reg = <0x53fbc000 0x4000>;
400 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
401 clock-names = "ipg", "ahb", "per";
406 reg = <0x53fc0000 0x4000>;
412 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
413 reg = <0x53fc8000 0x4000>;
414 clocks = <&clks 108>, <&clks 36>;
415 clock-names = "ipg", "per";
419 gpio1: gpio@53fcc000 {
420 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
421 reg = <0x53fcc000 0x4000>;
425 interrupt-controller;
426 #interrupt-cells = <2>;
429 gpio2: gpio@53fd0000 {
430 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
431 reg = <0x53fd0000 0x4000>;
435 interrupt-controller;
436 #interrupt-cells = <2>;
440 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
441 reg = <0x53fd4000 0x4000>;
442 clocks = <&clks 112>, <&clks 68>;
443 clock-names = "ipg", "ahb";
449 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
450 reg = <0x53fdc000 0x4000>;
451 clocks = <&clks 126>;
457 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
459 reg = <0x53fe0000 0x4000>;
460 clocks = <&clks 105>, <&clks 36>;
461 clock-names = "ipg", "per";
466 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
467 reg = <0x53ff0000 0x4000>;
473 compatible = "nop-usbphy";
478 compatible = "nop-usbphy";
482 usbotg: usb@53ff4000 {
483 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
484 reg = <0x53ff4000 0x0200>;
486 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
487 clock-names = "ipg", "ahb", "per";
488 fsl,usbmisc = <&usbmisc 0>;
492 usbhost1: usb@53ff4400 {
493 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
494 reg = <0x53ff4400 0x0200>;
496 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
497 clock-names = "ipg", "ahb", "per";
498 fsl,usbmisc = <&usbmisc 1>;
502 usbmisc: usbmisc@53ff4600 {
504 compatible = "fsl,imx25-usbmisc";
505 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
506 clock-names = "ipg", "ahb", "per";
507 reg = <0x53ff4600 0x00f>;
512 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
513 reg = <0x53ffc000 0x4000>;
521 compatible = "fsl,emi-bus", "simple-bus";
522 #address-cells = <1>;
524 reg = <0x80000000 0x3b002000>;
528 #address-cells = <1>;
531 compatible = "fsl,imx25-nand";
532 reg = <0xbb000000 0x2000>;