2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
13 #include "imx25-pinfunc.h"
41 compatible = "arm,arm926ej-s";
46 asic: asic-interrupt-controller@68000000 {
47 compatible = "fsl,imx25-asic", "fsl,avic";
49 #interrupt-cells = <1>;
50 reg = <0x68000000 0x8000000>;
58 compatible = "fsl,imx-osc", "fixed-clock";
60 clock-frequency = <24000000>;
67 compatible = "simple-bus";
68 interrupt-parent = <&asic>;
71 aips@43f00000 { /* AIPS1 */
72 compatible = "fsl,aips-bus", "simple-bus";
75 reg = <0x43f00000 0x100000>;
81 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
82 reg = <0x43f80000 0x4000>;
92 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
93 reg = <0x43f84000 0x4000>;
101 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
102 reg = <0x43f88000 0x4000>;
104 clocks = <&clks 75>, <&clks 75>;
105 clock-names = "ipg", "per";
110 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
111 reg = <0x43f8c000 0x4000>;
113 clocks = <&clks 76>, <&clks 76>;
114 clock-names = "ipg", "per";
118 uart1: serial@43f90000 {
119 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
120 reg = <0x43f90000 0x4000>;
122 clocks = <&clks 120>, <&clks 57>;
123 clock-names = "ipg", "per";
127 uart2: serial@43f94000 {
128 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
129 reg = <0x43f94000 0x4000>;
131 clocks = <&clks 121>, <&clks 57>;
132 clock-names = "ipg", "per";
137 #address-cells = <1>;
139 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
140 reg = <0x43f98000 0x4000>;
148 #address-cells = <1>;
150 reg = <0x43f9c000 0x4000>;
157 spi1: cspi@43fa4000 {
158 #address-cells = <1>;
160 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
161 reg = <0x43fa4000 0x4000>;
162 clocks = <&clks 62>, <&clks 62>;
163 clock-names = "ipg", "per";
169 #address-cells = <1>;
171 reg = <0x43fa8000 0x4000>;
172 clocks = <&clks 102>;
178 iomuxc: iomuxc@43fac000 {
179 compatible = "fsl,imx25-iomuxc";
180 reg = <0x43fac000 0x4000>;
183 audmux: audmux@43fb0000 {
184 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
185 reg = <0x43fb0000 0x4000>;
191 compatible = "fsl,spba-bus", "simple-bus";
192 #address-cells = <1>;
194 reg = <0x50000000 0x40000>;
197 spi3: cspi@50004000 {
198 #address-cells = <1>;
200 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
201 reg = <0x50004000 0x4000>;
203 clocks = <&clks 80>, <&clks 80>;
204 clock-names = "ipg", "per";
208 uart4: serial@50008000 {
209 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
210 reg = <0x50008000 0x4000>;
212 clocks = <&clks 123>, <&clks 57>;
213 clock-names = "ipg", "per";
217 uart3: serial@5000c000 {
218 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
219 reg = <0x5000c000 0x4000>;
221 clocks = <&clks 122>, <&clks 57>;
222 clock-names = "ipg", "per";
226 spi2: cspi@50010000 {
227 #address-cells = <1>;
229 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
230 reg = <0x50010000 0x4000>;
231 clocks = <&clks 79>, <&clks 79>;
232 clock-names = "ipg", "per";
238 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
239 reg = <0x50014000 0x4000>;
241 clocks = <&clks 118>;
243 dmas = <&sdma 24 1 0>,
245 dma-names = "rx", "tx";
250 reg = <0x50018000 0x4000>;
254 uart5: serial@5002c000 {
255 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
256 reg = <0x5002c000 0x4000>;
258 clocks = <&clks 124>, <&clks 57>;
259 clock-names = "ipg", "per";
264 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
265 reg = <0x50030000 0x4000>;
267 clocks = <&clks 119>;
273 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
274 reg = <0x50034000 0x4000>;
276 clocks = <&clks 117>;
278 dmas = <&sdma 28 1 0>,
280 dma-names = "rx", "tx";
284 fec: ethernet@50038000 {
285 compatible = "fsl,imx25-fec";
286 reg = <0x50038000 0x4000>;
288 clocks = <&clks 88>, <&clks 65>;
289 clock-names = "ipg", "ahb";
294 aips@53f00000 { /* AIPS2 */
295 compatible = "fsl,aips-bus", "simple-bus";
296 #address-cells = <1>;
298 reg = <0x53f00000 0x100000>;
302 compatible = "fsl,imx25-ccm";
303 reg = <0x53f80000 0x4000>;
308 gpt4: timer@53f84000 {
309 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
310 reg = <0x53f84000 0x4000>;
311 clocks = <&clks 9>, <&clks 45>;
312 clock-names = "ipg", "per";
316 gpt3: timer@53f88000 {
317 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
318 reg = <0x53f88000 0x4000>;
319 clocks = <&clks 9>, <&clks 47>;
320 clock-names = "ipg", "per";
324 gpt2: timer@53f8c000 {
325 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
326 reg = <0x53f8c000 0x4000>;
327 clocks = <&clks 9>, <&clks 47>;
328 clock-names = "ipg", "per";
332 gpt1: timer@53f90000 {
333 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
334 reg = <0x53f90000 0x4000>;
335 clocks = <&clks 9>, <&clks 47>;
336 clock-names = "ipg", "per";
340 epit1: timer@53f94000 {
341 compatible = "fsl,imx25-epit";
342 reg = <0x53f94000 0x4000>;
346 epit2: timer@53f98000 {
347 compatible = "fsl,imx25-epit";
348 reg = <0x53f98000 0x4000>;
352 gpio4: gpio@53f9c000 {
353 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
354 reg = <0x53f9c000 0x4000>;
358 interrupt-controller;
359 #interrupt-cells = <2>;
363 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
365 reg = <0x53fa0000 0x4000>;
366 clocks = <&clks 106>, <&clks 36>;
367 clock-names = "ipg", "per";
371 gpio3: gpio@53fa4000 {
372 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
373 reg = <0x53fa4000 0x4000>;
377 interrupt-controller;
378 #interrupt-cells = <2>;
382 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
384 reg = <0x53fa8000 0x4000>;
385 clocks = <&clks 107>, <&clks 36>;
386 clock-names = "ipg", "per";
390 esdhc1: esdhc@53fb4000 {
391 compatible = "fsl,imx25-esdhc";
392 reg = <0x53fb4000 0x4000>;
394 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
395 clock-names = "ipg", "ahb", "per";
399 esdhc2: esdhc@53fb8000 {
400 compatible = "fsl,imx25-esdhc";
401 reg = <0x53fb8000 0x4000>;
403 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
404 clock-names = "ipg", "ahb", "per";
408 lcdc: lcdc@53fbc000 {
409 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
410 reg = <0x53fbc000 0x4000>;
412 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
413 clock-names = "ipg", "ahb", "per";
418 reg = <0x53fc0000 0x4000>;
424 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
425 reg = <0x53fc8000 0x4000>;
426 clocks = <&clks 108>, <&clks 36>;
427 clock-names = "ipg", "per";
431 gpio1: gpio@53fcc000 {
432 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
433 reg = <0x53fcc000 0x4000>;
437 interrupt-controller;
438 #interrupt-cells = <2>;
441 gpio2: gpio@53fd0000 {
442 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
443 reg = <0x53fd0000 0x4000>;
447 interrupt-controller;
448 #interrupt-cells = <2>;
451 sdma: sdma@53fd4000 {
452 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
453 reg = <0x53fd4000 0x4000>;
454 clocks = <&clks 112>, <&clks 68>;
455 clock-names = "ipg", "ahb";
458 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
462 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
463 reg = <0x53fdc000 0x4000>;
464 clocks = <&clks 126>;
470 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
472 reg = <0x53fe0000 0x4000>;
473 clocks = <&clks 105>, <&clks 36>;
474 clock-names = "ipg", "per";
479 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
480 reg = <0x53ff0000 0x4000>;
486 compatible = "nop-usbphy";
491 compatible = "nop-usbphy";
495 usbotg: usb@53ff4000 {
496 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
497 reg = <0x53ff4000 0x0200>;
499 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
500 clock-names = "ipg", "ahb", "per";
501 fsl,usbmisc = <&usbmisc 0>;
505 usbhost1: usb@53ff4400 {
506 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
507 reg = <0x53ff4400 0x0200>;
509 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
510 clock-names = "ipg", "ahb", "per";
511 fsl,usbmisc = <&usbmisc 1>;
515 usbmisc: usbmisc@53ff4600 {
517 compatible = "fsl,imx25-usbmisc";
518 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
519 clock-names = "ipg", "ahb", "per";
520 reg = <0x53ff4600 0x00f>;
525 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
526 reg = <0x53ffc000 0x4000>;
534 compatible = "fsl,emi-bus", "simple-bus";
535 #address-cells = <1>;
537 reg = <0x80000000 0x3b002000>;
541 #address-cells = <1>;
544 compatible = "fsl,imx25-nand";
545 reg = <0xbb000000 0x2000>;