2 * Copyright 2012 Sascha Hauer, Pengutronix
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
13 #include "imx27-pinfunc.h"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
40 aitc: aitc-interrupt-controller@e0000000 {
41 compatible = "fsl,imx27-aitc", "fsl,avic";
43 #interrupt-cells = <1>;
44 reg = <0x10040000 0x1000>;
52 compatible = "fsl,imx-osc26m", "fixed-clock";
54 clock-frequency = <26000000>;
64 compatible = "arm,arm926ej-s";
70 clock-latency = <62500>;
72 voltage-tolerance = <5>;
79 compatible = "simple-bus";
80 interrupt-parent = <&aitc>;
83 aipi@10000000 { /* AIPI1 */
84 compatible = "fsl,aipi-bus", "simple-bus";
87 reg = <0x10000000 0x20000>;
91 compatible = "fsl,imx27-dma";
92 reg = <0x10001000 0x1000>;
94 clocks = <&clks 50>, <&clks 70>;
95 clock-names = "ipg", "ahb";
100 wdog: wdog@10002000 {
101 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
102 reg = <0x10002000 0x1000>;
107 gpt1: timer@10003000 {
108 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
109 reg = <0x10003000 0x1000>;
111 clocks = <&clks 46>, <&clks 61>;
112 clock-names = "ipg", "per";
115 gpt2: timer@10004000 {
116 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
117 reg = <0x10004000 0x1000>;
119 clocks = <&clks 45>, <&clks 61>;
120 clock-names = "ipg", "per";
123 gpt3: timer@10005000 {
124 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
125 reg = <0x10005000 0x1000>;
127 clocks = <&clks 44>, <&clks 61>;
128 clock-names = "ipg", "per";
133 compatible = "fsl,imx27-pwm";
134 reg = <0x10006000 0x1000>;
136 clocks = <&clks 34>, <&clks 61>;
137 clock-names = "ipg", "per";
141 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
142 reg = <0x10008000 0x1000>;
148 owire: owire@10009000 {
149 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
150 reg = <0x10009000 0x1000>;
155 uart1: serial@1000a000 {
156 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
157 reg = <0x1000a000 0x1000>;
159 clocks = <&clks 81>, <&clks 61>;
160 clock-names = "ipg", "per";
164 uart2: serial@1000b000 {
165 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
166 reg = <0x1000b000 0x1000>;
168 clocks = <&clks 80>, <&clks 61>;
169 clock-names = "ipg", "per";
173 uart3: serial@1000c000 {
174 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
175 reg = <0x1000c000 0x1000>;
177 clocks = <&clks 79>, <&clks 61>;
178 clock-names = "ipg", "per";
182 uart4: serial@1000d000 {
183 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
184 reg = <0x1000d000 0x1000>;
186 clocks = <&clks 78>, <&clks 61>;
187 clock-names = "ipg", "per";
191 cspi1: cspi@1000e000 {
192 #address-cells = <1>;
194 compatible = "fsl,imx27-cspi";
195 reg = <0x1000e000 0x1000>;
197 clocks = <&clks 53>, <&clks 60>;
198 clock-names = "ipg", "per";
202 cspi2: cspi@1000f000 {
203 #address-cells = <1>;
205 compatible = "fsl,imx27-cspi";
206 reg = <0x1000f000 0x1000>;
208 clocks = <&clks 52>, <&clks 60>;
209 clock-names = "ipg", "per";
214 #sound-dai-cells = <0>;
215 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
216 reg = <0x10010000 0x1000>;
219 dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
220 dma-names = "rx0", "tx0", "rx1", "tx1";
221 fsl,fifo-depth = <8>;
226 #sound-dai-cells = <0>;
227 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
228 reg = <0x10011000 0x1000>;
231 dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
232 dma-names = "rx0", "tx0", "rx1", "tx1";
233 fsl,fifo-depth = <8>;
238 #address-cells = <1>;
240 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
241 reg = <0x10012000 0x1000>;
247 sdhci1: sdhci@10013000 {
248 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
249 reg = <0x10013000 0x1000>;
251 clocks = <&clks 30>, <&clks 60>;
252 clock-names = "ipg", "per";
258 sdhci2: sdhci@10014000 {
259 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
260 reg = <0x10014000 0x1000>;
262 clocks = <&clks 29>, <&clks 60>;
263 clock-names = "ipg", "per";
269 iomuxc: iomuxc@10015000 {
270 compatible = "fsl,imx27-iomuxc";
271 reg = <0x10015000 0x600>;
272 #address-cells = <1>;
276 gpio1: gpio@10015000 {
277 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
278 reg = <0x10015000 0x100>;
282 interrupt-controller;
283 #interrupt-cells = <2>;
286 gpio2: gpio@10015100 {
287 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
288 reg = <0x10015100 0x100>;
292 interrupt-controller;
293 #interrupt-cells = <2>;
296 gpio3: gpio@10015200 {
297 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
298 reg = <0x10015200 0x100>;
302 interrupt-controller;
303 #interrupt-cells = <2>;
306 gpio4: gpio@10015300 {
307 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
308 reg = <0x10015300 0x100>;
312 interrupt-controller;
313 #interrupt-cells = <2>;
316 gpio5: gpio@10015400 {
317 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
318 reg = <0x10015400 0x100>;
322 interrupt-controller;
323 #interrupt-cells = <2>;
326 gpio6: gpio@10015500 {
327 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
328 reg = <0x10015500 0x100>;
332 interrupt-controller;
333 #interrupt-cells = <2>;
337 audmux: audmux@10016000 {
338 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
339 reg = <0x10016000 0x1000>;
341 clock-names = "audmux";
345 cspi3: cspi@10017000 {
346 #address-cells = <1>;
348 compatible = "fsl,imx27-cspi";
349 reg = <0x10017000 0x1000>;
351 clocks = <&clks 51>, <&clks 60>;
352 clock-names = "ipg", "per";
356 gpt4: timer@10019000 {
357 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
358 reg = <0x10019000 0x1000>;
360 clocks = <&clks 43>, <&clks 61>;
361 clock-names = "ipg", "per";
364 gpt5: timer@1001a000 {
365 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
366 reg = <0x1001a000 0x1000>;
368 clocks = <&clks 42>, <&clks 61>;
369 clock-names = "ipg", "per";
372 uart5: serial@1001b000 {
373 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
374 reg = <0x1001b000 0x1000>;
376 clocks = <&clks 77>, <&clks 61>;
377 clock-names = "ipg", "per";
381 uart6: serial@1001c000 {
382 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
383 reg = <0x1001c000 0x1000>;
385 clocks = <&clks 78>, <&clks 61>;
386 clock-names = "ipg", "per";
391 #address-cells = <1>;
393 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
394 reg = <0x1001d000 0x1000>;
400 sdhci3: sdhci@1001e000 {
401 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
402 reg = <0x1001e000 0x1000>;
404 clocks = <&clks 28>, <&clks 60>;
405 clock-names = "ipg", "per";
411 gpt6: timer@1001f000 {
412 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
413 reg = <0x1001f000 0x1000>;
415 clocks = <&clks 41>, <&clks 61>;
416 clock-names = "ipg", "per";
420 aipi@10020000 { /* AIPI2 */
421 compatible = "fsl,aipi-bus", "simple-bus";
422 #address-cells = <1>;
424 reg = <0x10020000 0x20000>;
428 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
430 reg = <0x10021000 0x1000>;
431 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
432 clock-names = "ipg", "ahb", "per";
436 coda: coda@10023000 {
437 compatible = "fsl,imx27-vpu";
438 reg = <0x10023000 0x0200>;
440 clocks = <&clks 57>, <&clks 66>;
441 clock-names = "per", "ahb";
445 usbotg: usb@10024000 {
446 compatible = "fsl,imx27-usb";
447 reg = <0x10024000 0x200>;
450 fsl,usbmisc = <&usbmisc 0>;
454 usbh1: usb@10024200 {
455 compatible = "fsl,imx27-usb";
456 reg = <0x10024200 0x200>;
459 fsl,usbmisc = <&usbmisc 1>;
463 usbh2: usb@10024400 {
464 compatible = "fsl,imx27-usb";
465 reg = <0x10024400 0x200>;
468 fsl,usbmisc = <&usbmisc 2>;
472 usbmisc: usbmisc@10024600 {
474 compatible = "fsl,imx27-usbmisc";
475 reg = <0x10024600 0x200>;
479 sahara2: sahara@10025000 {
480 compatible = "fsl,imx27-sahara";
481 reg = <0x10025000 0x1000>;
483 clocks = <&clks 32>, <&clks 64>;
484 clock-names = "ipg", "ahb";
488 compatible = "fsl,imx27-ccm";
489 reg = <0x10027000 0x1000>;
494 compatible = "fsl,imx27-iim";
495 reg = <0x10028000 0x1000>;
500 fec: ethernet@1002b000 {
501 compatible = "fsl,imx27-fec";
502 reg = <0x1002b000 0x4000>;
504 clocks = <&clks 48>, <&clks 67>;
505 clock-names = "ipg", "ahb";
511 #address-cells = <1>;
513 compatible = "fsl,imx27-nand";
514 reg = <0xd8000000 0x1000>;
520 weim: weim@d8002000 {
521 #address-cells = <2>;
523 compatible = "fsl,imx27-weim";
524 reg = <0xd8002000 0x1000>;
527 0 0 0xc0000000 0x08000000
528 1 0 0xc8000000 0x08000000
529 2 0 0xd0000000 0x02000000
530 3 0 0xd2000000 0x02000000
531 4 0 0xd4000000 0x02000000
532 5 0 0xd6000000 0x02000000
537 iram: iram@ffff4c00 {
538 compatible = "mmio-sram";
539 reg = <0xffff4c00 0xb400>;