2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
16 model = "DENX M53EVK";
17 compatible = "denx,imx53-m53evk", "fsl,imx53";
20 reg = <0x70000000 0x20000000>,
21 <0xb0000000 0x20000000>;
25 display1: display@di1 {
26 compatible = "fsl,imx-parallel-display";
27 interface-pix-fmt = "bgr666";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp1>;
34 clock-frequency = <31500000>;
49 display1_in: endpoint {
50 remote-endpoint = <&ipu_di1_disp1>;
56 compatible = "pwm-backlight";
57 pwms = <&pwm1 0 3000>;
58 brightness-levels = <0 4 8 16 32 64 128 255>;
59 default-brightness-level = <6>;
60 power-supply = <®_backlight>;
64 compatible = "gpio-leds";
65 pinctrl-names = "default";
66 pinctrl-0 = <&led_pin_gpio>;
71 linux,default-trigger = "heartbeat";
77 linux,default-trigger = "heartbeat";
82 compatible = "simple-bus";
86 reg_3p2v: regulator@0 {
87 compatible = "regulator-fixed";
89 regulator-name = "3P2V";
90 regulator-min-microvolt = <3200000>;
91 regulator-max-microvolt = <3200000>;
96 reg_backlight: regulator@1 {
97 compatible = "regulator-fixed";
99 regulator-name = "lcd-supply";
100 regulator-min-microvolt = <3200000>;
101 regulator-max-microvolt = <3200000>;
105 reg_usbh1_vbus: regulator@3 {
106 compatible = "regulator-fixed";
108 regulator-name = "vbus";
109 regulator-min-microvolt = <5000000>;
110 regulator-max-microvolt = <5000000>;
116 compatible = "fsl,imx53-m53evk-sgtl5000",
117 "fsl,imx-audio-sgtl5000";
118 model = "imx53-m53evk-sgtl5000";
119 ssi-controller = <&ssi2>;
120 audio-codec = <&sgtl5000>;
122 "MIC_IN", "Mic Jack",
123 "Mic Jack", "Mic Bias",
124 "LINE_IN", "Line In Jack",
125 "Headphone Jack", "HP_OUT",
126 "Ext Spk", "LINE_OUT";
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_audmux>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_can1>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_can2>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_esdhc1>;
153 cd-gpios = <&gpio1 1 0>;
154 wp-gpios = <&gpio1 9 0>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_fec>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_i2c1>;
171 compatible = "fsl,sgtl5000";
173 VDDA-supply = <®_3p2v>;
174 VDDIO-supply = <®_3p2v>;
175 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_i2c2>;
182 clock-frequency = <400000>;
186 compatible = "st,stmpe610";
187 #address-cells = <1>;
192 interrupts = <6 0x0>;
193 interrupt-parent = <&gpio7>;
197 compatible = "st,stmpe-ts";
199 st,sample-time = <4>;
204 st,touch-det-delay = <3>;
212 compatible = "atmel,24c128";
218 compatible = "stm,m41t62";
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_i2c3>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_hog>;
234 pinctrl_hog: hoggrp {
236 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
237 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
238 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
239 MX53_PAD_GPIO_2__GPIO1_2 0x80000000
240 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000
244 led_pin_gpio: led_gpio@0 {
246 MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000
247 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000
251 pinctrl_audmux: audmuxgrp {
253 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000
254 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000
255 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000
256 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000
260 pinctrl_can1: can1grp {
262 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
263 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
267 pinctrl_can2: can2grp {
269 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
270 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
274 pinctrl_esdhc1: esdhc1grp {
276 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
277 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
278 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
279 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
280 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
281 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
285 pinctrl_fec: fecgrp {
287 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
288 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
289 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
290 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
291 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
292 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
293 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
294 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
295 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
296 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
300 pinctrl_i2c1: i2c1grp {
302 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
303 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
307 pinctrl_i2c2: i2c2grp {
309 MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000
310 MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000
314 pinctrl_i2c3: i2c3grp {
316 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
317 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
321 pinctrl_ipu_disp1: ipudisp1grp {
323 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5
324 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5
325 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5
326 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5
327 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5
328 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5
329 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5
330 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5
331 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5
332 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5
333 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5
334 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5
335 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5
336 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5
337 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5
338 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5
339 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5
340 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5
341 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5
342 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5
343 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5
344 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5
345 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5
346 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5
347 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5
348 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5
349 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5
350 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5
351 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5
352 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5
353 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5
354 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5
358 pinctrl_nand: nandgrp {
360 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
361 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
362 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
363 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
364 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
365 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
366 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
367 MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4
368 MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4
369 MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4
370 MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4
371 MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4
372 MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4
373 MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4
374 MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4
378 pinctrl_pwm1: pwm1grp {
380 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5
384 pinctrl_uart1: uart1grp {
386 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
387 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
391 pinctrl_uart2: uart2grp {
393 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
394 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
398 pinctrl_uart3: uart3grp {
400 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
401 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
402 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
403 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
410 remote-endpoint = <&display1_in>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_nand>;
416 nand-bus-width = <8>;
417 nand-ecc-mode = "hw";
422 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_pwm1>;
432 fsl,mode = "i2s-slave";
437 pinctrl-names = "default";
438 pinctrl-0 = <&pinctrl_uart1>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&pinctrl_uart2>;
449 pinctrl-names = "default";
450 pinctrl-0 = <&pinctrl_uart3>;
455 vbus-supply = <®_usbh1_vbus>;
461 dr_mode = "peripheral";