2 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
14 #include "imx53-tqma53.dtsi"
17 model = "TQ MBa53 starter kit";
18 compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
20 reg_backlight: fixed@0 {
21 compatible = "regulator-fixed";
22 regulator-name = "lcd-supply";
24 startup-delay-us = <5000>;
29 compatible = "pwm-backlight";
30 pwms = <&pwm2 0 50000 0 0>;
31 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
32 default-brightness-level = <10>;
33 enable-gpios = <&gpio7 7 0>;
34 power-supply = <®_backlight>;
37 disp1: display@disp1 {
38 compatible = "fsl,imx-parallel-display";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_disp1_1>;
42 interface-pix-fmt = "rgb24";
47 compatible = "regulator-fixed";
48 regulator-name = "3P2V";
49 regulator-min-microvolt = <3200000>;
50 regulator-max-microvolt = <3200000>;
55 compatible = "tq,imx53-mba53-sgtl5000",
56 "fsl,imx-audio-sgtl5000";
57 model = "imx53-mba53-sgtl5000";
58 ssi-controller = <&ssi2>;
59 audio-codec = <&codec>;
62 "Mic Jack", "Mic Bias",
63 "Headphone Jack", "HP_OUT";
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_lvds1_1>;
77 pinctrl_lvds1_1: lvds1-grp1 {
79 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
80 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
81 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
82 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
83 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
87 pinctrl_lvds1_2: lvds1-grp2 {
89 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000
90 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000
91 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000
92 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000
93 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
99 pinctrl_disp1_1: disp1-grp1 {
101 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */
102 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x80000000 /* DISP1_DRDY */
103 MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x80000000 /* DISP1_HSYNC */
104 MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x80000000 /* DISP1_VSYNC */
105 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000
106 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000
107 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000
108 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000
109 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000
110 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000
111 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000
112 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000
113 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000
114 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000
115 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000
116 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000
117 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000
118 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000
119 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x80000000
120 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x80000000
121 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x80000000
122 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x80000000
123 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x80000000
124 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x80000000
125 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x80000000
126 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x80000000
127 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x80000000
128 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x80000000
134 pinctrl_vga_sync_1: vgasync-grp1 {
136 /* VGA_VSYNC, HSYNC with max drive strength */
137 MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6
138 MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_audmux_1>;
156 compatible = "fsl,sgtl5000";
158 clocks = <&clks 150>;
159 VDDA-supply = <®_3p2v>;
160 VDDIO-supply = <®_3p2v>;
163 expander: pca9554@20 {
164 compatible = "pca9554";
178 phy-reset-gpios = <&gpio7 6 0>;
208 fsl,mode = "i2s-slave";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_vga_sync_1>;
232 fsl,tve-mode = "vga";