3 * Copyright 2013 Freescale Semiconductor, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "imx6dl-pinfunc.h"
13 #include "imx6qdl.dtsi"
21 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
31 fsl,soc-operating-points = <
32 /* ARM kHz SOC-PU uV */
37 clock-latency = <61036>; /* two CLK32 periods */
38 clocks = <&clks IMX6QDL_CLK_ARM>,
39 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
40 <&clks IMX6QDL_CLK_STEP>,
41 <&clks IMX6QDL_CLK_PLL1_SW>,
42 <&clks IMX6QDL_CLK_PLL1_SYS>;
43 clock-names = "arm", "pll2_pfd2_396m", "step",
44 "pll1_sw", "pll1_sys";
45 arm-supply = <®_arm>;
46 pu-supply = <®_pu>;
47 soc-supply = <®_soc>;
51 compatible = "arm,cortex-a9";
54 next-level-cache = <&L2>;
59 ocram: sram@00900000 {
60 compatible = "mmio-sram";
61 reg = <0x00900000 0x20000>;
62 clocks = <&clks IMX6QDL_CLK_OCRAM>;
65 aips1: aips-bus@02000000 {
66 iomuxc: iomuxc@020e0000 {
67 compatible = "fsl,imx6dl-iomuxc";
71 reg = <0x020f0000 0x4000>;
72 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
76 reg = <0x020f4000 0x4000>;
77 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
80 lcdif: lcdif@020f8000 {
81 reg = <0x020f8000 0x4000>;
82 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
86 aips2: aips-bus@02100000 {
90 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
91 reg = <0x021f8000 0x4000>;
92 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
93 clocks = <&clks IMX6DL_CLK_I2C4>;
100 compatible = "fsl,imx-display-subsystem";
101 ports = <&ipu1_di0>, <&ipu1_di1>;
106 compatible = "fsl,imx6dl-hdmi";
110 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
111 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
112 <&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI1>;
113 clock-names = "di0_pll", "di1_pll",
114 "di0_sel", "di1_sel",