arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 / {
  14         memory {
  15                 reg = <0x10000000 0x40000000>;
  16         };
  17
  18         regulators {
  19                 compatible = "simple-bus";
  20
  21                 reg_usb_otg_vbus: usb_otg_vbus {
  22                         compatible = "regulator-fixed";
  23                         regulator-name = "usb_otg_vbus";
  24                         regulator-min-microvolt = <5000000>;
  25                         regulator-max-microvolt = <5000000>;
  26                         gpio = <&gpio3 22 0>;
  27                         enable-active-high;
  28                 };
  29
  30                 reg_audio: wm8962_supply {
  31                         compatible = "regulator-fixed";
  32                         regulator-name = "wm8962-supply";
  33                         gpio = <&gpio4 10 0>;
  34                         enable-active-high;
  35                 };
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 volume-up {
  42                         label = "Volume Up";
  43                         gpios = <&gpio1 4 0>;
  44                         linux,code = <115>; /* KEY_VOLUMEUP */
  45                 };
  46
  47                 volume-down {
  48                         label = "Volume Down";
  49                         gpios = <&gpio1 5 0>;
  50                         linux,code = <114>; /* KEY_VOLUMEDOWN */
  51                 };
  52         };
  53
  54         sound {
  55                 compatible = "fsl,imx6q-sabresd-wm8962",
  56                            "fsl,imx-audio-wm8962";
  57                 model = "wm8962-audio";
  58                 ssi-controller = <&ssi2>;
  59                 audio-codec = <&codec>;
  60                 audio-routing =
  61                         "Headphone Jack", "HPOUTL",
  62                         "Headphone Jack", "HPOUTR",
  63                         "Ext Spk", "SPKOUTL",
  64                         "Ext Spk", "SPKOUTR",
  65                         "MICBIAS", "AMIC",
  66                         "IN3R", "MICBIAS",
  67                         "DMIC", "MICBIAS",
  68                         "DMICDAT", "DMIC";
  69                 mux-int-port = <2>;
  70                 mux-ext-port = <3>;
  71         };
  72 };
  73
  74 &audmux {
  75         pinctrl-names = "default";
  76         pinctrl-0 = <&pinctrl_audmux_2>;
  77         status = "okay";
  78 };
  79
  80 &ecspi1 {
  81         fsl,spi-num-chipselects = <1>;
  82         cs-gpios = <&gpio4 9 0>;
  83         pinctrl-names = "default";
  84         pinctrl-0 = <&pinctrl_ecspi1_2>;
  85         status = "okay";
  86
  87         flash: m25p80@0 {
  88                 #address-cells = <1>;
  89                 #size-cells = <1>;
  90                 compatible = "st,m25p32";
  91                 spi-max-frequency = <20000000>;
  92                 reg = <0>;
  93         };
  94 };
  95
  96 &fec {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&pinctrl_enet_1>;
  99         phy-mode = "rgmii";
 100         status = "okay";
 101 };
 102
 103 &i2c1 {
 104         clock-frequency = <100000>;
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&pinctrl_i2c1_2>;
 107         status = "okay";
 108
 109         codec: wm8962@1a {
 110                 compatible = "wlf,wm8962";
 111                 reg = <0x1a>;
 112                 clocks = <&clks 169>;
 113                 DCVDD-supply = <&reg_audio>;
 114                 DBVDD-supply = <&reg_audio>;
 115                 AVDD-supply = <&reg_audio>;
 116                 CPVDD-supply = <&reg_audio>;
 117                 MICVDD-supply = <&reg_audio>;
 118                 PLLVDD-supply = <&reg_audio>;
 119                 SPKVDD1-supply = <&reg_audio>;
 120                 SPKVDD2-supply = <&reg_audio>;
 121                 gpio-cfg = <
 122                         0x0000 /* 0:Default */
 123                         0x0000 /* 1:Default */
 124                         0x0013 /* 2:FN_DMICCLK */
 125                         0x0000 /* 3:Default */
 126                         0x8014 /* 4:FN_DMICCDAT */
 127                         0x0000 /* 5:Default */
 128                 >;
 129        };
 130 };
 131
 132 &iomuxc {
 133         pinctrl-names = "default";
 134         pinctrl-0 = <&pinctrl_hog>;
 135
 136         hog {
 137                 pinctrl_hog: hoggrp {
 138                         fsl,pins = <
 139                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04   0x80000000
 140                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05   0x80000000
 141                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
 142                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 143                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 144                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
 145                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 146                         >;
 147                 };
 148         };
 149 };
 150
 151 &ldb {
 152         status = "okay";
 153
 154         lvds-channel@1 {
 155                 fsl,data-mapping = "spwg";
 156                 fsl,data-width = <18>;
 157                 status = "okay";
 158
 159                 display-timings {
 160                         native-mode = <&timing0>;
 161                         timing0: hsd100pxn1 {
 162                                 clock-frequency = <65000000>;
 163                                 hactive = <1024>;
 164                                 vactive = <768>;
 165                                 hback-porch = <220>;
 166                                 hfront-porch = <40>;
 167                                 vback-porch = <21>;
 168                                 vfront-porch = <7>;
 169                                 hsync-len = <60>;
 170                                 vsync-len = <10>;
 171                         };
 172                 };
 173         };
 174 };
 175
 176 &ssi2 {
 177         fsl,mode = "i2s-slave";
 178         status = "okay";
 179 };
 180
 181 &uart1 {
 182         pinctrl-names = "default";
 183         pinctrl-0 = <&pinctrl_uart1_1>;
 184         status = "okay";
 185 };
 186
 187 &usbh1 {
 188         status = "okay";
 189 };
 190
 191 &usbotg {
 192         vbus-supply = <&reg_usb_otg_vbus>;
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&pinctrl_usbotg_2>;
 195         disable-over-current;
 196         status = "okay";
 197 };
 198
 199 &usdhc2 {
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&pinctrl_usdhc2_1>;
 202         cd-gpios = <&gpio2 2 0>;
 203         wp-gpios = <&gpio2 3 0>;
 204         status = "okay";
 205 };
 206
 207 &usdhc3 {
 208         pinctrl-names = "default";
 209         pinctrl-0 = <&pinctrl_usdhc3_1>;
 210         cd-gpios = <&gpio2 0 0>;
 211         wp-gpios = <&gpio2 1 0>;
 212         status = "okay";
 213 };