2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include "skeleton.dtsi"
46 intc: interrupt-controller@00a01000 {
47 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
52 reg = <0x00a01000 0x1000>,
61 compatible = "fsl,imx-ckil", "fixed-clock";
62 clock-frequency = <32768>;
66 compatible = "fsl,imx-ckih1", "fixed-clock";
67 clock-frequency = <0>;
71 compatible = "fsl,imx-osc", "fixed-clock";
72 clock-frequency = <24000000>;
79 compatible = "simple-bus";
80 interrupt-parent = <&intc>;
83 dma_apbh: dma-apbh@00110000 {
84 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
85 reg = <0x00110000 0x2000>;
86 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
87 <0 13 IRQ_TYPE_LEVEL_HIGH>,
88 <0 13 IRQ_TYPE_LEVEL_HIGH>,
89 <0 13 IRQ_TYPE_LEVEL_HIGH>;
90 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
96 gpmi: gpmi-nand@00112000 {
97 compatible = "fsl,imx6q-gpmi-nand";
100 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
101 reg-names = "gpmi-nand", "bch";
102 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
103 interrupt-names = "bch";
104 clocks = <&clks 152>, <&clks 153>, <&clks 151>,
105 <&clks 150>, <&clks 149>;
106 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
107 "gpmi_bch_apb", "per1_bch";
108 dmas = <&dma_apbh 0>;
114 compatible = "arm,cortex-a9-twd-timer";
115 reg = <0x00a00600 0x20>;
116 interrupts = <1 13 0xf01>;
120 L2: l2-cache@00a02000 {
121 compatible = "arm,pl310-cache";
122 reg = <0x00a02000 0x1000>;
123 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
126 arm,tag-latency = <4 2 3>;
127 arm,data-latency = <4 2 3>;
130 pcie: pcie@0x01000000 {
131 compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
132 reg = <0x01ffc000 0x4000>; /* DBI */
133 #address-cells = <3>;
136 ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
137 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
138 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
140 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
141 clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
142 clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
147 compatible = "arm,cortex-a9-pmu";
148 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
151 aips-bus@02000000 { /* AIPS1 */
152 compatible = "fsl,aips-bus", "simple-bus";
153 #address-cells = <1>;
155 reg = <0x02000000 0x100000>;
159 compatible = "fsl,spba-bus", "simple-bus";
160 #address-cells = <1>;
162 reg = <0x02000000 0x40000>;
165 spdif: spdif@02004000 {
166 compatible = "fsl,imx35-spdif";
167 reg = <0x02004000 0x4000>;
168 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
169 dmas = <&sdma 14 18 0>,
171 dma-names = "rx", "tx";
172 clocks = <&clks 197>, <&clks 3>,
173 <&clks 197>, <&clks 107>,
174 <&clks 0>, <&clks 118>,
175 <&clks 0>, <&clks 139>,
177 clock-names = "core", "rxtx0",
185 ecspi1: ecspi@02008000 {
186 #address-cells = <1>;
188 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
189 reg = <0x02008000 0x4000>;
190 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
191 clocks = <&clks 112>, <&clks 112>;
192 clock-names = "ipg", "per";
193 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
194 dma-names = "rx", "tx";
198 ecspi2: ecspi@0200c000 {
199 #address-cells = <1>;
201 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
202 reg = <0x0200c000 0x4000>;
203 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
204 clocks = <&clks 113>, <&clks 113>;
205 clock-names = "ipg", "per";
206 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
207 dma-names = "rx", "tx";
211 ecspi3: ecspi@02010000 {
212 #address-cells = <1>;
214 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
215 reg = <0x02010000 0x4000>;
216 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
217 clocks = <&clks 114>, <&clks 114>;
218 clock-names = "ipg", "per";
219 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
220 dma-names = "rx", "tx";
224 ecspi4: ecspi@02014000 {
225 #address-cells = <1>;
227 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
228 reg = <0x02014000 0x4000>;
229 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
230 clocks = <&clks 115>, <&clks 115>;
231 clock-names = "ipg", "per";
232 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
233 dma-names = "rx", "tx";
237 uart1: serial@02020000 {
238 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
239 reg = <0x02020000 0x4000>;
240 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&clks 160>, <&clks 161>;
242 clock-names = "ipg", "per";
243 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
244 dma-names = "rx", "tx";
248 esai: esai@02024000 {
249 reg = <0x02024000 0x4000>;
250 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
254 compatible = "fsl,imx6q-ssi",
257 reg = <0x02028000 0x4000>;
258 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
259 clocks = <&clks 178>;
260 dmas = <&sdma 37 1 0>,
262 dma-names = "rx", "tx";
263 fsl,fifo-depth = <15>;
264 fsl,ssi-dma-events = <38 37>;
269 compatible = "fsl,imx6q-ssi",
272 reg = <0x0202c000 0x4000>;
273 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
274 clocks = <&clks 179>;
275 dmas = <&sdma 41 1 0>,
277 dma-names = "rx", "tx";
278 fsl,fifo-depth = <15>;
279 fsl,ssi-dma-events = <42 41>;
284 compatible = "fsl,imx6q-ssi",
287 reg = <0x02030000 0x4000>;
288 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
289 clocks = <&clks 180>;
290 dmas = <&sdma 45 1 0>,
292 dma-names = "rx", "tx";
293 fsl,fifo-depth = <15>;
294 fsl,ssi-dma-events = <46 45>;
298 asrc: asrc@02034000 {
299 reg = <0x02034000 0x4000>;
300 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
304 reg = <0x0203c000 0x4000>;
309 reg = <0x02040000 0x3c000>;
310 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
311 <0 12 IRQ_TYPE_LEVEL_HIGH>;
314 aipstz@0207c000 { /* AIPSTZ1 */
315 reg = <0x0207c000 0x4000>;
320 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
321 reg = <0x02080000 0x4000>;
322 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
323 clocks = <&clks 62>, <&clks 145>;
324 clock-names = "ipg", "per";
329 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
330 reg = <0x02084000 0x4000>;
331 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
332 clocks = <&clks 62>, <&clks 146>;
333 clock-names = "ipg", "per";
338 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
339 reg = <0x02088000 0x4000>;
340 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
341 clocks = <&clks 62>, <&clks 147>;
342 clock-names = "ipg", "per";
347 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
348 reg = <0x0208c000 0x4000>;
349 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&clks 62>, <&clks 148>;
351 clock-names = "ipg", "per";
354 can1: flexcan@02090000 {
355 compatible = "fsl,imx6q-flexcan";
356 reg = <0x02090000 0x4000>;
357 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
358 clocks = <&clks 108>, <&clks 109>;
359 clock-names = "ipg", "per";
363 can2: flexcan@02094000 {
364 compatible = "fsl,imx6q-flexcan";
365 reg = <0x02094000 0x4000>;
366 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
367 clocks = <&clks 110>, <&clks 111>;
368 clock-names = "ipg", "per";
373 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
374 reg = <0x02098000 0x4000>;
375 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
376 clocks = <&clks 119>, <&clks 120>;
377 clock-names = "ipg", "per";
380 gpio1: gpio@0209c000 {
381 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
382 reg = <0x0209c000 0x4000>;
383 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
384 <0 67 IRQ_TYPE_LEVEL_HIGH>;
387 interrupt-controller;
388 #interrupt-cells = <2>;
391 gpio2: gpio@020a0000 {
392 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
393 reg = <0x020a0000 0x4000>;
394 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
395 <0 69 IRQ_TYPE_LEVEL_HIGH>;
398 interrupt-controller;
399 #interrupt-cells = <2>;
402 gpio3: gpio@020a4000 {
403 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
404 reg = <0x020a4000 0x4000>;
405 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
406 <0 71 IRQ_TYPE_LEVEL_HIGH>;
409 interrupt-controller;
410 #interrupt-cells = <2>;
413 gpio4: gpio@020a8000 {
414 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
415 reg = <0x020a8000 0x4000>;
416 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
417 <0 73 IRQ_TYPE_LEVEL_HIGH>;
420 interrupt-controller;
421 #interrupt-cells = <2>;
424 gpio5: gpio@020ac000 {
425 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
426 reg = <0x020ac000 0x4000>;
427 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
428 <0 75 IRQ_TYPE_LEVEL_HIGH>;
431 interrupt-controller;
432 #interrupt-cells = <2>;
435 gpio6: gpio@020b0000 {
436 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
437 reg = <0x020b0000 0x4000>;
438 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
439 <0 77 IRQ_TYPE_LEVEL_HIGH>;
442 interrupt-controller;
443 #interrupt-cells = <2>;
446 gpio7: gpio@020b4000 {
447 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
448 reg = <0x020b4000 0x4000>;
449 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
450 <0 79 IRQ_TYPE_LEVEL_HIGH>;
453 interrupt-controller;
454 #interrupt-cells = <2>;
458 reg = <0x020b8000 0x4000>;
459 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
462 wdog1: wdog@020bc000 {
463 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
464 reg = <0x020bc000 0x4000>;
465 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
469 wdog2: wdog@020c0000 {
470 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
471 reg = <0x020c0000 0x4000>;
472 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
478 compatible = "fsl,imx6q-ccm";
479 reg = <0x020c4000 0x4000>;
480 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
481 <0 88 IRQ_TYPE_LEVEL_HIGH>;
485 anatop: anatop@020c8000 {
486 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
487 reg = <0x020c8000 0x1000>;
488 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
489 <0 54 IRQ_TYPE_LEVEL_HIGH>,
490 <0 127 IRQ_TYPE_LEVEL_HIGH>;
493 compatible = "fsl,anatop-regulator";
494 regulator-name = "vdd1p1";
495 regulator-min-microvolt = <800000>;
496 regulator-max-microvolt = <1375000>;
498 anatop-reg-offset = <0x110>;
499 anatop-vol-bit-shift = <8>;
500 anatop-vol-bit-width = <5>;
501 anatop-min-bit-val = <4>;
502 anatop-min-voltage = <800000>;
503 anatop-max-voltage = <1375000>;
507 compatible = "fsl,anatop-regulator";
508 regulator-name = "vdd3p0";
509 regulator-min-microvolt = <2800000>;
510 regulator-max-microvolt = <3150000>;
512 anatop-reg-offset = <0x120>;
513 anatop-vol-bit-shift = <8>;
514 anatop-vol-bit-width = <5>;
515 anatop-min-bit-val = <0>;
516 anatop-min-voltage = <2625000>;
517 anatop-max-voltage = <3400000>;
521 compatible = "fsl,anatop-regulator";
522 regulator-name = "vdd2p5";
523 regulator-min-microvolt = <2000000>;
524 regulator-max-microvolt = <2750000>;
526 anatop-reg-offset = <0x130>;
527 anatop-vol-bit-shift = <8>;
528 anatop-vol-bit-width = <5>;
529 anatop-min-bit-val = <0>;
530 anatop-min-voltage = <2000000>;
531 anatop-max-voltage = <2750000>;
534 reg_arm: regulator-vddcore@140 {
535 compatible = "fsl,anatop-regulator";
536 regulator-name = "vddarm";
537 regulator-min-microvolt = <725000>;
538 regulator-max-microvolt = <1450000>;
540 anatop-reg-offset = <0x140>;
541 anatop-vol-bit-shift = <0>;
542 anatop-vol-bit-width = <5>;
543 anatop-delay-reg-offset = <0x170>;
544 anatop-delay-bit-shift = <24>;
545 anatop-delay-bit-width = <2>;
546 anatop-min-bit-val = <1>;
547 anatop-min-voltage = <725000>;
548 anatop-max-voltage = <1450000>;
551 reg_pu: regulator-vddpu@140 {
552 compatible = "fsl,anatop-regulator";
553 regulator-name = "vddpu";
554 regulator-min-microvolt = <725000>;
555 regulator-max-microvolt = <1450000>;
557 anatop-reg-offset = <0x140>;
558 anatop-vol-bit-shift = <9>;
559 anatop-vol-bit-width = <5>;
560 anatop-delay-reg-offset = <0x170>;
561 anatop-delay-bit-shift = <26>;
562 anatop-delay-bit-width = <2>;
563 anatop-min-bit-val = <1>;
564 anatop-min-voltage = <725000>;
565 anatop-max-voltage = <1450000>;
568 reg_soc: regulator-vddsoc@140 {
569 compatible = "fsl,anatop-regulator";
570 regulator-name = "vddsoc";
571 regulator-min-microvolt = <725000>;
572 regulator-max-microvolt = <1450000>;
574 anatop-reg-offset = <0x140>;
575 anatop-vol-bit-shift = <18>;
576 anatop-vol-bit-width = <5>;
577 anatop-delay-reg-offset = <0x170>;
578 anatop-delay-bit-shift = <28>;
579 anatop-delay-bit-width = <2>;
580 anatop-min-bit-val = <1>;
581 anatop-min-voltage = <725000>;
582 anatop-max-voltage = <1450000>;
587 compatible = "fsl,imx6q-tempmon";
588 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
589 fsl,tempmon = <&anatop>;
590 fsl,tempmon-data = <&ocotp>;
591 clocks = <&clks 172>;
594 usbphy1: usbphy@020c9000 {
595 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
596 reg = <0x020c9000 0x1000>;
597 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
598 clocks = <&clks 182>;
599 fsl,anatop = <&anatop>;
602 usbphy2: usbphy@020ca000 {
603 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
604 reg = <0x020ca000 0x1000>;
605 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&clks 183>;
607 fsl,anatop = <&anatop>;
611 compatible = "fsl,sec-v4.0-mon", "simple-bus";
612 #address-cells = <1>;
614 ranges = <0 0x020cc000 0x4000>;
617 compatible = "fsl,sec-v4.0-mon-rtc-lp";
619 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
620 <0 20 IRQ_TYPE_LEVEL_HIGH>;
624 epit1: epit@020d0000 { /* EPIT1 */
625 reg = <0x020d0000 0x4000>;
626 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
629 epit2: epit@020d4000 { /* EPIT2 */
630 reg = <0x020d4000 0x4000>;
631 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
635 compatible = "fsl,imx6q-src", "fsl,imx51-src";
636 reg = <0x020d8000 0x4000>;
637 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
638 <0 96 IRQ_TYPE_LEVEL_HIGH>;
643 compatible = "fsl,imx6q-gpc";
644 reg = <0x020dc000 0x4000>;
645 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
646 <0 90 IRQ_TYPE_LEVEL_HIGH>;
649 gpr: iomuxc-gpr@020e0000 {
650 compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
651 reg = <0x020e0000 0x38>;
654 iomuxc: iomuxc@020e0000 {
655 compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
656 reg = <0x020e0000 0x4000>;
660 #address-cells = <1>;
662 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
667 #address-cells = <1>;
675 lvds0_mux_0: endpoint {
676 remote-endpoint = <&ipu1_di0_lvds0>;
683 lvds0_mux_1: endpoint {
684 remote-endpoint = <&ipu1_di1_lvds0>;
690 #address-cells = <1>;
698 lvds1_mux_0: endpoint {
699 remote-endpoint = <&ipu1_di0_lvds1>;
706 lvds1_mux_1: endpoint {
707 remote-endpoint = <&ipu1_di1_lvds1>;
714 #address-cells = <1>;
716 reg = <0x00120000 0x9000>;
717 interrupts = <0 115 0x04>;
719 clocks = <&clks 123>, <&clks 124>;
720 clock-names = "iahb", "isfr";
726 hdmi_mux_0: endpoint {
727 remote-endpoint = <&ipu1_di0_hdmi>;
734 hdmi_mux_1: endpoint {
735 remote-endpoint = <&ipu1_di1_hdmi>;
740 dcic1: dcic@020e4000 {
741 reg = <0x020e4000 0x4000>;
742 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
745 dcic2: dcic@020e8000 {
746 reg = <0x020e8000 0x4000>;
747 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
750 sdma: sdma@020ec000 {
751 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
752 reg = <0x020ec000 0x4000>;
753 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
754 clocks = <&clks 155>, <&clks 155>;
755 clock-names = "ipg", "ahb";
757 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
761 aips-bus@02100000 { /* AIPS2 */
762 compatible = "fsl,aips-bus", "simple-bus";
763 #address-cells = <1>;
765 reg = <0x02100000 0x100000>;
769 reg = <0x02100000 0x40000>;
770 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
771 <0 106 IRQ_TYPE_LEVEL_HIGH>;
774 aipstz@0217c000 { /* AIPSTZ2 */
775 reg = <0x0217c000 0x4000>;
778 usbotg: usb@02184000 {
779 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
780 reg = <0x02184000 0x200>;
781 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
782 clocks = <&clks 162>;
783 fsl,usbphy = <&usbphy1>;
784 fsl,usbmisc = <&usbmisc 0>;
788 usbh1: usb@02184200 {
789 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
790 reg = <0x02184200 0x200>;
791 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
792 clocks = <&clks 162>;
793 fsl,usbphy = <&usbphy2>;
794 fsl,usbmisc = <&usbmisc 1>;
798 usbh2: usb@02184400 {
799 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
800 reg = <0x02184400 0x200>;
801 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
802 clocks = <&clks 162>;
803 fsl,usbmisc = <&usbmisc 2>;
807 usbh3: usb@02184600 {
808 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
809 reg = <0x02184600 0x200>;
810 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&clks 162>;
812 fsl,usbmisc = <&usbmisc 3>;
816 usbmisc: usbmisc@02184800 {
818 compatible = "fsl,imx6q-usbmisc";
819 reg = <0x02184800 0x200>;
820 clocks = <&clks 162>;
823 fec: ethernet@02188000 {
824 compatible = "fsl,imx6q-fec";
825 reg = <0x02188000 0x4000>;
826 interrupts-extended =
827 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
828 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&clks 117>, <&clks 117>, <&clks 190>;
830 clock-names = "ipg", "ahb", "ptp";
835 reg = <0x0218c000 0x4000>;
836 interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
837 <0 117 IRQ_TYPE_LEVEL_HIGH>,
838 <0 126 IRQ_TYPE_LEVEL_HIGH>;
841 usdhc1: usdhc@02190000 {
842 compatible = "fsl,imx6q-usdhc";
843 reg = <0x02190000 0x4000>;
844 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
846 clock-names = "ipg", "ahb", "per";
851 usdhc2: usdhc@02194000 {
852 compatible = "fsl,imx6q-usdhc";
853 reg = <0x02194000 0x4000>;
854 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
855 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
856 clock-names = "ipg", "ahb", "per";
861 usdhc3: usdhc@02198000 {
862 compatible = "fsl,imx6q-usdhc";
863 reg = <0x02198000 0x4000>;
864 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
865 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
866 clock-names = "ipg", "ahb", "per";
871 usdhc4: usdhc@0219c000 {
872 compatible = "fsl,imx6q-usdhc";
873 reg = <0x0219c000 0x4000>;
874 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
875 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
876 clock-names = "ipg", "ahb", "per";
882 #address-cells = <1>;
884 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
885 reg = <0x021a0000 0x4000>;
886 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
887 clocks = <&clks 125>;
892 #address-cells = <1>;
894 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
895 reg = <0x021a4000 0x4000>;
896 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
897 clocks = <&clks 126>;
902 #address-cells = <1>;
904 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
905 reg = <0x021a8000 0x4000>;
906 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&clks 127>;
912 reg = <0x021ac000 0x4000>;
915 mmdc0: mmdc@021b0000 { /* MMDC0 */
916 compatible = "fsl,imx6q-mmdc";
917 reg = <0x021b0000 0x4000>;
920 mmdc1: mmdc@021b4000 { /* MMDC1 */
921 reg = <0x021b4000 0x4000>;
924 weim: weim@021b8000 {
925 compatible = "fsl,imx6q-weim";
926 reg = <0x021b8000 0x4000>;
927 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
928 clocks = <&clks 196>;
931 ocotp: ocotp@021bc000 {
932 compatible = "fsl,imx6q-ocotp", "syscon";
933 reg = <0x021bc000 0x4000>;
936 tzasc@021d0000 { /* TZASC1 */
937 reg = <0x021d0000 0x4000>;
938 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
941 tzasc@021d4000 { /* TZASC2 */
942 reg = <0x021d4000 0x4000>;
943 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
946 audmux: audmux@021d8000 {
947 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
948 reg = <0x021d8000 0x4000>;
952 mipi_csi: mipi@021dc000 {
953 reg = <0x021dc000 0x4000>;
956 mipi_dsi: mipi@021e0000 {
957 #address-cells = <1>;
959 reg = <0x021e0000 0x4000>;
965 mipi_mux_0: endpoint {
966 remote-endpoint = <&ipu1_di0_mipi>;
973 mipi_mux_1: endpoint {
974 remote-endpoint = <&ipu1_di1_mipi>;
980 reg = <0x021e4000 0x4000>;
981 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
984 uart2: serial@021e8000 {
985 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
986 reg = <0x021e8000 0x4000>;
987 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
988 clocks = <&clks 160>, <&clks 161>;
989 clock-names = "ipg", "per";
990 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
991 dma-names = "rx", "tx";
995 uart3: serial@021ec000 {
996 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
997 reg = <0x021ec000 0x4000>;
998 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
999 clocks = <&clks 160>, <&clks 161>;
1000 clock-names = "ipg", "per";
1001 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
1002 dma-names = "rx", "tx";
1003 status = "disabled";
1006 uart4: serial@021f0000 {
1007 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1008 reg = <0x021f0000 0x4000>;
1009 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
1010 clocks = <&clks 160>, <&clks 161>;
1011 clock-names = "ipg", "per";
1012 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
1013 dma-names = "rx", "tx";
1014 status = "disabled";
1017 uart5: serial@021f4000 {
1018 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1019 reg = <0x021f4000 0x4000>;
1020 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
1021 clocks = <&clks 160>, <&clks 161>;
1022 clock-names = "ipg", "per";
1023 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
1024 dma-names = "rx", "tx";
1025 status = "disabled";
1029 ipu1: ipu@02400000 {
1030 #address-cells = <1>;
1032 compatible = "fsl,imx6q-ipu";
1033 reg = <0x02400000 0x400000>;
1034 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
1035 <0 5 IRQ_TYPE_LEVEL_HIGH>;
1036 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
1037 clock-names = "bus", "di0", "di1";
1041 #address-cells = <1>;
1045 ipu1_di0_disp0: endpoint@0 {
1048 ipu1_di0_hdmi: endpoint@1 {
1049 remote-endpoint = <&hdmi_mux_0>;
1052 ipu1_di0_mipi: endpoint@2 {
1053 remote-endpoint = <&mipi_mux_0>;
1056 ipu1_di0_lvds0: endpoint@3 {
1057 remote-endpoint = <&lvds0_mux_0>;
1060 ipu1_di0_lvds1: endpoint@4 {
1061 remote-endpoint = <&lvds1_mux_0>;
1066 #address-cells = <1>;
1070 ipu1_di0_disp1: endpoint@0 {
1073 ipu1_di1_hdmi: endpoint@1 {
1074 remote-endpoint = <&hdmi_mux_1>;
1077 ipu1_di1_mipi: endpoint@2 {
1078 remote-endpoint = <&mipi_mux_1>;
1081 ipu1_di1_lvds0: endpoint@3 {
1082 remote-endpoint = <&lvds0_mux_1>;
1085 ipu1_di1_lvds1: endpoint@4 {
1086 remote-endpoint = <&lvds1_mux_1>;