Merge branch 'for-3.12/core' of git://git.kernel.dk/linux-block
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / keystone.dts
1 /*
2  * Copyright 2013 Texas Instruments, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11
12 #include "skeleton.dtsi"
13
14 / {
15         model = "Texas Instruments Keystone 2 SoC";
16         compatible =  "ti,keystone-evm";
17         #address-cells = <2>;
18         #size-cells = <2>;
19         interrupt-parent = <&gic>;
20
21         aliases {
22                 serial0 = &uart0;
23         };
24
25         memory {
26                 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 interrupt-parent = <&gic>;
34
35                 cpu@0 {
36                         compatible = "arm,cortex-a15";
37                         device_type = "cpu";
38                         reg = <0>;
39                 };
40
41                 cpu@1 {
42                         compatible = "arm,cortex-a15";
43                         device_type = "cpu";
44                         reg = <1>;
45                 };
46
47                 cpu@2 {
48                         compatible = "arm,cortex-a15";
49                         device_type = "cpu";
50                         reg = <2>;
51                 };
52
53                 cpu@3 {
54                         compatible = "arm,cortex-a15";
55                         device_type = "cpu";
56                         reg = <3>;
57                 };
58         };
59
60         gic: interrupt-controller {
61                 compatible = "arm,cortex-a15-gic";
62                 #interrupt-cells = <3>;
63                 #size-cells = <0>;
64                 #address-cells = <1>;
65                 interrupt-controller;
66                 reg = <0x0 0x02561000 0x0 0x1000>,
67                       <0x0 0x02562000 0x0 0x2000>;
68         };
69
70         timer {
71                 compatible = "arm,armv7-timer";
72                 interrupts =
73                         <GIC_PPI 13
74                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
75                         <GIC_PPI 14
76                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
77                         <GIC_PPI 11
78                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
79                         <GIC_PPI 10
80                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
81         };
82
83         pmu {
84                 compatible = "arm,cortex-a15-pmu";
85                 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
86                              <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
87                              <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
88                              <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
89         };
90
91         soc {
92                 #address-cells = <1>;
93                 #size-cells = <1>;
94                 compatible = "ti,keystone","simple-bus";
95                 interrupt-parent = <&gic>;
96                 ranges = <0x0 0x0 0x0 0xc0000000>;
97
98                 rstctrl: reset-controller {
99                         compatible = "ti,keystone-reset";
100                         reg = <0x023100e8 4>;   /* pll reset control reg */
101                 };
102
103                 uart0: serial@02530c00 {
104                         compatible = "ns16550a";
105                         current-speed = <115200>;
106                         reg-shift = <2>;
107                         reg-io-width = <4>;
108                         reg = <0x02530c00 0x100>;
109                         clock-frequency = <133120000>;
110                         interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
111                 };
112
113                 uart1:  serial@02531000 {
114                         compatible = "ns16550a";
115                         current-speed = <115200>;
116                         reg-shift = <2>;
117                         reg-io-width = <4>;
118                         reg = <0x02531000 0x100>;
119                         clock-frequency = <133120000>;
120                         interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
121                 };
122
123         };
124 };