arch/arm/boot/dts/keystone.dtsi

   1 /*
   2  * Copyright 2013 Texas Instruments, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         model = "Texas Instruments Keystone 2 SoC";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18         interrupt-parent = <&gic>;
  19
  20         aliases {
  21                 serial0 = &uart0;
  22         };
  23
  24         memory {
  25                 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
  26         };
  27
  28         gic: interrupt-controller {
  29                 compatible = "arm,cortex-a15-gic";
  30                 #interrupt-cells = <3>;
  31                 interrupt-controller;
  32                 reg = <0x0 0x02561000 0x0 0x1000>,
  33                       <0x0 0x02562000 0x0 0x2000>,
  34                       <0x0 0x02564000 0x0 0x1000>,
  35                       <0x0 0x02566000 0x0 0x2000>;
  36                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  37                                 IRQ_TYPE_LEVEL_HIGH)>;
  38         };
  39
  40         timer {
  41                 compatible = "arm,armv7-timer";
  42                 interrupts =
  43                         <GIC_PPI 13
  44                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  45                         <GIC_PPI 14
  46                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  47                         <GIC_PPI 11
  48                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  49                         <GIC_PPI 10
  50                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  51         };
  52
  53         pmu {
  54                 compatible = "arm,cortex-a15-pmu";
  55                 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
  56                              <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
  57                              <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
  58                              <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
  59         };
  60
  61         soc {
  62                 #address-cells = <1>;
  63                 #size-cells = <1>;
  64                 compatible = "ti,keystone","simple-bus";
  65                 interrupt-parent = <&gic>;
  66                 ranges = <0x0 0x0 0x0 0xc0000000>;
  67
  68                 rstctrl: reset-controller {
  69                         compatible = "ti,keystone-reset";
  70                         reg = <0x023100e8 4>;   /* pll reset control reg */
  71                 };
  72
  73                 /include/ "keystone-clocks.dtsi"
  74
  75                 uart0: serial@02530c00 {
  76                         compatible = "ns16550a";
  77                         current-speed = <115200>;
  78                         reg-shift = <2>;
  79                         reg-io-width = <4>;
  80                         reg = <0x02530c00 0x100>;
  81                         clocks  = <&clkuart0>;
  82                         interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
  83                 };
  84
  85                 uart1:  serial@02531000 {
  86                         compatible = "ns16550a";
  87                         current-speed = <115200>;
  88                         reg-shift = <2>;
  89                         reg-io-width = <4>;
  90                         reg = <0x02531000 0x100>;
  91                         clocks  = <&clkuart1>;
  92                         interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
  93                 };
  94
  95                 i2c0: i2c@2530000 {
  96                         compatible = "ti,davinci-i2c";
  97                         reg = <0x02530000 0x400>;
  98                         clock-frequency = <100000>;
  99                         clocks = <&clki2c>;
 100                         interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
 101                         #address-cells = <1>;
 102                         #size-cells = <0>;
 103                 };
 104
 105                 i2c1: i2c@2530400 {
 106                         compatible = "ti,davinci-i2c";
 107                         reg = <0x02530400 0x400>;
 108                         clock-frequency = <100000>;
 109                         clocks = <&clki2c>;
 110                         interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                 };
 114
 115                 i2c2: i2c@2530800 {
 116                         compatible = "ti,davinci-i2c";
 117                         reg = <0x02530800 0x400>;
 118                         clock-frequency = <100000>;
 119                         clocks = <&clki2c>;
 120                         interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123                 };
 124
 125                 spi0: spi@21000400 {
 126                         compatible = "ti,dm6441-spi";
 127                         reg = <0x21000400 0x200>;
 128                         num-cs = <4>;
 129                         ti,davinci-spi-intr-line = <0>;
 130                         interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
 131                         clocks = <&clkspi>;
 132                 };
 133
 134                 spi1: spi@21000600 {
 135                         compatible = "ti,dm6441-spi";
 136                         reg = <0x21000600 0x200>;
 137                         num-cs = <4>;
 138                         ti,davinci-spi-intr-line = <0>;
 139                         interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
 140                         clocks = <&clkspi>;
 141                 };
 142
 143                 spi2: spi@21000800 {
 144                         compatible = "ti,dm6441-spi";
 145                         reg = <0x21000800 0x200>;
 146                         num-cs = <4>;
 147                         ti,davinci-spi-intr-line = <0>;
 148                         interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
 149                         clocks = <&clkspi>;
 150                 };
 151
 152                 usb_phy: usb_phy@2620738 {
 153                         compatible = "ti,keystone-usbphy";
 154                         #address-cells = <1>;
 155                         #size-cells = <1>;
 156                         reg = <0x2620738 32>;
 157                         status = "disabled";
 158                 };
 159
 160                 usb: usb@2680000 {
 161                         compatible = "ti,keystone-dwc3";
 162                         #address-cells = <1>;
 163                         #size-cells = <1>;
 164                         reg = <0x2680000 0x10000>;
 165                         clocks = <&clkusb>;
 166                         clock-names = "usb";
 167                         interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
 168                         ranges;
 169                         status = "disabled";
 170
 171                         dwc3@2690000 {
 172                                 compatible = "synopsys,dwc3";
 173                                 reg = <0x2690000 0x70000>;
 174                                 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
 175                                 usb-phy = <&usb_phy>, <&usb_phy>;
 176                         };
 177                 };
 178
 179                 wdt: wdt@022f0080 {
 180                         compatible = "ti,keystone-wdt","ti,davinci-wdt";
 181                         reg = <0x022f0080 0x80>;
 182                         clocks = <&clkwdtimer0>;
 183                 };
 184
 185                 clock_event: timer@22f0000 {
 186                         compatible = "ti,keystone-timer";
 187                         reg = <0x022f0000 0x80>;
 188                         interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
 189                         clocks = <&clktimer15>;
 190                 };
 191
 192                 gpio0: gpio@260bf00 {
 193                         compatible = "ti,keystone-gpio";
 194                         reg = <0x0260bf00 0x100>;
 195                         gpio-controller;
 196                         #gpio-cells = <2>;
 197                         /* HW Interrupts mapped to GPIO pins */
 198                         interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
 199                                         <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
 200                                         <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
 201                                         <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
 202                                         <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
 203                                         <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
 204                                         <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
 205                                         <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
 206                                         <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
 207                                         <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
 208                                         <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
 209                                         <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
 210                                         <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
 211                                         <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
 212                                         <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
 213                                         <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
 214                                         <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
 215                                         <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
 216                                         <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
 217                                         <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
 218                                         <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
 219                                         <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
 220                                         <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
 221                                         <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
 222                                         <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
 223                                         <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
 224                                         <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
 225                                         <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
 226                                         <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
 227                                         <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
 228                                         <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
 229                                         <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
 230                         clocks = <&clkgpio>;
 231                         clock-names = "gpio";
 232                         ti,ngpio = <32>;
 233                         ti,davinci-gpio-unbanked = <32>;
 234                 };
 235
 236                 aemif: aemif@21000A00 {
 237                         compatible = "ti,keystone-aemif", "ti,davinci-aemif";
 238                         #address-cells = <2>;
 239                         #size-cells = <1>;
 240                         clocks = <&clkaemif>;
 241                         clock-names = "aemif";
 242                         clock-ranges;
 243
 244                         reg = <0x21000A00 0x00000100>;
 245                         ranges = <0 0 0x30000000 0x10000000
 246                                   1 0 0x21000A00 0x00000100>;
 247                 };
 248         };
 249 };