2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
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48 #include "skeleton64.dtsi"
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 compatible = "fsl,ls1021a";
53 interrupt-parent = <&gic>;
70 compatible = "arm,cortex-a7";
73 clocks = <&cluster1_clk>;
77 compatible = "arm,cortex-a7";
80 clocks = <&cluster1_clk>;
85 compatible = "arm,armv7-timer";
86 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
87 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
88 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
89 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
93 compatible = "arm,cortex-a7-pmu";
94 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
95 <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
99 compatible = "simple-bus";
100 #address-cells = <2>;
103 interrupt-parent = <&gic>;
106 gic: interrupt-controller@1400000 {
107 compatible = "arm,cortex-a7-gic";
108 #interrupt-cells = <3>;
109 interrupt-controller;
110 reg = <0x0 0x1401000 0x0 0x1000>,
111 <0x0 0x1402000 0x0 0x1000>,
112 <0x0 0x1404000 0x0 0x2000>,
113 <0x0 0x1406000 0x0 0x2000>;
114 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
119 compatible = "fsl,ifc", "simple-bus";
120 reg = <0x0 0x1530000 0x0 0x10000>;
121 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
125 compatible = "fsl,ls1021a-dcfg", "syscon";
126 reg = <0x0 0x1ee0000 0x0 0x10000>;
130 esdhc: esdhc@1560000 {
131 compatible = "fsl,esdhc";
132 reg = <0x0 0x1560000 0x0 0x10000>;
133 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
134 clock-frequency = <0>;
135 voltage-ranges = <1800 1800 3300 3300>;
143 compatible = "fsl,ls1021a-scfg", "syscon";
144 reg = <0x0 0x1570000 0x0 0x10000>;
147 clockgen: clocking@1ee1000 {
148 #address-cells = <1>;
150 ranges = <0x0 0x0 0x1ee1000 0x10000>;
153 compatible = "fixed-clock";
155 clock-output-names = "sysclk";
159 compatible = "fsl,qoriq-core-pll-2.0";
163 clock-output-names = "cga-pll1", "cga-pll1-div2",
167 platform_clk: pll@c00 {
168 compatible = "fsl,qoriq-core-pll-2.0";
172 clock-output-names = "platform-clk", "platform-clk-div2";
175 cluster1_clk: clk0c0@0 {
176 compatible = "fsl,qoriq-core-mux-2.0";
179 clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
180 clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>;
181 clock-output-names = "cluster1-clk";
185 dspi0: dspi@2100000 {
186 compatible = "fsl,vf610-dspi";
187 #address-cells = <1>;
189 reg = <0x0 0x2100000 0x0 0x10000>;
190 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
191 clock-names = "dspi";
192 clocks = <&platform_clk 1>;
193 spi-num-chipselects = <5>;
198 dspi1: dspi@2110000 {
199 compatible = "fsl,vf610-dspi";
200 #address-cells = <1>;
202 reg = <0x0 0x2110000 0x0 0x10000>;
203 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
204 clock-names = "dspi";
205 clocks = <&platform_clk 1>;
206 spi-num-chipselects = <5>;
212 compatible = "fsl,vf610-i2c";
213 #address-cells = <1>;
215 reg = <0x0 0x2180000 0x0 0x10000>;
216 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
218 clocks = <&platform_clk 1>;
223 compatible = "fsl,vf610-i2c";
224 #address-cells = <1>;
226 reg = <0x0 0x2190000 0x0 0x10000>;
227 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
229 clocks = <&platform_clk 1>;
234 compatible = "fsl,vf610-i2c";
235 #address-cells = <1>;
237 reg = <0x0 0x21a0000 0x0 0x10000>;
238 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
240 clocks = <&platform_clk 1>;
244 uart0: serial@21c0500 {
245 compatible = "fsl,16550-FIFO64", "ns16550a";
246 reg = <0x0 0x21c0500 0x0 0x100>;
247 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
248 clock-frequency = <0>;
253 uart1: serial@21c0600 {
254 compatible = "fsl,16550-FIFO64", "ns16550a";
255 reg = <0x0 0x21c0600 0x0 0x100>;
256 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
257 clock-frequency = <0>;
262 uart2: serial@21d0500 {
263 compatible = "fsl,16550-FIFO64", "ns16550a";
264 reg = <0x0 0x21d0500 0x0 0x100>;
265 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
266 clock-frequency = <0>;
271 uart3: serial@21d0600 {
272 compatible = "fsl,16550-FIFO64", "ns16550a";
273 reg = <0x0 0x21d0600 0x0 0x100>;
274 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
275 clock-frequency = <0>;
280 lpuart0: serial@2950000 {
281 compatible = "fsl,ls1021a-lpuart";
282 reg = <0x0 0x2950000 0x0 0x1000>;
283 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
289 lpuart1: serial@2960000 {
290 compatible = "fsl,ls1021a-lpuart";
291 reg = <0x0 0x2960000 0x0 0x1000>;
292 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&platform_clk 1>;
298 lpuart2: serial@2970000 {
299 compatible = "fsl,ls1021a-lpuart";
300 reg = <0x0 0x2970000 0x0 0x1000>;
301 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
302 clocks = <&platform_clk 1>;
307 lpuart3: serial@2980000 {
308 compatible = "fsl,ls1021a-lpuart";
309 reg = <0x0 0x2980000 0x0 0x1000>;
310 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
311 clocks = <&platform_clk 1>;
316 lpuart4: serial@2990000 {
317 compatible = "fsl,ls1021a-lpuart";
318 reg = <0x0 0x2990000 0x0 0x1000>;
319 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
320 clocks = <&platform_clk 1>;
325 lpuart5: serial@29a0000 {
326 compatible = "fsl,ls1021a-lpuart";
327 reg = <0x0 0x29a0000 0x0 0x1000>;
328 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
329 clocks = <&platform_clk 1>;
334 wdog0: watchdog@2ad0000 {
335 compatible = "fsl,imx21-wdt";
336 reg = <0x0 0x2ad0000 0x0 0x10000>;
337 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
338 clocks = <&platform_clk 1>;
339 clock-names = "wdog-en";
344 compatible = "fsl,vf610-sai";
345 reg = <0x0 0x2b50000 0x0 0x10000>;
346 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
347 clocks = <&platform_clk 1>;
349 dma-names = "tx", "rx";
350 dmas = <&edma0 1 47>,
357 compatible = "fsl,vf610-sai";
358 reg = <0x0 0x2b60000 0x0 0x10000>;
359 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
360 clocks = <&platform_clk 1>;
362 dma-names = "tx", "rx";
363 dmas = <&edma0 1 45>,
369 edma0: edma@2c00000 {
371 compatible = "fsl,vf610-edma";
372 reg = <0x0 0x2c00000 0x0 0x10000>,
373 <0x0 0x2c10000 0x0 0x10000>,
374 <0x0 0x2c20000 0x0 0x10000>;
375 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
376 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
377 interrupt-names = "edma-tx", "edma-err";
380 clock-names = "dmamux0", "dmamux1";
381 clocks = <&platform_clk 1>,
385 mdio0: mdio@2d24000 {
386 compatible = "gianfar";
387 device_type = "mdio";
388 #address-cells = <1>;
390 reg = <0x0 0x2d24000 0x0 0x4000>;
394 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
395 reg = <0x0 0x8600000 0x0 0x1000>;
396 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
402 compatible = "snps,dwc3";
403 reg = <0x0 0x3100000 0x0 0x10000>;
404 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;