2 * DTS file for CSR SiRFmarco SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,marco";
14 interrupt-parent = <&gic>;
22 compatible = "arm,cortex-a9";
27 compatible = "arm,cortex-a9";
33 compatible = "simple-bus";
36 ranges = <0x40000000 0x40000000 0xa0000000>;
38 l2-cache-controller@c0030000 {
39 compatible = "arm,pl310-cache";
40 reg = <0xc0030000 0x1000>;
41 interrupts = <0 59 0>;
42 arm,tag-latency = <1 1 1>;
43 arm,data-latency = <1 1 1>;
44 arm,filter-ranges = <0x40000000 0x80000000>;
47 gic: interrupt-controller@c0011000 {
48 compatible = "arm,cortex-a9-gic";
50 #interrupt-cells = <3>;
51 reg = <0xc0011000 0x1000>,
56 compatible = "simple-bus";
59 ranges = <0xc2000000 0xc2000000 0x1000000>;
61 rstc: reset-controller@c2000000 {
62 compatible = "sirf,marco-rstc";
63 reg = <0xc2000000 0x10000>;
69 compatible = "simple-bus";
72 ranges = <0xc3000000 0xc3000000 0x1000000>;
74 clock-controller@c3000000 {
75 compatible = "sirf,marco-clkc";
76 reg = <0xc3000000 0x1000>;
80 rsc-controller@c3010000 {
81 compatible = "sirf,marco-rsc";
82 reg = <0xc3010000 0x1000>;
87 compatible = "simple-bus";
90 ranges = <0xc4000000 0xc4000000 0x1000000>;
92 memory-controller@c4000000 {
93 compatible = "sirf,marco-memc";
94 reg = <0xc4000000 0x10000>;
95 interrupts = <0 27 0>;
100 compatible = "simple-bus";
101 #address-cells = <1>;
103 ranges = <0xc5000000 0xc5000000 0x1000000>;
106 compatible = "sirf,marco-lcd";
107 reg = <0xc5000000 0x10000>;
108 interrupts = <0 30 0>;
112 compatible = "sirf,marco-vpp";
113 reg = <0xc5010000 0x10000>;
114 interrupts = <0 31 0>;
119 compatible = "simple-bus";
120 #address-cells = <1>;
122 ranges = <0xc6000000 0xc6000000 0x1000000>;
125 compatible = "sirf,marco-lcd";
126 reg = <0xc6000000 0x10000>;
127 interrupts = <0 62 0>;
131 compatible = "sirf,marco-vpp";
132 reg = <0xc6010000 0x10000>;
133 interrupts = <0 63 0>;
138 compatible = "simple-bus";
139 #address-cells = <1>;
141 ranges = <0xc8000000 0xc8000000 0x1000000>;
144 compatible = "powervr,sgx540";
145 reg = <0xc8000000 0x1000000>;
146 interrupts = <0 6 0>;
151 compatible = "simple-bus";
152 #address-cells = <1>;
154 ranges = <0xc9000000 0xc9000000 0x1000000>;
156 multimedia@a0000000 {
157 compatible = "sirf,marco-video-codec";
158 reg = <0xc9000000 0x1000000>;
159 interrupts = <0 5 0>;
164 compatible = "simple-bus";
165 #address-cells = <1>;
167 ranges = <0xca000000 0xca000000 0x2000000>;
170 compatible = "sirf,marco-dspif";
171 reg = <0xca000000 0x10000>;
172 interrupts = <0 9 0>;
176 compatible = "sirf,marco-gps";
177 reg = <0xca010000 0x10000>;
178 interrupts = <0 7 0>;
182 compatible = "sirf,marco-dsp";
183 reg = <0xcb000000 0x1000000>;
184 interrupts = <0 8 0>;
189 compatible = "simple-bus";
190 #address-cells = <1>;
192 ranges = <0xcc000000 0xcc000000 0x2000000>;
195 compatible = "sirf,marco-tick";
196 reg = <0xcc020000 0x1000>;
197 interrupts = <0 0 0>,
206 compatible = "sirf,marco-nand";
207 reg = <0xcc030000 0x10000>;
208 interrupts = <0 41 0>;
212 compatible = "sirf,marco-audio";
213 reg = <0xcc040000 0x10000>;
214 interrupts = <0 35 0>;
217 uart0: uart@cc050000 {
219 compatible = "sirf,marco-uart";
220 reg = <0xcc050000 0x1000>;
221 interrupts = <0 17 0>;
226 uart1: uart@cc060000 {
228 compatible = "sirf,marco-uart";
229 reg = <0xcc060000 0x1000>;
230 interrupts = <0 18 0>;
235 uart2: uart@cc070000 {
237 compatible = "sirf,marco-uart";
238 reg = <0xcc070000 0x1000>;
239 interrupts = <0 19 0>;
244 uart3: uart@cc190000 {
246 compatible = "sirf,marco-uart";
247 reg = <0xcc190000 0x1000>;
248 interrupts = <0 66 0>;
253 uart4: uart@cc1a0000 {
255 compatible = "sirf,marco-uart";
256 reg = <0xcc1a0000 0x1000>;
257 interrupts = <0 69 0>;
264 compatible = "sirf,marco-usp";
265 reg = <0xcc080000 0x10000>;
266 interrupts = <0 20 0>;
272 compatible = "sirf,marco-usp";
273 reg = <0xcc090000 0x10000>;
274 interrupts = <0 21 0>;
280 compatible = "sirf,marco-usp";
281 reg = <0xcc0a0000 0x10000>;
282 interrupts = <0 22 0>;
286 dmac0: dma-controller@cc0b0000 {
288 compatible = "sirf,marco-dmac";
289 reg = <0xcc0b0000 0x10000>;
290 interrupts = <0 12 0>;
293 dmac1: dma-controller@cc160000 {
295 compatible = "sirf,marco-dmac";
296 reg = <0xcc160000 0x10000>;
297 interrupts = <0 13 0>;
301 compatible = "sirf,marco-vip";
302 reg = <0xcc0c0000 0x10000>;
307 compatible = "sirf,marco-spi";
308 reg = <0xcc0d0000 0x10000>;
309 interrupts = <0 15 0>;
310 sirf,spi-num-chipselects = <1>;
311 cs-gpios = <&gpio 0 0>;
312 sirf,spi-dma-rx-channel = <25>;
313 sirf,spi-dma-tx-channel = <20>;
314 #address-cells = <1>;
321 compatible = "sirf,marco-spi";
322 reg = <0xcc170000 0x10000>;
323 interrupts = <0 16 0>;
324 sirf,spi-num-chipselects = <1>;
325 cs-gpios = <&gpio 0 0>;
326 sirf,spi-dma-rx-channel = <12>;
327 sirf,spi-dma-tx-channel = <13>;
328 #address-cells = <1>;
335 compatible = "sirf,marco-i2c";
336 reg = <0xcc0e0000 0x10000>;
337 interrupts = <0 24 0>;
338 #address-cells = <1>;
345 compatible = "sirf,marco-i2c";
346 reg = <0xcc0f0000 0x10000>;
347 interrupts = <0 25 0>;
348 #address-cells = <1>;
354 compatible = "sirf,marco-tsc";
355 reg = <0xcc110000 0x10000>;
356 interrupts = <0 33 0>;
359 gpio: pinctrl@cc120000 {
361 #interrupt-cells = <2>;
362 compatible = "sirf,marco-pinctrl";
363 reg = <0xcc120000 0x10000>;
364 interrupts = <0 43 0>,
370 interrupt-controller;
372 lcd_16pins_a: lcd0_0 {
374 sirf,pins = "lcd_16bitsgrp";
375 sirf,function = "lcd_16bits";
378 lcd_18pins_a: lcd0_1 {
380 sirf,pins = "lcd_18bitsgrp";
381 sirf,function = "lcd_18bits";
384 lcd_24pins_a: lcd0_2 {
386 sirf,pins = "lcd_24bitsgrp";
387 sirf,function = "lcd_24bits";
390 lcdrom_pins_a: lcdrom0_0 {
392 sirf,pins = "lcdromgrp";
393 sirf,function = "lcdrom";
396 uart0_pins_a: uart0_0 {
398 sirf,pins = "uart0grp";
399 sirf,function = "uart0";
402 uart1_pins_a: uart1_0 {
404 sirf,pins = "uart1grp";
405 sirf,function = "uart1";
408 uart2_pins_a: uart2_0 {
410 sirf,pins = "uart2grp";
411 sirf,function = "uart2";
414 uart2_noflow_pins_a: uart2_1 {
416 sirf,pins = "uart2_nostreamctrlgrp";
417 sirf,function = "uart2_nostreamctrl";
420 spi0_pins_a: spi0_0 {
422 sirf,pins = "spi0grp";
423 sirf,function = "spi0";
426 spi1_pins_a: spi1_0 {
428 sirf,pins = "spi1grp";
429 sirf,function = "spi1";
432 i2c0_pins_a: i2c0_0 {
434 sirf,pins = "i2c0grp";
435 sirf,function = "i2c0";
438 i2c1_pins_a: i2c1_0 {
440 sirf,pins = "i2c1grp";
441 sirf,function = "i2c1";
444 pwm0_pins_a: pwm0_0 {
446 sirf,pins = "pwm0grp";
447 sirf,function = "pwm0";
450 pwm1_pins_a: pwm1_0 {
452 sirf,pins = "pwm1grp";
453 sirf,function = "pwm1";
456 pwm2_pins_a: pwm2_0 {
458 sirf,pins = "pwm2grp";
459 sirf,function = "pwm2";
462 pwm3_pins_a: pwm3_0 {
464 sirf,pins = "pwm3grp";
465 sirf,function = "pwm3";
470 sirf,pins = "gpsgrp";
471 sirf,function = "gps";
476 sirf,pins = "vipgrp";
477 sirf,function = "vip";
480 sdmmc0_pins_a: sdmmc0_0 {
482 sirf,pins = "sdmmc0grp";
483 sirf,function = "sdmmc0";
486 sdmmc1_pins_a: sdmmc1_0 {
488 sirf,pins = "sdmmc1grp";
489 sirf,function = "sdmmc1";
492 sdmmc2_pins_a: sdmmc2_0 {
494 sirf,pins = "sdmmc2grp";
495 sirf,function = "sdmmc2";
498 sdmmc3_pins_a: sdmmc3_0 {
500 sirf,pins = "sdmmc3grp";
501 sirf,function = "sdmmc3";
504 sdmmc4_pins_a: sdmmc4_0 {
506 sirf,pins = "sdmmc4grp";
507 sirf,function = "sdmmc4";
510 sdmmc5_pins_a: sdmmc5_0 {
512 sirf,pins = "sdmmc5grp";
513 sirf,function = "sdmmc5";
518 sirf,pins = "i2sgrp";
519 sirf,function = "i2s";
522 ac97_pins_a: ac97_0 {
524 sirf,pins = "ac97grp";
525 sirf,function = "ac97";
528 nand_pins_a: nand_0 {
530 sirf,pins = "nandgrp";
531 sirf,function = "nand";
534 usp0_pins_a: usp0_0 {
536 sirf,pins = "usp0grp";
537 sirf,function = "usp0";
540 usp1_pins_a: usp1_0 {
542 sirf,pins = "usp1grp";
543 sirf,function = "usp1";
546 usp2_pins_a: usp2_0 {
548 sirf,pins = "usp2grp";
549 sirf,function = "usp2";
552 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus_0 {
554 sirf,pins = "usb0_utmi_drvbusgrp";
555 sirf,function = "usb0_utmi_drvbus";
558 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus_0 {
560 sirf,pins = "usb1_utmi_drvbusgrp";
561 sirf,function = "usb1_utmi_drvbus";
564 warm_rst_pins_a: warm_rst_0 {
566 sirf,pins = "warm_rstgrp";
567 sirf,function = "warm_rst";
570 pulse_count_pins_a: pulse_count_0 {
572 sirf,pins = "pulse_countgrp";
573 sirf,function = "pulse_count";
576 cko0_rst_pins_a: cko0_rst_0 {
578 sirf,pins = "cko0_rstgrp";
579 sirf,function = "cko0_rst";
582 cko1_rst_pins_a: cko1_rst_0 {
584 sirf,pins = "cko1_rstgrp";
585 sirf,function = "cko1_rst";
591 compatible = "sirf,marco-pwm";
592 reg = <0xcc130000 0x10000>;
596 compatible = "sirf,marco-efuse";
597 reg = <0xcc140000 0x10000>;
601 compatible = "sirf,marco-pulsec";
602 reg = <0xcc150000 0x10000>;
603 interrupts = <0 48 0>;
607 compatible = "sirf,marco-pciiobg", "simple-bus";
608 #address-cells = <1>;
610 ranges = <0xcd000000 0xcd000000 0x1000000>;
612 sd0: sdhci@cd000000 {
614 compatible = "sirf,marco-sdhc";
615 reg = <0xcd000000 0x100000>;
616 interrupts = <0 38 0>;
620 sd1: sdhci@cd100000 {
622 compatible = "sirf,marco-sdhc";
623 reg = <0xcd100000 0x100000>;
624 interrupts = <0 38 0>;
628 sd2: sdhci@cd200000 {
630 compatible = "sirf,marco-sdhc";
631 reg = <0xcd200000 0x100000>;
632 interrupts = <0 23 0>;
636 sd3: sdhci@cd300000 {
638 compatible = "sirf,marco-sdhc";
639 reg = <0xcd300000 0x100000>;
640 interrupts = <0 23 0>;
644 sd4: sdhci@cd400000 {
646 compatible = "sirf,marco-sdhc";
647 reg = <0xcd400000 0x100000>;
648 interrupts = <0 39 0>;
652 sd5: sdhci@cd500000 {
654 compatible = "sirf,marco-sdhc";
655 reg = <0xcd500000 0x100000>;
656 interrupts = <0 39 0>;
661 compatible = "sirf,marco-pcicp";
662 reg = <0xcd900000 0x100000>;
663 interrupts = <0 40 0>;
666 rom-interface@cda00000 {
667 compatible = "sirf,marco-romif";
668 reg = <0xcda00000 0x100000>;
674 compatible = "sirf,marco-rtciobg", "sirf-marco-rtciobg-bus";
675 #address-cells = <1>;
677 reg = <0xc1000000 0x10000>;
680 compatible = "sirf,marco-gpsrtc";
681 reg = <0x1000 0x1000>;
682 interrupts = <0 55 0>,
688 compatible = "sirf,marco-sysrtc";
689 reg = <0x2000 0x1000>;
690 interrupts = <0 52 0>,
696 compatible = "sirf,marco-pwrc";
697 reg = <0x3000 0x1000>;
698 interrupts = <0 32 0>;
703 compatible = "simple-bus";
704 #address-cells = <1>;
706 ranges = <0xce000000 0xce000000 0x1000000>;
709 compatible = "chipidea,ci13611a-marco";
710 reg = <0xce000000 0x10000>;
711 interrupts = <0 10 0>;
715 compatible = "chipidea,ci13611a-marco";
716 reg = <0xce010000 0x10000>;
717 interrupts = <0 11 0>;
721 compatible = "sirf,marco-security";
722 reg = <0xce020000 0x10000>;
723 interrupts = <0 42 0>;
728 compatible = "simple-bus";
729 #address-cells = <1>;
731 ranges = <0xd0000000 0xd0000000 0x1000000>;
734 compatible = "sirf,marco-can";
735 reg = <0xd0000000 0x10000>;
739 compatible = "sirf,marco-can";
740 reg = <0xd0010000 0x10000>;
745 compatible = "simple-bus";
746 #address-cells = <1>;
748 ranges = <0xd1000000 0xd1000000 0x1000000>;
751 compatible = "sirf,marco-lvds";
752 reg = <0xd1000000 0x10000>;
753 interrupts = <0 64 0>;