2 * Device Tree Source for OMAP2420 SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
14 compatible = "ti,omap2420", "ti,omap2";
18 compatible = "ti,omap2-prcm";
19 reg = <0x48008000 0x1000>;
26 prcm_clockdomains: clockdomains {
31 compatible = "ti,omap2-scrm";
32 reg = <0x48000000 0x1000>;
39 scrm_clockdomains: clockdomains {
43 counter32k: counter@48004000 {
44 compatible = "ti,omap-counter32k";
45 reg = <0x48004000 0x20>;
46 ti,hwmods = "counter_32k";
49 omap2420_pmx: pinmux@48000030 {
50 compatible = "ti,omap2420-padconf", "pinctrl-single";
51 reg = <0x48000030 0x0113>;
54 pinctrl-single,register-width = <8>;
55 pinctrl-single,function-mask = <0x3f>;
58 gpio1: gpio@48018000 {
59 compatible = "ti,omap2-gpio";
60 reg = <0x48018000 0x200>;
66 #interrupt-cells = <2>;
70 gpio2: gpio@4801a000 {
71 compatible = "ti,omap2-gpio";
72 reg = <0x4801a000 0x200>;
78 #interrupt-cells = <2>;
82 gpio3: gpio@4801c000 {
83 compatible = "ti,omap2-gpio";
84 reg = <0x4801c000 0x200>;
90 #interrupt-cells = <2>;
94 gpio4: gpio@4801e000 {
95 compatible = "ti,omap2-gpio";
96 reg = <0x4801e000 0x200>;
102 #interrupt-cells = <2>;
103 interrupt-controller;
106 gpmc: gpmc@6800a000 {
107 compatible = "ti,omap2420-gpmc";
108 reg = <0x6800a000 0x1000>;
109 #address-cells = <2>;
113 gpmc,num-waitpins = <4>;
117 mcbsp1: mcbsp@48074000 {
118 compatible = "ti,omap2420-mcbsp";
119 reg = <0x48074000 0xff>;
121 interrupts = <59>, /* TX interrupt */
122 <60>; /* RX interrupt */
123 interrupt-names = "tx", "rx";
124 ti,hwmods = "mcbsp1";
127 dma-names = "tx", "rx";
131 mcbsp2: mcbsp@48076000 {
132 compatible = "ti,omap2420-mcbsp";
133 reg = <0x48076000 0xff>;
135 interrupts = <62>, /* TX interrupt */
136 <63>; /* RX interrupt */
137 interrupt-names = "tx", "rx";
138 ti,hwmods = "mcbsp2";
141 dma-names = "tx", "rx";
145 msdi1: mmc@4809c000 {
146 compatible = "ti,omap2420-mmc";
148 reg = <0x4809c000 0x80>;
150 dmas = <&sdma 61 &sdma 62>;
151 dma-names = "tx", "rx";
154 mailbox: mailbox@48094000 {
155 compatible = "ti,omap2-mailbox";
156 reg = <0x48094000 0x200>;
157 interrupts = <26>, <34>;
158 interrupt-names = "dsp", "iva";
159 ti,hwmods = "mailbox";
161 ti,mbox-num-users = <4>;
162 ti,mbox-num-fifos = <6>;
164 ti,mbox-tx = <0 0 0>;
165 ti,mbox-rx = <1 0 0>;
168 ti,mbox-tx = <2 1 3>;
169 ti,mbox-rx = <3 1 3>;
173 timer1: timer@48028000 {
174 compatible = "ti,omap2420-timer";
175 reg = <0x48028000 0x400>;
177 ti,hwmods = "timer1";
181 wd_timer2: wdt@48022000 {
182 compatible = "ti,omap2-wdt";
183 ti,hwmods = "wd_timer2";
184 reg = <0x48022000 0x80>;
190 compatible = "ti,omap2420-i2c";
194 compatible = "ti,omap2420-i2c";
197 /include/ "omap24xx-clocks.dtsi"
198 /include/ "omap2420-clocks.dtsi"