2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
35 compatible = "arm,cortex-a8";
42 clock-latency = <300000>; /* From omap-cpufreq driver */
47 compatible = "arm,cortex-a8-pmu";
48 reg = <0x54000000 0x800000>;
50 ti,hwmods = "debugss";
54 * The soc node represents the soc top level view. It is used for IPs
55 * that are not memory mapped in the MPU view or for the MPU itself.
58 compatible = "ti,omap-infra";
60 compatible = "ti,omap3-mpu";
65 compatible = "ti,iva2.2";
69 compatible = "ti,omap3-c64";
75 * XXX: Use a flat representation of the OMAP3 interconnect.
76 * The real OMAP interconnect network is quite complex.
77 * Since that will not bring real advantage to represent that in DT for
78 * the moment, just use a fake OCP bus entry to represent the whole bus
82 compatible = "simple-bus";
83 reg = <0x68000000 0x10000>;
88 ti,hwmods = "l3_main";
91 compatible = "ti,omap3-aes";
93 reg = <0x480c5000 0x50>;
98 compatible = "ti,omap3-prm";
99 reg = <0x48306000 0x4000>;
102 #address-cells = <1>;
106 prm_clockdomains: clockdomains {
111 compatible = "ti,omap3-cm";
112 reg = <0x48004000 0x4000>;
115 #address-cells = <1>;
119 cm_clockdomains: clockdomains {
123 scrm: scrm@48002000 {
124 compatible = "ti,omap3-scrm";
125 reg = <0x48002000 0x2000>;
127 scrm_clocks: clocks {
128 #address-cells = <1>;
132 scrm_clockdomains: clockdomains {
136 counter32k: counter@48320000 {
137 compatible = "ti,omap-counter32k";
138 reg = <0x48320000 0x20>;
139 ti,hwmods = "counter_32k";
142 intc: interrupt-controller@48200000 {
143 compatible = "ti,omap2-intc";
144 interrupt-controller;
145 #interrupt-cells = <1>;
147 reg = <0x48200000 0x1000>;
150 sdma: dma-controller@48056000 {
151 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
152 reg = <0x48056000 0x1000>;
158 #dma-channels = <32>;
159 #dma-requests = <96>;
162 omap3_pmx_core: pinmux@48002030 {
163 compatible = "ti,omap3-padconf", "pinctrl-single";
164 reg = <0x48002030 0x0238>;
165 #address-cells = <1>;
167 #interrupt-cells = <1>;
168 interrupt-controller;
169 pinctrl-single,register-width = <16>;
170 pinctrl-single,function-mask = <0xff1f>;
173 omap3_pmx_wkup: pinmux@48002a00 {
174 compatible = "ti,omap3-padconf", "pinctrl-single";
175 reg = <0x48002a00 0x5c>;
176 #address-cells = <1>;
178 #interrupt-cells = <1>;
179 interrupt-controller;
180 pinctrl-single,register-width = <16>;
181 pinctrl-single,function-mask = <0xff1f>;
184 omap3_scm_general: tisyscon@48002270 {
185 compatible = "syscon";
186 reg = <0x48002270 0x2f0>;
189 pbias_regulator: pbias_regulator {
190 compatible = "ti,pbias-omap";
192 syscon = <&omap3_scm_general>;
193 pbias_mmc_reg: pbias_mmc_omap2430 {
194 regulator-name = "pbias_mmc_omap2430";
195 regulator-min-microvolt = <1800000>;
196 regulator-max-microvolt = <3000000>;
200 gpio1: gpio@48310000 {
201 compatible = "ti,omap3-gpio";
202 reg = <0x48310000 0x200>;
208 interrupt-controller;
209 #interrupt-cells = <2>;
212 gpio2: gpio@49050000 {
213 compatible = "ti,omap3-gpio";
214 reg = <0x49050000 0x200>;
219 interrupt-controller;
220 #interrupt-cells = <2>;
223 gpio3: gpio@49052000 {
224 compatible = "ti,omap3-gpio";
225 reg = <0x49052000 0x200>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
234 gpio4: gpio@49054000 {
235 compatible = "ti,omap3-gpio";
236 reg = <0x49054000 0x200>;
241 interrupt-controller;
242 #interrupt-cells = <2>;
245 gpio5: gpio@49056000 {
246 compatible = "ti,omap3-gpio";
247 reg = <0x49056000 0x200>;
252 interrupt-controller;
253 #interrupt-cells = <2>;
256 gpio6: gpio@49058000 {
257 compatible = "ti,omap3-gpio";
258 reg = <0x49058000 0x200>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
267 uart1: serial@4806a000 {
268 compatible = "ti,omap3-uart";
269 reg = <0x4806a000 0x2000>;
271 dmas = <&sdma 49 &sdma 50>;
272 dma-names = "tx", "rx";
274 clock-frequency = <48000000>;
277 uart2: serial@4806c000 {
278 compatible = "ti,omap3-uart";
279 reg = <0x4806c000 0x400>;
281 dmas = <&sdma 51 &sdma 52>;
282 dma-names = "tx", "rx";
284 clock-frequency = <48000000>;
287 uart3: serial@49020000 {
288 compatible = "ti,omap3-uart";
289 reg = <0x49020000 0x400>;
291 dmas = <&sdma 53 &sdma 54>;
292 dma-names = "tx", "rx";
294 clock-frequency = <48000000>;
298 compatible = "ti,omap3-i2c";
299 reg = <0x48070000 0x80>;
301 dmas = <&sdma 27 &sdma 28>;
302 dma-names = "tx", "rx";
303 #address-cells = <1>;
309 compatible = "ti,omap3-i2c";
310 reg = <0x48072000 0x80>;
312 dmas = <&sdma 29 &sdma 30>;
313 dma-names = "tx", "rx";
314 #address-cells = <1>;
320 compatible = "ti,omap3-i2c";
321 reg = <0x48060000 0x80>;
323 dmas = <&sdma 25 &sdma 26>;
324 dma-names = "tx", "rx";
325 #address-cells = <1>;
330 mailbox: mailbox@48094000 {
331 compatible = "ti,omap3-mailbox";
332 ti,hwmods = "mailbox";
333 reg = <0x48094000 0x200>;
337 mcspi1: spi@48098000 {
338 compatible = "ti,omap2-mcspi";
339 reg = <0x48098000 0x100>;
341 #address-cells = <1>;
343 ti,hwmods = "mcspi1";
353 dma-names = "tx0", "rx0", "tx1", "rx1",
354 "tx2", "rx2", "tx3", "rx3";
357 mcspi2: spi@4809a000 {
358 compatible = "ti,omap2-mcspi";
359 reg = <0x4809a000 0x100>;
361 #address-cells = <1>;
363 ti,hwmods = "mcspi2";
369 dma-names = "tx0", "rx0", "tx1", "rx1";
372 mcspi3: spi@480b8000 {
373 compatible = "ti,omap2-mcspi";
374 reg = <0x480b8000 0x100>;
376 #address-cells = <1>;
378 ti,hwmods = "mcspi3";
384 dma-names = "tx0", "rx0", "tx1", "rx1";
387 mcspi4: spi@480ba000 {
388 compatible = "ti,omap2-mcspi";
389 reg = <0x480ba000 0x100>;
391 #address-cells = <1>;
393 ti,hwmods = "mcspi4";
395 dmas = <&sdma 70>, <&sdma 71>;
396 dma-names = "tx0", "rx0";
399 hdqw1w: 1w@480b2000 {
400 compatible = "ti,omap3-1w";
401 reg = <0x480b2000 0x1000>;
407 compatible = "ti,omap3-hsmmc";
408 reg = <0x4809c000 0x200>;
412 dmas = <&sdma 61>, <&sdma 62>;
413 dma-names = "tx", "rx";
414 pbias-supply = <&pbias_mmc_reg>;
418 compatible = "ti,omap3-hsmmc";
419 reg = <0x480b4000 0x200>;
422 dmas = <&sdma 47>, <&sdma 48>;
423 dma-names = "tx", "rx";
427 compatible = "ti,omap3-hsmmc";
428 reg = <0x480ad000 0x200>;
431 dmas = <&sdma 77>, <&sdma 78>;
432 dma-names = "tx", "rx";
435 mmu_isp: mmu@480bd400 {
436 compatible = "ti,omap2-iommu";
437 reg = <0x480bd400 0x80>;
439 ti,hwmods = "mmu_isp";
440 ti,#tlb-entries = <8>;
443 mmu_iva: mmu@5d000000 {
444 compatible = "ti,omap2-iommu";
445 reg = <0x5d000000 0x80>;
447 ti,hwmods = "mmu_iva";
452 compatible = "ti,omap3-wdt";
453 reg = <0x48314000 0x80>;
454 ti,hwmods = "wd_timer2";
457 mcbsp1: mcbsp@48074000 {
458 compatible = "ti,omap3-mcbsp";
459 reg = <0x48074000 0xff>;
461 interrupts = <16>, /* OCP compliant interrupt */
462 <59>, /* TX interrupt */
463 <60>; /* RX interrupt */
464 interrupt-names = "common", "tx", "rx";
465 ti,buffer-size = <128>;
466 ti,hwmods = "mcbsp1";
469 dma-names = "tx", "rx";
473 mcbsp2: mcbsp@49022000 {
474 compatible = "ti,omap3-mcbsp";
475 reg = <0x49022000 0xff>,
477 reg-names = "mpu", "sidetone";
478 interrupts = <17>, /* OCP compliant interrupt */
479 <62>, /* TX interrupt */
480 <63>, /* RX interrupt */
482 interrupt-names = "common", "tx", "rx", "sidetone";
483 ti,buffer-size = <1280>;
484 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
487 dma-names = "tx", "rx";
491 mcbsp3: mcbsp@49024000 {
492 compatible = "ti,omap3-mcbsp";
493 reg = <0x49024000 0xff>,
495 reg-names = "mpu", "sidetone";
496 interrupts = <22>, /* OCP compliant interrupt */
497 <89>, /* TX interrupt */
498 <90>, /* RX interrupt */
500 interrupt-names = "common", "tx", "rx", "sidetone";
501 ti,buffer-size = <128>;
502 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
505 dma-names = "tx", "rx";
509 mcbsp4: mcbsp@49026000 {
510 compatible = "ti,omap3-mcbsp";
511 reg = <0x49026000 0xff>;
513 interrupts = <23>, /* OCP compliant interrupt */
514 <54>, /* TX interrupt */
515 <55>; /* RX interrupt */
516 interrupt-names = "common", "tx", "rx";
517 ti,buffer-size = <128>;
518 ti,hwmods = "mcbsp4";
521 dma-names = "tx", "rx";
525 mcbsp5: mcbsp@48096000 {
526 compatible = "ti,omap3-mcbsp";
527 reg = <0x48096000 0xff>;
529 interrupts = <27>, /* OCP compliant interrupt */
530 <81>, /* TX interrupt */
531 <82>; /* RX interrupt */
532 interrupt-names = "common", "tx", "rx";
533 ti,buffer-size = <128>;
534 ti,hwmods = "mcbsp5";
537 dma-names = "tx", "rx";
541 sham: sham@480c3000 {
542 compatible = "ti,omap3-sham";
544 reg = <0x480c3000 0x64>;
548 smartreflex_core: smartreflex@480cb000 {
549 compatible = "ti,omap3-smartreflex-core";
550 ti,hwmods = "smartreflex_core";
551 reg = <0x480cb000 0x400>;
555 smartreflex_mpu_iva: smartreflex@480c9000 {
556 compatible = "ti,omap3-smartreflex-iva";
557 ti,hwmods = "smartreflex_mpu_iva";
558 reg = <0x480c9000 0x400>;
562 timer1: timer@48318000 {
563 compatible = "ti,omap3430-timer";
564 reg = <0x48318000 0x400>;
566 ti,hwmods = "timer1";
570 timer2: timer@49032000 {
571 compatible = "ti,omap3430-timer";
572 reg = <0x49032000 0x400>;
574 ti,hwmods = "timer2";
577 timer3: timer@49034000 {
578 compatible = "ti,omap3430-timer";
579 reg = <0x49034000 0x400>;
581 ti,hwmods = "timer3";
584 timer4: timer@49036000 {
585 compatible = "ti,omap3430-timer";
586 reg = <0x49036000 0x400>;
588 ti,hwmods = "timer4";
591 timer5: timer@49038000 {
592 compatible = "ti,omap3430-timer";
593 reg = <0x49038000 0x400>;
595 ti,hwmods = "timer5";
599 timer6: timer@4903a000 {
600 compatible = "ti,omap3430-timer";
601 reg = <0x4903a000 0x400>;
603 ti,hwmods = "timer6";
607 timer7: timer@4903c000 {
608 compatible = "ti,omap3430-timer";
609 reg = <0x4903c000 0x400>;
611 ti,hwmods = "timer7";
615 timer8: timer@4903e000 {
616 compatible = "ti,omap3430-timer";
617 reg = <0x4903e000 0x400>;
619 ti,hwmods = "timer8";
624 timer9: timer@49040000 {
625 compatible = "ti,omap3430-timer";
626 reg = <0x49040000 0x400>;
628 ti,hwmods = "timer9";
632 timer10: timer@48086000 {
633 compatible = "ti,omap3430-timer";
634 reg = <0x48086000 0x400>;
636 ti,hwmods = "timer10";
640 timer11: timer@48088000 {
641 compatible = "ti,omap3430-timer";
642 reg = <0x48088000 0x400>;
644 ti,hwmods = "timer11";
648 timer12: timer@48304000 {
649 compatible = "ti,omap3430-timer";
650 reg = <0x48304000 0x400>;
652 ti,hwmods = "timer12";
657 usbhstll: usbhstll@48062000 {
658 compatible = "ti,usbhs-tll";
659 reg = <0x48062000 0x1000>;
661 ti,hwmods = "usb_tll_hs";
664 usbhshost: usbhshost@48064000 {
665 compatible = "ti,usbhs-host";
666 reg = <0x48064000 0x400>;
667 ti,hwmods = "usb_host_hs";
668 #address-cells = <1>;
672 usbhsohci: ohci@48064400 {
673 compatible = "ti,ohci-omap3";
674 reg = <0x48064400 0x400>;
675 interrupt-parent = <&intc>;
679 usbhsehci: ehci@48064800 {
680 compatible = "ti,ehci-omap";
681 reg = <0x48064800 0x400>;
682 interrupt-parent = <&intc>;
687 gpmc: gpmc@6e000000 {
688 compatible = "ti,omap3430-gpmc";
690 reg = <0x6e000000 0x02d0>;
693 gpmc,num-waitpins = <4>;
694 #address-cells = <2>;
698 usb_otg_hs: usb_otg_hs@480ab000 {
699 compatible = "ti,omap3-musb";
700 reg = <0x480ab000 0x1000>;
701 interrupts = <92>, <93>;
702 interrupt-names = "mc", "dma";
703 ti,hwmods = "usb_otg_hs";
710 compatible = "ti,omap3-dss";
711 reg = <0x48050000 0x200>;
713 ti,hwmods = "dss_core";
714 clocks = <&dss1_alwon_fck>;
716 #address-cells = <1>;
721 compatible = "ti,omap3-dispc";
722 reg = <0x48050400 0x400>;
724 ti,hwmods = "dss_dispc";
725 clocks = <&dss1_alwon_fck>;
729 dsi: encoder@4804fc00 {
730 compatible = "ti,omap3-dsi";
731 reg = <0x4804fc00 0x200>,
734 reg-names = "proto", "phy", "pll";
737 ti,hwmods = "dss_dsi1";
738 clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
739 clock-names = "fck", "sys_clk";
742 rfbi: encoder@48050800 {
743 compatible = "ti,omap3-rfbi";
744 reg = <0x48050800 0x100>;
746 ti,hwmods = "dss_rfbi";
747 clocks = <&dss1_alwon_fck>, <&dss_ick>;
748 clock-names = "fck", "ick";
751 venc: encoder@48050c00 {
752 compatible = "ti,omap3-venc";
753 reg = <0x48050c00 0x100>;
755 ti,hwmods = "dss_venc";
756 clocks = <&dss_tv_fck>;
763 /include/ "omap3xxx-clocks.dtsi"