2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
32 compatible = "arm,cortex-a8";
39 compatible = "arm,cortex-a8-pmu";
41 ti,hwmods = "debugss";
45 * The soc node represents the soc top level view. It is used for IPs
46 * that are not memory mapped in the MPU view or for the MPU itself.
49 compatible = "ti,omap-infra";
51 compatible = "ti,omap3-mpu";
56 compatible = "ti,iva2.2";
60 compatible = "ti,omap3-c64";
66 * XXX: Use a flat representation of the OMAP3 interconnect.
67 * The real OMAP interconnect network is quite complex.
68 * Since that will not bring real advantage to represent that in DT for
69 * the moment, just use a fake OCP bus entry to represent the whole bus
73 compatible = "simple-bus";
77 ti,hwmods = "l3_main";
79 counter32k: counter@48320000 {
80 compatible = "ti,omap-counter32k";
81 reg = <0x48320000 0x20>;
82 ti,hwmods = "counter_32k";
85 intc: interrupt-controller@48200000 {
86 compatible = "ti,omap2-intc";
88 #interrupt-cells = <1>;
90 reg = <0x48200000 0x1000>;
93 sdma: dma-controller@48056000 {
94 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
95 reg = <0x48056000 0x1000>;
101 #dma-channels = <32>;
102 #dma-requests = <96>;
105 omap3_pmx_core: pinmux@48002030 {
106 compatible = "ti,omap3-padconf", "pinctrl-single";
107 reg = <0x48002030 0x05cc>;
108 #address-cells = <1>;
110 pinctrl-single,register-width = <16>;
111 pinctrl-single,function-mask = <0x7f1f>;
114 omap3_pmx_wkup: pinmux@0x48002a00 {
115 compatible = "ti,omap3-padconf", "pinctrl-single";
116 reg = <0x48002a00 0x5c>;
117 #address-cells = <1>;
119 pinctrl-single,register-width = <16>;
120 pinctrl-single,function-mask = <0x7f1f>;
123 gpio1: gpio@48310000 {
124 compatible = "ti,omap3-gpio";
125 reg = <0x48310000 0x200>;
131 interrupt-controller;
132 #interrupt-cells = <2>;
135 gpio2: gpio@49050000 {
136 compatible = "ti,omap3-gpio";
137 reg = <0x49050000 0x200>;
142 interrupt-controller;
143 #interrupt-cells = <2>;
146 gpio3: gpio@49052000 {
147 compatible = "ti,omap3-gpio";
148 reg = <0x49052000 0x200>;
153 interrupt-controller;
154 #interrupt-cells = <2>;
157 gpio4: gpio@49054000 {
158 compatible = "ti,omap3-gpio";
159 reg = <0x49054000 0x200>;
164 interrupt-controller;
165 #interrupt-cells = <2>;
168 gpio5: gpio@49056000 {
169 compatible = "ti,omap3-gpio";
170 reg = <0x49056000 0x200>;
175 interrupt-controller;
176 #interrupt-cells = <2>;
179 gpio6: gpio@49058000 {
180 compatible = "ti,omap3-gpio";
181 reg = <0x49058000 0x200>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
190 uart1: serial@4806a000 {
191 compatible = "ti,omap3-uart";
193 clock-frequency = <48000000>;
196 uart2: serial@4806c000 {
197 compatible = "ti,omap3-uart";
199 clock-frequency = <48000000>;
202 uart3: serial@49020000 {
203 compatible = "ti,omap3-uart";
205 clock-frequency = <48000000>;
209 compatible = "ti,omap3-i2c";
210 #address-cells = <1>;
216 compatible = "ti,omap3-i2c";
217 #address-cells = <1>;
223 compatible = "ti,omap3-i2c";
224 #address-cells = <1>;
229 mcspi1: spi@48098000 {
230 compatible = "ti,omap2-mcspi";
231 #address-cells = <1>;
233 ti,hwmods = "mcspi1";
243 dma-names = "tx0", "rx0", "tx1", "rx1",
244 "tx2", "rx2", "tx3", "rx3";
247 mcspi2: spi@4809a000 {
248 compatible = "ti,omap2-mcspi";
249 #address-cells = <1>;
251 ti,hwmods = "mcspi2";
257 dma-names = "tx0", "rx0", "tx1", "rx1";
260 mcspi3: spi@480b8000 {
261 compatible = "ti,omap2-mcspi";
262 #address-cells = <1>;
264 ti,hwmods = "mcspi3";
270 dma-names = "tx0", "rx0", "tx1", "rx1";
273 mcspi4: spi@480ba000 {
274 compatible = "ti,omap2-mcspi";
275 #address-cells = <1>;
277 ti,hwmods = "mcspi4";
279 dmas = <&sdma 70>, <&sdma 71>;
280 dma-names = "tx0", "rx0";
284 compatible = "ti,omap3-hsmmc";
287 dmas = <&sdma 61>, <&sdma 62>;
288 dma-names = "tx", "rx";
292 compatible = "ti,omap3-hsmmc";
294 dmas = <&sdma 47>, <&sdma 48>;
295 dma-names = "tx", "rx";
299 compatible = "ti,omap3-hsmmc";
301 dmas = <&sdma 77>, <&sdma 78>;
302 dma-names = "tx", "rx";
306 compatible = "ti,omap3-wdt";
307 ti,hwmods = "wd_timer2";
310 mcbsp1: mcbsp@48074000 {
311 compatible = "ti,omap3-mcbsp";
312 reg = <0x48074000 0xff>;
314 interrupts = <16>, /* OCP compliant interrupt */
315 <59>, /* TX interrupt */
316 <60>; /* RX interrupt */
317 interrupt-names = "common", "tx", "rx";
318 ti,buffer-size = <128>;
319 ti,hwmods = "mcbsp1";
322 dma-names = "tx", "rx";
325 mcbsp2: mcbsp@49022000 {
326 compatible = "ti,omap3-mcbsp";
327 reg = <0x49022000 0xff>,
329 reg-names = "mpu", "sidetone";
330 interrupts = <17>, /* OCP compliant interrupt */
331 <62>, /* TX interrupt */
332 <63>, /* RX interrupt */
334 interrupt-names = "common", "tx", "rx", "sidetone";
335 ti,buffer-size = <1280>;
336 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
339 dma-names = "tx", "rx";
342 mcbsp3: mcbsp@49024000 {
343 compatible = "ti,omap3-mcbsp";
344 reg = <0x49024000 0xff>,
346 reg-names = "mpu", "sidetone";
347 interrupts = <22>, /* OCP compliant interrupt */
348 <89>, /* TX interrupt */
349 <90>, /* RX interrupt */
351 interrupt-names = "common", "tx", "rx", "sidetone";
352 ti,buffer-size = <128>;
353 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
356 dma-names = "tx", "rx";
359 mcbsp4: mcbsp@49026000 {
360 compatible = "ti,omap3-mcbsp";
361 reg = <0x49026000 0xff>;
363 interrupts = <23>, /* OCP compliant interrupt */
364 <54>, /* TX interrupt */
365 <55>; /* RX interrupt */
366 interrupt-names = "common", "tx", "rx";
367 ti,buffer-size = <128>;
368 ti,hwmods = "mcbsp4";
371 dma-names = "tx", "rx";
374 mcbsp5: mcbsp@48096000 {
375 compatible = "ti,omap3-mcbsp";
376 reg = <0x48096000 0xff>;
378 interrupts = <27>, /* OCP compliant interrupt */
379 <81>, /* TX interrupt */
380 <82>; /* RX interrupt */
381 interrupt-names = "common", "tx", "rx";
382 ti,buffer-size = <128>;
383 ti,hwmods = "mcbsp5";
386 dma-names = "tx", "rx";
389 timer1: timer@48318000 {
390 compatible = "ti,omap3430-timer";
391 reg = <0x48318000 0x400>;
393 ti,hwmods = "timer1";
397 timer2: timer@49032000 {
398 compatible = "ti,omap3430-timer";
399 reg = <0x49032000 0x400>;
401 ti,hwmods = "timer2";
404 timer3: timer@49034000 {
405 compatible = "ti,omap3430-timer";
406 reg = <0x49034000 0x400>;
408 ti,hwmods = "timer3";
411 timer4: timer@49036000 {
412 compatible = "ti,omap3430-timer";
413 reg = <0x49036000 0x400>;
415 ti,hwmods = "timer4";
418 timer5: timer@49038000 {
419 compatible = "ti,omap3430-timer";
420 reg = <0x49038000 0x400>;
422 ti,hwmods = "timer5";
426 timer6: timer@4903a000 {
427 compatible = "ti,omap3430-timer";
428 reg = <0x4903a000 0x400>;
430 ti,hwmods = "timer6";
434 timer7: timer@4903c000 {
435 compatible = "ti,omap3430-timer";
436 reg = <0x4903c000 0x400>;
438 ti,hwmods = "timer7";
442 timer8: timer@4903e000 {
443 compatible = "ti,omap3430-timer";
444 reg = <0x4903e000 0x400>;
446 ti,hwmods = "timer8";
451 timer9: timer@49040000 {
452 compatible = "ti,omap3430-timer";
453 reg = <0x49040000 0x400>;
455 ti,hwmods = "timer9";
459 timer10: timer@48086000 {
460 compatible = "ti,omap3430-timer";
461 reg = <0x48086000 0x400>;
463 ti,hwmods = "timer10";
467 timer11: timer@48088000 {
468 compatible = "ti,omap3430-timer";
469 reg = <0x48088000 0x400>;
471 ti,hwmods = "timer11";
475 timer12: timer@48304000 {
476 compatible = "ti,omap3430-timer";
477 reg = <0x48304000 0x400>;
479 ti,hwmods = "timer12";
484 usbhstll: usbhstll@48062000 {
485 compatible = "ti,usbhs-tll";
486 reg = <0x48062000 0x1000>;
488 ti,hwmods = "usb_tll_hs";
491 usbhshost: usbhshost@48064000 {
492 compatible = "ti,usbhs-host";
493 reg = <0x48064000 0x400>;
494 ti,hwmods = "usb_host_hs";
495 #address-cells = <1>;
499 usbhsohci: ohci@48064400 {
500 compatible = "ti,ohci-omap3", "usb-ohci";
501 reg = <0x48064400 0x400>;
502 interrupt-parent = <&intc>;
506 usbhsehci: ehci@48064800 {
507 compatible = "ti,ehci-omap", "usb-ehci";
508 reg = <0x48064800 0x400>;
509 interrupt-parent = <&intc>;
514 gpmc: gpmc@6e000000 {
515 compatible = "ti,omap3430-gpmc";
517 reg = <0x6e000000 0x02d0>;
520 gpmc,num-waitpins = <4>;
521 #address-cells = <2>;
525 usb_otg_hs: usb_otg_hs@480ab000 {
526 compatible = "ti,omap3-musb";
527 reg = <0x480ab000 0x1000>;
528 interrupts = <92>, <93>;
529 interrupt-names = "mc", "dma";
530 ti,hwmods = "usb_otg_hs";