2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
13 #include "skeleton.dtsi"
16 compatible = "ti,omap4430", "ti,omap4";
17 interrupt-parent = <&gic>;
35 compatible = "arm,cortex-a9";
37 next-level-cache = <&L2>;
40 clocks = <&dpll_mpu_ck>;
43 clock-latency = <300000>; /* From omap-cpufreq driver */
46 compatible = "arm,cortex-a9";
48 next-level-cache = <&L2>;
53 gic: interrupt-controller@48241000 {
54 compatible = "arm,cortex-a9-gic";
56 #interrupt-cells = <3>;
57 reg = <0x48241000 0x1000>,
61 L2: l2-cache-controller@48242000 {
62 compatible = "arm,pl310-cache";
63 reg = <0x48242000 0x1000>;
68 local-timer@48240600 {
69 compatible = "arm,cortex-a9-twd-timer";
70 clocks = <&mpu_periphclk>;
71 reg = <0x48240600 0x20>;
72 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
76 * The soc node represents the soc top level view. It is used for IPs
77 * that are not memory mapped in the MPU view or for the MPU itself.
80 compatible = "ti,omap-infra";
82 compatible = "ti,omap4-mpu";
87 compatible = "ti,omap3-c64";
92 compatible = "ti,ivahd";
98 * XXX: Use a flat representation of the OMAP4 interconnect.
99 * The real OMAP interconnect network is quite complex.
100 * Since it will not bring real advantage to represent that in DT for
101 * the moment, just use a fake OCP bus entry to represent the whole bus
105 compatible = "ti,omap4-l3-noc", "simple-bus";
106 #address-cells = <1>;
109 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
110 reg = <0x44000000 0x1000>,
113 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
114 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
117 compatible = "ti,omap4-cm1";
118 reg = <0x4a004000 0x2000>;
121 #address-cells = <1>;
125 cm1_clockdomains: clockdomains {
130 compatible = "ti,omap4-prm";
131 reg = <0x4a306000 0x3000>;
134 #address-cells = <1>;
138 prm_clockdomains: clockdomains {
143 compatible = "ti,omap4-cm2";
144 reg = <0x4a008000 0x3000>;
147 #address-cells = <1>;
151 cm2_clockdomains: clockdomains {
155 scrm: scrm@4a30a000 {
156 compatible = "ti,omap4-scrm";
157 reg = <0x4a30a000 0x2000>;
159 scrm_clocks: clocks {
160 #address-cells = <1>;
164 scrm_clockdomains: clockdomains {
168 counter32k: counter@4a304000 {
169 compatible = "ti,omap-counter32k";
170 reg = <0x4a304000 0x20>;
171 ti,hwmods = "counter_32k";
174 omap4_pmx_core: pinmux@4a100040 {
175 compatible = "ti,omap4-padconf", "pinctrl-single";
176 reg = <0x4a100040 0x0196>;
177 #address-cells = <1>;
179 #interrupt-cells = <1>;
180 interrupt-controller;
181 pinctrl-single,register-width = <16>;
182 pinctrl-single,function-mask = <0x7fff>;
184 omap4_pmx_wkup: pinmux@4a31e040 {
185 compatible = "ti,omap4-padconf", "pinctrl-single";
186 reg = <0x4a31e040 0x0038>;
187 #address-cells = <1>;
189 #interrupt-cells = <1>;
190 interrupt-controller;
191 pinctrl-single,register-width = <16>;
192 pinctrl-single,function-mask = <0x7fff>;
195 omap4_padconf_global: tisyscon@4a1005a0 {
196 compatible = "syscon";
197 reg = <0x4a1005a0 0x170>;
200 pbias_regulator: pbias_regulator {
201 compatible = "ti,pbias-omap";
203 syscon = <&omap4_padconf_global>;
204 pbias_mmc_reg: pbias_mmc_omap4 {
205 regulator-name = "pbias_mmc_omap4";
206 regulator-min-microvolt = <1800000>;
207 regulator-max-microvolt = <3000000>;
211 sdma: dma-controller@4a056000 {
212 compatible = "ti,omap4430-sdma";
213 reg = <0x4a056000 0x1000>;
214 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
215 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
216 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
217 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
219 #dma-channels = <32>;
220 #dma-requests = <127>;
223 gpio1: gpio@4a310000 {
224 compatible = "ti,omap4-gpio";
225 reg = <0x4a310000 0x200>;
226 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
231 interrupt-controller;
232 #interrupt-cells = <2>;
235 gpio2: gpio@48055000 {
236 compatible = "ti,omap4-gpio";
237 reg = <0x48055000 0x200>;
238 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
242 interrupt-controller;
243 #interrupt-cells = <2>;
246 gpio3: gpio@48057000 {
247 compatible = "ti,omap4-gpio";
248 reg = <0x48057000 0x200>;
249 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
253 interrupt-controller;
254 #interrupt-cells = <2>;
257 gpio4: gpio@48059000 {
258 compatible = "ti,omap4-gpio";
259 reg = <0x48059000 0x200>;
260 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
264 interrupt-controller;
265 #interrupt-cells = <2>;
268 gpio5: gpio@4805b000 {
269 compatible = "ti,omap4-gpio";
270 reg = <0x4805b000 0x200>;
271 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
279 gpio6: gpio@4805d000 {
280 compatible = "ti,omap4-gpio";
281 reg = <0x4805d000 0x200>;
282 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
286 interrupt-controller;
287 #interrupt-cells = <2>;
290 gpmc: gpmc@50000000 {
291 compatible = "ti,omap4430-gpmc";
292 reg = <0x50000000 0x1000>;
293 #address-cells = <2>;
295 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
297 gpmc,num-waitpins = <4>;
300 clocks = <&l3_div_ck>;
304 uart1: serial@4806a000 {
305 compatible = "ti,omap4-uart";
306 reg = <0x4806a000 0x100>;
307 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
309 clock-frequency = <48000000>;
312 uart2: serial@4806c000 {
313 compatible = "ti,omap4-uart";
314 reg = <0x4806c000 0x100>;
315 interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
317 clock-frequency = <48000000>;
320 uart3: serial@48020000 {
321 compatible = "ti,omap4-uart";
322 reg = <0x48020000 0x100>;
323 interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
325 clock-frequency = <48000000>;
328 uart4: serial@4806e000 {
329 compatible = "ti,omap4-uart";
330 reg = <0x4806e000 0x100>;
331 interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
333 clock-frequency = <48000000>;
336 hwspinlock: spinlock@4a0f6000 {
337 compatible = "ti,omap4-hwspinlock";
338 reg = <0x4a0f6000 0x1000>;
339 ti,hwmods = "spinlock";
344 compatible = "ti,omap4-i2c";
345 reg = <0x48070000 0x100>;
346 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
347 #address-cells = <1>;
353 compatible = "ti,omap4-i2c";
354 reg = <0x48072000 0x100>;
355 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
356 #address-cells = <1>;
362 compatible = "ti,omap4-i2c";
363 reg = <0x48060000 0x100>;
364 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
365 #address-cells = <1>;
371 compatible = "ti,omap4-i2c";
372 reg = <0x48350000 0x100>;
373 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
374 #address-cells = <1>;
379 mcspi1: spi@48098000 {
380 compatible = "ti,omap4-mcspi";
381 reg = <0x48098000 0x200>;
382 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
383 #address-cells = <1>;
385 ti,hwmods = "mcspi1";
395 dma-names = "tx0", "rx0", "tx1", "rx1",
396 "tx2", "rx2", "tx3", "rx3";
399 mcspi2: spi@4809a000 {
400 compatible = "ti,omap4-mcspi";
401 reg = <0x4809a000 0x200>;
402 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
403 #address-cells = <1>;
405 ti,hwmods = "mcspi2";
411 dma-names = "tx0", "rx0", "tx1", "rx1";
414 mcspi3: spi@480b8000 {
415 compatible = "ti,omap4-mcspi";
416 reg = <0x480b8000 0x200>;
417 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
418 #address-cells = <1>;
420 ti,hwmods = "mcspi3";
422 dmas = <&sdma 15>, <&sdma 16>;
423 dma-names = "tx0", "rx0";
426 mcspi4: spi@480ba000 {
427 compatible = "ti,omap4-mcspi";
428 reg = <0x480ba000 0x200>;
429 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
430 #address-cells = <1>;
432 ti,hwmods = "mcspi4";
434 dmas = <&sdma 70>, <&sdma 71>;
435 dma-names = "tx0", "rx0";
439 compatible = "ti,omap4-hsmmc";
440 reg = <0x4809c000 0x400>;
441 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
444 ti,needs-special-reset;
445 dmas = <&sdma 61>, <&sdma 62>;
446 dma-names = "tx", "rx";
447 pbias-supply = <&pbias_mmc_reg>;
451 compatible = "ti,omap4-hsmmc";
452 reg = <0x480b4000 0x400>;
453 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
455 ti,needs-special-reset;
456 dmas = <&sdma 47>, <&sdma 48>;
457 dma-names = "tx", "rx";
461 compatible = "ti,omap4-hsmmc";
462 reg = <0x480ad000 0x400>;
463 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
465 ti,needs-special-reset;
466 dmas = <&sdma 77>, <&sdma 78>;
467 dma-names = "tx", "rx";
471 compatible = "ti,omap4-hsmmc";
472 reg = <0x480d1000 0x400>;
473 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
475 ti,needs-special-reset;
476 dmas = <&sdma 57>, <&sdma 58>;
477 dma-names = "tx", "rx";
481 compatible = "ti,omap4-hsmmc";
482 reg = <0x480d5000 0x400>;
483 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
485 ti,needs-special-reset;
486 dmas = <&sdma 59>, <&sdma 60>;
487 dma-names = "tx", "rx";
490 mmu_dsp: mmu@4a066000 {
491 compatible = "ti,omap4-iommu";
492 reg = <0x4a066000 0x100>;
493 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
494 ti,hwmods = "mmu_dsp";
497 mmu_ipu: mmu@55082000 {
498 compatible = "ti,omap4-iommu";
499 reg = <0x55082000 0x100>;
500 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
501 ti,hwmods = "mmu_ipu";
502 ti,iommu-bus-err-back;
506 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
507 reg = <0x4a314000 0x80>;
508 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
509 ti,hwmods = "wd_timer2";
512 mcpdm: mcpdm@40132000 {
513 compatible = "ti,omap4-mcpdm";
514 reg = <0x40132000 0x7f>, /* MPU private access */
515 <0x49032000 0x7f>; /* L3 Interconnect */
516 reg-names = "mpu", "dma";
517 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
521 dma-names = "up_link", "dn_link";
525 dmic: dmic@4012e000 {
526 compatible = "ti,omap4-dmic";
527 reg = <0x4012e000 0x7f>, /* MPU private access */
528 <0x4902e000 0x7f>; /* L3 Interconnect */
529 reg-names = "mpu", "dma";
530 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
533 dma-names = "up_link";
537 mcbsp1: mcbsp@40122000 {
538 compatible = "ti,omap4-mcbsp";
539 reg = <0x40122000 0xff>, /* MPU private access */
540 <0x49022000 0xff>; /* L3 Interconnect */
541 reg-names = "mpu", "dma";
542 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
543 interrupt-names = "common";
544 ti,buffer-size = <128>;
545 ti,hwmods = "mcbsp1";
548 dma-names = "tx", "rx";
552 mcbsp2: mcbsp@40124000 {
553 compatible = "ti,omap4-mcbsp";
554 reg = <0x40124000 0xff>, /* MPU private access */
555 <0x49024000 0xff>; /* L3 Interconnect */
556 reg-names = "mpu", "dma";
557 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
558 interrupt-names = "common";
559 ti,buffer-size = <128>;
560 ti,hwmods = "mcbsp2";
563 dma-names = "tx", "rx";
567 mcbsp3: mcbsp@40126000 {
568 compatible = "ti,omap4-mcbsp";
569 reg = <0x40126000 0xff>, /* MPU private access */
570 <0x49026000 0xff>; /* L3 Interconnect */
571 reg-names = "mpu", "dma";
572 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
573 interrupt-names = "common";
574 ti,buffer-size = <128>;
575 ti,hwmods = "mcbsp3";
578 dma-names = "tx", "rx";
582 mcbsp4: mcbsp@48096000 {
583 compatible = "ti,omap4-mcbsp";
584 reg = <0x48096000 0xff>; /* L4 Interconnect */
586 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
587 interrupt-names = "common";
588 ti,buffer-size = <128>;
589 ti,hwmods = "mcbsp4";
592 dma-names = "tx", "rx";
596 keypad: keypad@4a31c000 {
597 compatible = "ti,omap4-keypad";
598 reg = <0x4a31c000 0x80>;
599 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
605 compatible = "ti,omap4-dmm";
606 reg = <0x4e000000 0x800>;
607 interrupts = <0 113 0x4>;
611 emif1: emif@4c000000 {
612 compatible = "ti,emif-4d";
613 reg = <0x4c000000 0x100>;
614 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
618 hw-caps-read-idle-ctrl;
619 hw-caps-ll-interface;
623 emif2: emif@4d000000 {
624 compatible = "ti,emif-4d";
625 reg = <0x4d000000 0x100>;
626 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
630 hw-caps-read-idle-ctrl;
631 hw-caps-ll-interface;
636 compatible = "ti,omap-ocp2scp";
637 reg = <0x4a0ad000 0x1f>;
638 #address-cells = <1>;
641 ti,hwmods = "ocp2scp_usb_phy";
642 usb2_phy: usb2phy@4a0ad080 {
643 compatible = "ti,omap-usb2";
644 reg = <0x4a0ad080 0x58>;
645 ctrl-module = <&omap_control_usb2phy>;
646 clocks = <&usb_phy_cm_clk32k>;
647 clock-names = "wkupclk";
652 timer1: timer@4a318000 {
653 compatible = "ti,omap3430-timer";
654 reg = <0x4a318000 0x80>;
655 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
656 ti,hwmods = "timer1";
660 timer2: timer@48032000 {
661 compatible = "ti,omap3430-timer";
662 reg = <0x48032000 0x80>;
663 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
664 ti,hwmods = "timer2";
667 timer3: timer@48034000 {
668 compatible = "ti,omap4430-timer";
669 reg = <0x48034000 0x80>;
670 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
671 ti,hwmods = "timer3";
674 timer4: timer@48036000 {
675 compatible = "ti,omap4430-timer";
676 reg = <0x48036000 0x80>;
677 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
678 ti,hwmods = "timer4";
681 timer5: timer@40138000 {
682 compatible = "ti,omap4430-timer";
683 reg = <0x40138000 0x80>,
685 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
686 ti,hwmods = "timer5";
690 timer6: timer@4013a000 {
691 compatible = "ti,omap4430-timer";
692 reg = <0x4013a000 0x80>,
694 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
695 ti,hwmods = "timer6";
699 timer7: timer@4013c000 {
700 compatible = "ti,omap4430-timer";
701 reg = <0x4013c000 0x80>,
703 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
704 ti,hwmods = "timer7";
708 timer8: timer@4013e000 {
709 compatible = "ti,omap4430-timer";
710 reg = <0x4013e000 0x80>,
712 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
713 ti,hwmods = "timer8";
718 timer9: timer@4803e000 {
719 compatible = "ti,omap4430-timer";
720 reg = <0x4803e000 0x80>;
721 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
722 ti,hwmods = "timer9";
726 timer10: timer@48086000 {
727 compatible = "ti,omap3430-timer";
728 reg = <0x48086000 0x80>;
729 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
730 ti,hwmods = "timer10";
734 timer11: timer@48088000 {
735 compatible = "ti,omap4430-timer";
736 reg = <0x48088000 0x80>;
737 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
738 ti,hwmods = "timer11";
742 usbhstll: usbhstll@4a062000 {
743 compatible = "ti,usbhs-tll";
744 reg = <0x4a062000 0x1000>;
745 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
746 ti,hwmods = "usb_tll_hs";
749 usbhshost: usbhshost@4a064000 {
750 compatible = "ti,usbhs-host";
751 reg = <0x4a064000 0x800>;
752 ti,hwmods = "usb_host_hs";
753 #address-cells = <1>;
756 clocks = <&init_60m_fclk>,
759 clock-names = "refclk_60m_int",
763 usbhsohci: ohci@4a064800 {
764 compatible = "ti,ohci-omap3";
765 reg = <0x4a064800 0x400>;
766 interrupt-parent = <&gic>;
767 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
770 usbhsehci: ehci@4a064c00 {
771 compatible = "ti,ehci-omap";
772 reg = <0x4a064c00 0x400>;
773 interrupt-parent = <&gic>;
774 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
778 omap_control_usb2phy: control-phy@4a002300 {
779 compatible = "ti,control-phy-usb2";
780 reg = <0x4a002300 0x4>;
784 omap_control_usbotg: control-phy@4a00233c {
785 compatible = "ti,control-phy-otghs";
786 reg = <0x4a00233c 0x4>;
787 reg-names = "otghs_control";
790 usb_otg_hs: usb_otg_hs@4a0ab000 {
791 compatible = "ti,omap4-musb";
792 reg = <0x4a0ab000 0x7ff>;
793 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
794 interrupt-names = "mc", "dma";
795 ti,hwmods = "usb_otg_hs";
796 usb-phy = <&usb2_phy>;
798 phy-names = "usb2-phy";
802 ctrl-module = <&omap_control_usbotg>;
806 compatible = "ti,omap4-aes";
808 reg = <0x4b501000 0xa0>;
809 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
810 dmas = <&sdma 111>, <&sdma 110>;
811 dma-names = "tx", "rx";
815 compatible = "ti,omap4-des";
817 reg = <0x480a5000 0xa0>;
818 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
819 dmas = <&sdma 117>, <&sdma 116>;
820 dma-names = "tx", "rx";
823 abb_mpu: regulator-abb-mpu {
824 compatible = "ti,abb-v2";
825 regulator-name = "abb_mpu";
826 #address-cells = <0>;
828 ti,tranxdone-status-mask = <0x80>;
829 clocks = <&sys_clkin_ck>;
830 ti,settling-time = <50>;
831 ti,clock-cycles = <16>;
836 abb_iva: regulator-abb-iva {
837 compatible = "ti,abb-v2";
838 regulator-name = "abb_iva";
839 #address-cells = <0>;
841 ti,tranxdone-status-mask = <0x80000000>;
842 clocks = <&sys_clkin_ck>;
843 ti,settling-time = <50>;
844 ti,clock-cycles = <16>;
850 compatible = "ti,omap4-dss";
851 reg = <0x58000000 0x80>;
853 ti,hwmods = "dss_core";
854 clocks = <&dss_dss_clk>;
856 #address-cells = <1>;
861 compatible = "ti,omap4-dispc";
862 reg = <0x58001000 0x1000>;
863 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
864 ti,hwmods = "dss_dispc";
865 clocks = <&dss_dss_clk>;
869 rfbi: encoder@58002000 {
870 compatible = "ti,omap4-rfbi";
871 reg = <0x58002000 0x1000>;
873 ti,hwmods = "dss_rfbi";
874 clocks = <&dss_dss_clk>, <&dss_fck>;
875 clock-names = "fck", "ick";
878 venc: encoder@58003000 {
879 compatible = "ti,omap4-venc";
880 reg = <0x58003000 0x1000>;
882 ti,hwmods = "dss_venc";
883 clocks = <&dss_tv_clk>;
887 dsi1: encoder@58004000 {
888 compatible = "ti,omap4-dsi";
889 reg = <0x58004000 0x200>,
892 reg-names = "proto", "phy", "pll";
893 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
895 ti,hwmods = "dss_dsi1";
896 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
897 clock-names = "fck", "sys_clk";
900 dsi2: encoder@58005000 {
901 compatible = "ti,omap4-dsi";
902 reg = <0x58005000 0x200>,
905 reg-names = "proto", "phy", "pll";
906 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
908 ti,hwmods = "dss_dsi2";
909 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
910 clock-names = "fck", "sys_clk";
913 hdmi: encoder@58006000 {
914 compatible = "ti,omap4-hdmi";
915 reg = <0x58006000 0x200>,
919 reg-names = "wp", "pll", "phy", "core";
920 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
922 ti,hwmods = "dss_hdmi";
923 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
924 clock-names = "fck", "sys_clk";
926 dma-names = "audio_tx";
932 /include/ "omap44xx-clocks.dtsi"