2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 * Based on "omap4.dtsi"
11 * Carveout for multimedia usecases
12 * It should be the last 48MB of the first 512MB memory part
13 * In theory, it should not even exist. That zone should be reserved
14 * dynamically during the .reserve callback.
16 /memreserve/ 0x9d000000 0x03000000;
18 /include/ "skeleton.dtsi"
21 compatible = "ti,omap5";
22 interrupt-parent = <&gic>;
35 compatible = "arm,cortex-a15";
37 compatible = "arm,armv7-timer";
38 /* 14th PPI IRQ, active low level-sensitive */
39 interrupts = <1 14 0x308>;
40 clock-frequency = <6144000>;
44 compatible = "arm,cortex-a15";
46 compatible = "arm,armv7-timer";
47 /* 14th PPI IRQ, active low level-sensitive */
48 interrupts = <1 14 0x308>;
49 clock-frequency = <6144000>;
55 * The soc node represents the soc top level view. It is uses for IPs
56 * that are not memory mapped in the MPU view or for the MPU itself.
59 compatible = "ti,omap-infra";
61 compatible = "ti,omap5-mpu";
67 * XXX: Use a flat representation of the OMAP3 interconnect.
68 * The real OMAP interconnect network is quite complex.
69 * Since that will not bring real advantage to represent that in DT for
70 * the moment, just use a fake OCP bus entry to represent the whole bus
74 compatible = "ti,omap4-l3-noc", "simple-bus";
78 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
80 counter32k: counter@4ae04000 {
81 compatible = "ti,omap-counter32k";
82 reg = <0x4ae04000 0x40>;
83 ti,hwmods = "counter_32k";
86 omap5_pmx_core: pinmux@4a002840 {
87 compatible = "ti,omap4-padconf", "pinctrl-single";
88 reg = <0x4a002840 0x01b6>;
91 pinctrl-single,register-width = <16>;
92 pinctrl-single,function-mask = <0x7fff>;
94 omap5_pmx_wkup: pinmux@4ae0c840 {
95 compatible = "ti,omap4-padconf", "pinctrl-single";
96 reg = <0x4ae0c840 0x0038>;
99 pinctrl-single,register-width = <16>;
100 pinctrl-single,function-mask = <0x7fff>;
103 gic: interrupt-controller@48211000 {
104 compatible = "arm,cortex-a15-gic";
105 interrupt-controller;
106 #interrupt-cells = <3>;
107 reg = <0x48211000 0x1000>,
111 gpio1: gpio@4ae10000 {
112 compatible = "ti,omap4-gpio";
113 reg = <0x4ae10000 0x200>;
114 interrupts = <0 29 0x4>;
118 interrupt-controller;
119 #interrupt-cells = <1>;
122 gpio2: gpio@48055000 {
123 compatible = "ti,omap4-gpio";
124 reg = <0x48055000 0x200>;
125 interrupts = <0 30 0x4>;
129 interrupt-controller;
130 #interrupt-cells = <1>;
133 gpio3: gpio@48057000 {
134 compatible = "ti,omap4-gpio";
135 reg = <0x48057000 0x200>;
136 interrupts = <0 31 0x4>;
140 interrupt-controller;
141 #interrupt-cells = <1>;
144 gpio4: gpio@48059000 {
145 compatible = "ti,omap4-gpio";
146 reg = <0x48059000 0x200>;
147 interrupts = <0 32 0x4>;
151 interrupt-controller;
152 #interrupt-cells = <1>;
155 gpio5: gpio@4805b000 {
156 compatible = "ti,omap4-gpio";
157 reg = <0x4805b000 0x200>;
158 interrupts = <0 33 0x4>;
162 interrupt-controller;
163 #interrupt-cells = <1>;
166 gpio6: gpio@4805d000 {
167 compatible = "ti,omap4-gpio";
168 reg = <0x4805d000 0x200>;
169 interrupts = <0 34 0x4>;
173 interrupt-controller;
174 #interrupt-cells = <1>;
177 gpio7: gpio@48051000 {
178 compatible = "ti,omap4-gpio";
179 reg = <0x48051000 0x200>;
180 interrupts = <0 35 0x4>;
184 interrupt-controller;
185 #interrupt-cells = <1>;
188 gpio8: gpio@48053000 {
189 compatible = "ti,omap4-gpio";
190 reg = <0x48053000 0x200>;
191 interrupts = <0 121 0x4>;
195 interrupt-controller;
196 #interrupt-cells = <1>;
200 compatible = "ti,omap4-i2c";
201 reg = <0x48070000 0x100>;
202 interrupts = <0 56 0x4>;
203 #address-cells = <1>;
209 compatible = "ti,omap4-i2c";
210 reg = <0x48072000 0x100>;
211 interrupts = <0 57 0x4>;
212 #address-cells = <1>;
218 compatible = "ti,omap4-i2c";
219 reg = <0x48060000 0x100>;
220 interrupts = <0 61 0x4>;
221 #address-cells = <1>;
227 compatible = "ti,omap4-i2c";
228 reg = <0x4807a000 0x100>;
229 interrupts = <0 62 0x4>;
230 #address-cells = <1>;
236 compatible = "ti,omap4-i2c";
237 reg = <0x4807c000 0x100>;
238 interrupts = <0 60 0x4>;
239 #address-cells = <1>;
244 mcspi1: spi@48098000 {
245 compatible = "ti,omap4-mcspi";
246 reg = <0x48098000 0x200>;
247 interrupts = <0 65 0x4>;
248 #address-cells = <1>;
250 ti,hwmods = "mcspi1";
254 mcspi2: spi@4809a000 {
255 compatible = "ti,omap4-mcspi";
256 reg = <0x4809a000 0x200>;
257 interrupts = <0 66 0x4>;
258 #address-cells = <1>;
260 ti,hwmods = "mcspi2";
264 mcspi3: spi@480b8000 {
265 compatible = "ti,omap4-mcspi";
266 reg = <0x480b8000 0x200>;
267 interrupts = <0 91 0x4>;
268 #address-cells = <1>;
270 ti,hwmods = "mcspi3";
274 mcspi4: spi@480ba000 {
275 compatible = "ti,omap4-mcspi";
276 reg = <0x480ba000 0x200>;
277 interrupts = <0 48 0x4>;
278 #address-cells = <1>;
280 ti,hwmods = "mcspi4";
284 uart1: serial@4806a000 {
285 compatible = "ti,omap4-uart";
286 reg = <0x4806a000 0x100>;
287 interrupts = <0 72 0x4>;
289 clock-frequency = <48000000>;
292 uart2: serial@4806c000 {
293 compatible = "ti,omap4-uart";
294 reg = <0x4806c000 0x100>;
295 interrupts = <0 73 0x4>;
297 clock-frequency = <48000000>;
300 uart3: serial@48020000 {
301 compatible = "ti,omap4-uart";
302 reg = <0x48020000 0x100>;
303 interrupts = <0 74 0x4>;
305 clock-frequency = <48000000>;
308 uart4: serial@4806e000 {
309 compatible = "ti,omap4-uart";
310 reg = <0x4806e000 0x100>;
311 interrupts = <0 70 0x4>;
313 clock-frequency = <48000000>;
316 uart5: serial@48066000 {
317 compatible = "ti,omap4-uart";
318 reg = <0x48066000 0x100>;
319 interrupts = <0 105 0x4>;
321 clock-frequency = <48000000>;
324 uart6: serial@48068000 {
325 compatible = "ti,omap4-uart";
326 reg = <0x48068000 0x100>;
327 interrupts = <0 106 0x4>;
329 clock-frequency = <48000000>;
333 compatible = "ti,omap4-hsmmc";
334 reg = <0x4809c000 0x400>;
335 interrupts = <0 83 0x4>;
338 ti,needs-special-reset;
342 compatible = "ti,omap4-hsmmc";
343 reg = <0x480b4000 0x400>;
344 interrupts = <0 86 0x4>;
346 ti,needs-special-reset;
350 compatible = "ti,omap4-hsmmc";
351 reg = <0x480ad000 0x400>;
352 interrupts = <0 94 0x4>;
354 ti,needs-special-reset;
358 compatible = "ti,omap4-hsmmc";
359 reg = <0x480d1000 0x400>;
360 interrupts = <0 96 0x4>;
362 ti,needs-special-reset;
366 compatible = "ti,omap4-hsmmc";
367 reg = <0x480d5000 0x400>;
368 interrupts = <0 59 0x4>;
370 ti,needs-special-reset;
373 keypad: keypad@4ae1c000 {
374 compatible = "ti,omap4-keypad";
378 mcpdm: mcpdm@40132000 {
379 compatible = "ti,omap4-mcpdm";
380 reg = <0x40132000 0x7f>, /* MPU private access */
381 <0x49032000 0x7f>; /* L3 Interconnect */
382 reg-names = "mpu", "dma";
383 interrupts = <0 112 0x4>;
387 dmic: dmic@4012e000 {
388 compatible = "ti,omap4-dmic";
389 reg = <0x4012e000 0x7f>, /* MPU private access */
390 <0x4902e000 0x7f>; /* L3 Interconnect */
391 reg-names = "mpu", "dma";
392 interrupts = <0 114 0x4>;
396 mcbsp1: mcbsp@40122000 {
397 compatible = "ti,omap4-mcbsp";
398 reg = <0x40122000 0xff>, /* MPU private access */
399 <0x49022000 0xff>; /* L3 Interconnect */
400 reg-names = "mpu", "dma";
401 interrupts = <0 17 0x4>;
402 interrupt-names = "common";
403 ti,buffer-size = <128>;
404 ti,hwmods = "mcbsp1";
407 mcbsp2: mcbsp@40124000 {
408 compatible = "ti,omap4-mcbsp";
409 reg = <0x40124000 0xff>, /* MPU private access */
410 <0x49024000 0xff>; /* L3 Interconnect */
411 reg-names = "mpu", "dma";
412 interrupts = <0 22 0x4>;
413 interrupt-names = "common";
414 ti,buffer-size = <128>;
415 ti,hwmods = "mcbsp2";
418 mcbsp3: mcbsp@40126000 {
419 compatible = "ti,omap4-mcbsp";
420 reg = <0x40126000 0xff>, /* MPU private access */
421 <0x49026000 0xff>; /* L3 Interconnect */
422 reg-names = "mpu", "dma";
423 interrupts = <0 23 0x4>;
424 interrupt-names = "common";
425 ti,buffer-size = <128>;
426 ti,hwmods = "mcbsp3";
429 timer1: timer@4ae18000 {
430 compatible = "ti,omap2-timer";
431 reg = <0x4ae18000 0x80>;
432 interrupts = <0 37 0x4>;
433 ti,hwmods = "timer1";
437 timer2: timer@48032000 {
438 compatible = "ti,omap2-timer";
439 reg = <0x48032000 0x80>;
440 interrupts = <0 38 0x4>;
441 ti,hwmods = "timer2";
444 timer3: timer@48034000 {
445 compatible = "ti,omap2-timer";
446 reg = <0x48034000 0x80>;
447 interrupts = <0 39 0x4>;
448 ti,hwmods = "timer3";
451 timer4: timer@48036000 {
452 compatible = "ti,omap2-timer";
453 reg = <0x48036000 0x80>;
454 interrupts = <0 40 0x4>;
455 ti,hwmods = "timer4";
458 timer5: timer@40138000 {
459 compatible = "ti,omap2-timer";
460 reg = <0x40138000 0x80>,
462 interrupts = <0 41 0x4>;
463 ti,hwmods = "timer5";
467 timer6: timer@4013a000 {
468 compatible = "ti,omap2-timer";
469 reg = <0x4013a000 0x80>,
471 interrupts = <0 42 0x4>;
472 ti,hwmods = "timer6";
477 timer7: timer@4013c000 {
478 compatible = "ti,omap2-timer";
479 reg = <0x4013c000 0x80>,
481 interrupts = <0 43 0x4>;
482 ti,hwmods = "timer7";
486 timer8: timer@4013e000 {
487 compatible = "ti,omap2-timer";
488 reg = <0x4013e000 0x80>,
490 interrupts = <0 44 0x4>;
491 ti,hwmods = "timer8";
496 timer9: timer@4803e000 {
497 compatible = "ti,omap2-timer";
498 reg = <0x4803e000 0x80>;
499 interrupts = <0 45 0x4>;
500 ti,hwmods = "timer9";
503 timer10: timer@48086000 {
504 compatible = "ti,omap2-timer";
505 reg = <0x48086000 0x80>;
506 interrupts = <0 46 0x4>;
507 ti,hwmods = "timer10";
510 timer11: timer@48088000 {
511 compatible = "ti,omap2-timer";
512 reg = <0x48088000 0x80>;
513 interrupts = <0 47 0x4>;
514 ti,hwmods = "timer11";
518 emif1: emif@0x4c000000 {
519 compatible = "ti,emif-4d5";
521 phy-type = <2>; /* DDR PHY type: Intelli PHY */
522 reg = <0x4c000000 0x400>;
523 interrupts = <0 110 0x4>;
524 hw-caps-read-idle-ctrl;
525 hw-caps-ll-interface;
529 emif2: emif@0x4d000000 {
530 compatible = "ti,emif-4d5";
532 phy-type = <2>; /* DDR PHY type: Intelli PHY */
533 reg = <0x4d000000 0x400>;
534 interrupts = <0 111 0x4>;
535 hw-caps-read-idle-ctrl;
536 hw-caps-ll-interface;
540 omap_control_usb: omap-control-usb@4a002300 {
541 compatible = "ti,omap-control-usb";
542 reg = <0x4a002300 0x4>,
544 reg-names = "control_dev_conf", "phy_power_usb";
549 compatible = "ti,omap-ocp2scp";
550 #address-cells = <1>;
553 ti,hwmods = "ocp2scp1";
554 usb2_phy: usb2phy@4a084000 {
555 compatible = "ti,omap-usb2";
556 reg = <0x4a084000 0x7c>;
557 ctrl-module = <&omap_control_usb>;
560 usb3_phy: usb3phy@4a084400 {
561 compatible = "ti,omap-usb3";
562 reg = <0x4a084400 0x80>,
565 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
566 ctrl-module = <&omap_control_usb>;