arch/arm/boot/dts/omap5.dtsi

   1 /*
   2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  * Based on "omap4.dtsi"
   8  */
   9
  10 /*
  11  * Carveout for multimedia usecases
  12  * It should be the last 48MB of the first 512MB memory part
  13  * In theory, it should not even exist. That zone should be reserved
  14  * dynamically during the .reserve callback.
  15  */
  16 /memreserve/ 0x9d000000 0x03000000;
  17
  18 /include/ "skeleton.dtsi"
  19
  20 / {
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23
  24         compatible = "ti,omap5";
  25         interrupt-parent = <&gic>;
  26
  27         aliases {
  28                 serial0 = &uart1;
  29                 serial1 = &uart2;
  30                 serial2 = &uart3;
  31                 serial3 = &uart4;
  32                 serial4 = &uart5;
  33                 serial5 = &uart6;
  34         };
  35
  36         cpus {
  37                 cpu@0 {
  38                         compatible = "arm,cortex-a15";
  39                 };
  40                 cpu@1 {
  41                         compatible = "arm,cortex-a15";
  42                 };
  43         };
  44
  45         timer {
  46                 compatible = "arm,armv7-timer";
  47                 /* PPI secure/nonsecure IRQ, active low level-sensitive */
  48                 interrupts = <1 13 0x308>,
  49                              <1 14 0x308>;
  50                 clock-frequency = <6144000>;
  51         };
  52
  53         gic: interrupt-controller@48211000 {
  54                 compatible = "arm,cortex-a15-gic";
  55                 interrupt-controller;
  56                 #interrupt-cells = <3>;
  57                 reg = <0x48211000 0x1000>,
  58                       <0x48212000 0x1000>;
  59         };
  60
  61         /*
  62          * The soc node represents the soc top level view. It is uses for IPs
  63          * that are not memory mapped in the MPU view or for the MPU itself.
  64          */
  65         soc {
  66                 compatible = "ti,omap-infra";
  67                 mpu {
  68                         compatible = "ti,omap5-mpu";
  69                         ti,hwmods = "mpu";
  70                 };
  71         };
  72
  73         /*
  74          * XXX: Use a flat representation of the OMAP3 interconnect.
  75          * The real OMAP interconnect network is quite complex.
  76          * Since that will not bring real advantage to represent that in DT for
  77          * the moment, just use a fake OCP bus entry to represent the whole bus
  78          * hierarchy.
  79          */
  80         ocp {
  81                 compatible = "ti,omap4-l3-noc", "simple-bus";
  82                 #address-cells = <1>;
  83                 #size-cells = <1>;
  84                 ranges;
  85                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
  86
  87                 counter32k: counter@4ae04000 {
  88                         compatible = "ti,omap-counter32k";
  89                         reg = <0x4ae04000 0x40>;
  90                         ti,hwmods = "counter_32k";
  91                 };
  92
  93                 omap5_pmx_core: pinmux@4a002840 {
  94                         compatible = "ti,omap4-padconf", "pinctrl-single";
  95                         reg = <0x4a002840 0x01b6>;
  96                         #address-cells = <1>;
  97                         #size-cells = <0>;
  98                         pinctrl-single,register-width = <16>;
  99                         pinctrl-single,function-mask = <0x7fff>;
 100                 };
 101                 omap5_pmx_wkup: pinmux@4ae0c840 {
 102                         compatible = "ti,omap4-padconf", "pinctrl-single";
 103                         reg = <0x4ae0c840 0x0038>;
 104                         #address-cells = <1>;
 105                         #size-cells = <0>;
 106                         pinctrl-single,register-width = <16>;
 107                         pinctrl-single,function-mask = <0x7fff>;
 108                 };
 109
 110                 sdma: dma-controller@4a056000 {
 111                         compatible = "ti,omap4430-sdma";
 112                         reg = <0x4a056000 0x1000>;
 113                         interrupts = <0 12 0x4>,
 114                                      <0 13 0x4>,
 115                                      <0 14 0x4>,
 116                                      <0 15 0x4>;
 117                         #dma-cells = <1>;
 118                         #dma-channels = <32>;
 119                         #dma-requests = <127>;
 120                 };
 121
 122                 gpio1: gpio@4ae10000 {
 123                         compatible = "ti,omap4-gpio";
 124                         reg = <0x4ae10000 0x200>;
 125                         interrupts = <0 29 0x4>;
 126                         ti,hwmods = "gpio1";
 127                         gpio-controller;
 128                         #gpio-cells = <2>;
 129                         interrupt-controller;
 130                         #interrupt-cells = <2>;
 131                 };
 132
 133                 gpio2: gpio@48055000 {
 134                         compatible = "ti,omap4-gpio";
 135                         reg = <0x48055000 0x200>;
 136                         interrupts = <0 30 0x4>;
 137                         ti,hwmods = "gpio2";
 138                         gpio-controller;
 139                         #gpio-cells = <2>;
 140                         interrupt-controller;
 141                         #interrupt-cells = <2>;
 142                 };
 143
 144                 gpio3: gpio@48057000 {
 145                         compatible = "ti,omap4-gpio";
 146                         reg = <0x48057000 0x200>;
 147                         interrupts = <0 31 0x4>;
 148                         ti,hwmods = "gpio3";
 149                         gpio-controller;
 150                         #gpio-cells = <2>;
 151                         interrupt-controller;
 152                         #interrupt-cells = <2>;
 153                 };
 154
 155                 gpio4: gpio@48059000 {
 156                         compatible = "ti,omap4-gpio";
 157                         reg = <0x48059000 0x200>;
 158                         interrupts = <0 32 0x4>;
 159                         ti,hwmods = "gpio4";
 160                         gpio-controller;
 161                         #gpio-cells = <2>;
 162                         interrupt-controller;
 163                         #interrupt-cells = <2>;
 164                 };
 165
 166                 gpio5: gpio@4805b000 {
 167                         compatible = "ti,omap4-gpio";
 168                         reg = <0x4805b000 0x200>;
 169                         interrupts = <0 33 0x4>;
 170                         ti,hwmods = "gpio5";
 171                         gpio-controller;
 172                         #gpio-cells = <2>;
 173                         interrupt-controller;
 174                         #interrupt-cells = <2>;
 175                 };
 176
 177                 gpio6: gpio@4805d000 {
 178                         compatible = "ti,omap4-gpio";
 179                         reg = <0x4805d000 0x200>;
 180                         interrupts = <0 34 0x4>;
 181                         ti,hwmods = "gpio6";
 182                         gpio-controller;
 183                         #gpio-cells = <2>;
 184                         interrupt-controller;
 185                         #interrupt-cells = <2>;
 186                 };
 187
 188                 gpio7: gpio@48051000 {
 189                         compatible = "ti,omap4-gpio";
 190                         reg = <0x48051000 0x200>;
 191                         interrupts = <0 35 0x4>;
 192                         ti,hwmods = "gpio7";
 193                         gpio-controller;
 194                         #gpio-cells = <2>;
 195                         interrupt-controller;
 196                         #interrupt-cells = <2>;
 197                 };
 198
 199                 gpio8: gpio@48053000 {
 200                         compatible = "ti,omap4-gpio";
 201                         reg = <0x48053000 0x200>;
 202                         interrupts = <0 121 0x4>;
 203                         ti,hwmods = "gpio8";
 204                         gpio-controller;
 205                         #gpio-cells = <2>;
 206                         interrupt-controller;
 207                         #interrupt-cells = <2>;
 208                 };
 209
 210                 gpmc: gpmc@50000000 {
 211                         compatible = "ti,omap4430-gpmc";
 212                         reg = <0x50000000 0x1000>;
 213                         #address-cells = <2>;
 214                         #size-cells = <1>;
 215                         interrupts = <0 20 0x4>;
 216                         gpmc,num-cs = <8>;
 217                         gpmc,num-waitpins = <4>;
 218                         ti,hwmods = "gpmc";
 219                 };
 220
 221                 i2c1: i2c@48070000 {
 222                         compatible = "ti,omap4-i2c";
 223                         reg = <0x48070000 0x100>;
 224                         interrupts = <0 56 0x4>;
 225                         #address-cells = <1>;
 226                         #size-cells = <0>;
 227                         ti,hwmods = "i2c1";
 228                 };
 229
 230                 i2c2: i2c@48072000 {
 231                         compatible = "ti,omap4-i2c";
 232                         reg = <0x48072000 0x100>;
 233                         interrupts = <0 57 0x4>;
 234                         #address-cells = <1>;
 235                         #size-cells = <0>;
 236                         ti,hwmods = "i2c2";
 237                 };
 238
 239                 i2c3: i2c@48060000 {
 240                         compatible = "ti,omap4-i2c";
 241                         reg = <0x48060000 0x100>;
 242                         interrupts = <0 61 0x4>;
 243                         #address-cells = <1>;
 244                         #size-cells = <0>;
 245                         ti,hwmods = "i2c3";
 246                 };
 247
 248                 i2c4: i2c@4807a000 {
 249                         compatible = "ti,omap4-i2c";
 250                         reg = <0x4807a000 0x100>;
 251                         interrupts = <0 62 0x4>;
 252                         #address-cells = <1>;
 253                         #size-cells = <0>;
 254                         ti,hwmods = "i2c4";
 255                 };
 256
 257                 i2c5: i2c@4807c000 {
 258                         compatible = "ti,omap4-i2c";
 259                         reg = <0x4807c000 0x100>;
 260                         interrupts = <0 60 0x4>;
 261                         #address-cells = <1>;
 262                         #size-cells = <0>;
 263                         ti,hwmods = "i2c5";
 264                 };
 265
 266                 mcspi1: spi@48098000 {
 267                         compatible = "ti,omap4-mcspi";
 268                         reg = <0x48098000 0x200>;
 269                         interrupts = <0 65 0x4>;
 270                         #address-cells = <1>;
 271                         #size-cells = <0>;
 272                         ti,hwmods = "mcspi1";
 273                         ti,spi-num-cs = <4>;
 274                         dmas = <&sdma 35>,
 275                                <&sdma 36>,
 276                                <&sdma 37>,
 277                                <&sdma 38>,
 278                                <&sdma 39>,
 279                                <&sdma 40>,
 280                                <&sdma 41>,
 281                                <&sdma 42>;
 282                         dma-names = "tx0", "rx0", "tx1", "rx1",
 283                                     "tx2", "rx2", "tx3", "rx3";
 284                 };
 285
 286                 mcspi2: spi@4809a000 {
 287                         compatible = "ti,omap4-mcspi";
 288                         reg = <0x4809a000 0x200>;
 289                         interrupts = <0 66 0x4>;
 290                         #address-cells = <1>;
 291                         #size-cells = <0>;
 292                         ti,hwmods = "mcspi2";
 293                         ti,spi-num-cs = <2>;
 294                         dmas = <&sdma 43>,
 295                                <&sdma 44>,
 296                                <&sdma 45>,
 297                                <&sdma 46>;
 298                         dma-names = "tx0", "rx0", "tx1", "rx1";
 299                 };
 300
 301                 mcspi3: spi@480b8000 {
 302                         compatible = "ti,omap4-mcspi";
 303                         reg = <0x480b8000 0x200>;
 304                         interrupts = <0 91 0x4>;
 305                         #address-cells = <1>;
 306                         #size-cells = <0>;
 307                         ti,hwmods = "mcspi3";
 308                         ti,spi-num-cs = <2>;
 309                         dmas = <&sdma 15>, <&sdma 16>;
 310                         dma-names = "tx0", "rx0";
 311                 };
 312
 313                 mcspi4: spi@480ba000 {
 314                         compatible = "ti,omap4-mcspi";
 315                         reg = <0x480ba000 0x200>;
 316                         interrupts = <0 48 0x4>;
 317                         #address-cells = <1>;
 318                         #size-cells = <0>;
 319                         ti,hwmods = "mcspi4";
 320                         ti,spi-num-cs = <1>;
 321                         dmas = <&sdma 70>, <&sdma 71>;
 322                         dma-names = "tx0", "rx0";
 323                 };
 324
 325                 uart1: serial@4806a000 {
 326                         compatible = "ti,omap4-uart";
 327                         reg = <0x4806a000 0x100>;
 328                         interrupts = <0 72 0x4>;
 329                         ti,hwmods = "uart1";
 330                         clock-frequency = <48000000>;
 331                 };
 332
 333                 uart2: serial@4806c000 {
 334                         compatible = "ti,omap4-uart";
 335                         reg = <0x4806c000 0x100>;
 336                         interrupts = <0 73 0x4>;
 337                         ti,hwmods = "uart2";
 338                         clock-frequency = <48000000>;
 339                 };
 340
 341                 uart3: serial@48020000 {
 342                         compatible = "ti,omap4-uart";
 343                         reg = <0x48020000 0x100>;
 344                         interrupts = <0 74 0x4>;
 345                         ti,hwmods = "uart3";
 346                         clock-frequency = <48000000>;
 347                 };
 348
 349                 uart4: serial@4806e000 {
 350                         compatible = "ti,omap4-uart";
 351                         reg = <0x4806e000 0x100>;
 352                         interrupts = <0 70 0x4>;
 353                         ti,hwmods = "uart4";
 354                         clock-frequency = <48000000>;
 355                 };
 356
 357                 uart5: serial@48066000 {
 358                         compatible = "ti,omap4-uart";
 359                         reg = <0x48066000 0x100>;
 360                         interrupts = <0 105 0x4>;
 361                         ti,hwmods = "uart5";
 362                         clock-frequency = <48000000>;
 363                 };
 364
 365                 uart6: serial@48068000 {
 366                         compatible = "ti,omap4-uart";
 367                         reg = <0x48068000 0x100>;
 368                         interrupts = <0 106 0x4>;
 369                         ti,hwmods = "uart6";
 370                         clock-frequency = <48000000>;
 371                 };
 372
 373                 mmc1: mmc@4809c000 {
 374                         compatible = "ti,omap4-hsmmc";
 375                         reg = <0x4809c000 0x400>;
 376                         interrupts = <0 83 0x4>;
 377                         ti,hwmods = "mmc1";
 378                         ti,dual-volt;
 379                         ti,needs-special-reset;
 380                         dmas = <&sdma 61>, <&sdma 62>;
 381                         dma-names = "tx", "rx";
 382                 };
 383
 384                 mmc2: mmc@480b4000 {
 385                         compatible = "ti,omap4-hsmmc";
 386                         reg = <0x480b4000 0x400>;
 387                         interrupts = <0 86 0x4>;
 388                         ti,hwmods = "mmc2";
 389                         ti,needs-special-reset;
 390                         dmas = <&sdma 47>, <&sdma 48>;
 391                         dma-names = "tx", "rx";
 392                 };
 393
 394                 mmc3: mmc@480ad000 {
 395                         compatible = "ti,omap4-hsmmc";
 396                         reg = <0x480ad000 0x400>;
 397                         interrupts = <0 94 0x4>;
 398                         ti,hwmods = "mmc3";
 399                         ti,needs-special-reset;
 400                         dmas = <&sdma 77>, <&sdma 78>;
 401                         dma-names = "tx", "rx";
 402                 };
 403
 404                 mmc4: mmc@480d1000 {
 405                         compatible = "ti,omap4-hsmmc";
 406                         reg = <0x480d1000 0x400>;
 407                         interrupts = <0 96 0x4>;
 408                         ti,hwmods = "mmc4";
 409                         ti,needs-special-reset;
 410                         dmas = <&sdma 57>, <&sdma 58>;
 411                         dma-names = "tx", "rx";
 412                 };
 413
 414                 mmc5: mmc@480d5000 {
 415                         compatible = "ti,omap4-hsmmc";
 416                         reg = <0x480d5000 0x400>;
 417                         interrupts = <0 59 0x4>;
 418                         ti,hwmods = "mmc5";
 419                         ti,needs-special-reset;
 420                         dmas = <&sdma 59>, <&sdma 60>;
 421                         dma-names = "tx", "rx";
 422                 };
 423
 424                 keypad: keypad@4ae1c000 {
 425                         compatible = "ti,omap4-keypad";
 426                         ti,hwmods = "kbd";
 427                 };
 428
 429                 mcpdm: mcpdm@40132000 {
 430                         compatible = "ti,omap4-mcpdm";
 431                         reg = <0x40132000 0x7f>, /* MPU private access */
 432                               <0x49032000 0x7f>; /* L3 Interconnect */
 433                         reg-names = "mpu", "dma";
 434                         interrupts = <0 112 0x4>;
 435                         ti,hwmods = "mcpdm";
 436                         dmas = <&sdma 65>,
 437                                <&sdma 66>;
 438                         dma-names = "up_link", "dn_link";
 439                 };
 440
 441                 dmic: dmic@4012e000 {
 442                         compatible = "ti,omap4-dmic";
 443                         reg = <0x4012e000 0x7f>, /* MPU private access */
 444                               <0x4902e000 0x7f>; /* L3 Interconnect */
 445                         reg-names = "mpu", "dma";
 446                         interrupts = <0 114 0x4>;
 447                         ti,hwmods = "dmic";
 448                         dmas = <&sdma 67>;
 449                         dma-names = "up_link";
 450                 };
 451
 452                 mcbsp1: mcbsp@40122000 {
 453                         compatible = "ti,omap4-mcbsp";
 454                         reg = <0x40122000 0xff>, /* MPU private access */
 455                               <0x49022000 0xff>; /* L3 Interconnect */
 456                         reg-names = "mpu", "dma";
 457                         interrupts = <0 17 0x4>;
 458                         interrupt-names = "common";
 459                         ti,buffer-size = <128>;
 460                         ti,hwmods = "mcbsp1";
 461                         dmas = <&sdma 33>,
 462                                <&sdma 34>;
 463                         dma-names = "tx", "rx";
 464                 };
 465
 466                 mcbsp2: mcbsp@40124000 {
 467                         compatible = "ti,omap4-mcbsp";
 468                         reg = <0x40124000 0xff>, /* MPU private access */
 469                               <0x49024000 0xff>; /* L3 Interconnect */
 470                         reg-names = "mpu", "dma";
 471                         interrupts = <0 22 0x4>;
 472                         interrupt-names = "common";
 473                         ti,buffer-size = <128>;
 474                         ti,hwmods = "mcbsp2";
 475                         dmas = <&sdma 17>,
 476                                <&sdma 18>;
 477                         dma-names = "tx", "rx";
 478                 };
 479
 480                 mcbsp3: mcbsp@40126000 {
 481                         compatible = "ti,omap4-mcbsp";
 482                         reg = <0x40126000 0xff>, /* MPU private access */
 483                               <0x49026000 0xff>; /* L3 Interconnect */
 484                         reg-names = "mpu", "dma";
 485                         interrupts = <0 23 0x4>;
 486                         interrupt-names = "common";
 487                         ti,buffer-size = <128>;
 488                         ti,hwmods = "mcbsp3";
 489                         dmas = <&sdma 19>,
 490                                <&sdma 20>;
 491                         dma-names = "tx", "rx";
 492                 };
 493
 494                 timer1: timer@4ae18000 {
 495                         compatible = "ti,omap2-timer";
 496                         reg = <0x4ae18000 0x80>;
 497                         interrupts = <0 37 0x4>;
 498                         ti,hwmods = "timer1";
 499                         ti,timer-alwon;
 500                 };
 501
 502                 timer2: timer@48032000 {
 503                         compatible = "ti,omap2-timer";
 504                         reg = <0x48032000 0x80>;
 505                         interrupts = <0 38 0x4>;
 506                         ti,hwmods = "timer2";
 507                 };
 508
 509                 timer3: timer@48034000 {
 510                         compatible = "ti,omap2-timer";
 511                         reg = <0x48034000 0x80>;
 512                         interrupts = <0 39 0x4>;
 513                         ti,hwmods = "timer3";
 514                 };
 515
 516                 timer4: timer@48036000 {
 517                         compatible = "ti,omap2-timer";
 518                         reg = <0x48036000 0x80>;
 519                         interrupts = <0 40 0x4>;
 520                         ti,hwmods = "timer4";
 521                 };
 522
 523                 timer5: timer@40138000 {
 524                         compatible = "ti,omap2-timer";
 525                         reg = <0x40138000 0x80>,
 526                               <0x49038000 0x80>;
 527                         interrupts = <0 41 0x4>;
 528                         ti,hwmods = "timer5";
 529                         ti,timer-dsp;
 530                 };
 531
 532                 timer6: timer@4013a000 {
 533                         compatible = "ti,omap2-timer";
 534                         reg = <0x4013a000 0x80>,
 535                               <0x4903a000 0x80>;
 536                         interrupts = <0 42 0x4>;
 537                         ti,hwmods = "timer6";
 538                         ti,timer-dsp;
 539                         ti,timer-pwm;
 540                 };
 541
 542                 timer7: timer@4013c000 {
 543                         compatible = "ti,omap2-timer";
 544                         reg = <0x4013c000 0x80>,
 545                               <0x4903c000 0x80>;
 546                         interrupts = <0 43 0x4>;
 547                         ti,hwmods = "timer7";
 548                         ti,timer-dsp;
 549                 };
 550
 551                 timer8: timer@4013e000 {
 552                         compatible = "ti,omap2-timer";
 553                         reg = <0x4013e000 0x80>,
 554                               <0x4903e000 0x80>;
 555                         interrupts = <0 44 0x4>;
 556                         ti,hwmods = "timer8";
 557                         ti,timer-dsp;
 558                         ti,timer-pwm;
 559                 };
 560
 561                 timer9: timer@4803e000 {
 562                         compatible = "ti,omap2-timer";
 563                         reg = <0x4803e000 0x80>;
 564                         interrupts = <0 45 0x4>;
 565                         ti,hwmods = "timer9";
 566                 };
 567
 568                 timer10: timer@48086000 {
 569                         compatible = "ti,omap2-timer";
 570                         reg = <0x48086000 0x80>;
 571                         interrupts = <0 46 0x4>;
 572                         ti,hwmods = "timer10";
 573                 };
 574
 575                 timer11: timer@48088000 {
 576                         compatible = "ti,omap2-timer";
 577                         reg = <0x48088000 0x80>;
 578                         interrupts = <0 47 0x4>;
 579                         ti,hwmods = "timer11";
 580                         ti,timer-pwm;
 581                 };
 582
 583                 emif1: emif@0x4c000000 {
 584                         compatible      = "ti,emif-4d5";
 585                         ti,hwmods       = "emif1";
 586                         phy-type        = <2>; /* DDR PHY type: Intelli PHY */
 587                         reg = <0x4c000000 0x400>;
 588                         interrupts = <0 110 0x4>;
 589                         hw-caps-read-idle-ctrl;
 590                         hw-caps-ll-interface;
 591                         hw-caps-temp-alert;
 592                 };
 593
 594                 emif2: emif@0x4d000000 {
 595                         compatible      = "ti,emif-4d5";
 596                         ti,hwmods       = "emif2";
 597                         phy-type        = <2>; /* DDR PHY type: Intelli PHY */
 598                         reg = <0x4d000000 0x400>;
 599                         interrupts = <0 111 0x4>;
 600                         hw-caps-read-idle-ctrl;
 601                         hw-caps-ll-interface;
 602                         hw-caps-temp-alert;
 603                 };
 604
 605                 omap_control_usb: omap-control-usb@4a002300 {
 606                         compatible = "ti,omap-control-usb";
 607                         reg = <0x4a002300 0x4>,
 608                               <0x4a002370 0x4>;
 609                         reg-names = "control_dev_conf", "phy_power_usb";
 610                         ti,type = <2>;
 611                 };
 612
 613                 omap_dwc3@4a020000 {
 614                         compatible = "ti,dwc3";
 615                         ti,hwmods = "usb_otg_ss";
 616                         reg = <0x4a020000 0x1000>;
 617                         interrupts = <0 93 4>;
 618                         #address-cells = <1>;
 619                         #size-cells = <1>;
 620                         utmi-mode = <2>;
 621                         ranges;
 622                         dwc3@4a030000 {
 623                                 compatible = "synopsys,dwc3";
 624                                 reg = <0x4a030000 0x1000>;
 625                                 interrupts = <0 92 4>;
 626                                 usb-phy = <&usb2_phy>, <&usb3_phy>;
 627                                 tx-fifo-resize;
 628                         };
 629                 };
 630
 631                 ocp2scp {
 632                         compatible = "ti,omap-ocp2scp";
 633                         #address-cells = <1>;
 634                         #size-cells = <1>;
 635                         ranges;
 636                         ti,hwmods = "ocp2scp1";
 637                         usb2_phy: usb2phy@4a084000 {
 638                                 compatible = "ti,omap-usb2";
 639                                 reg = <0x4a084000 0x7c>;
 640                                 ctrl-module = <&omap_control_usb>;
 641                         };
 642
 643                         usb3_phy: usb3phy@4a084400 {
 644                                 compatible = "ti,omap-usb3";
 645                                 reg = <0x4a084400 0x80>,
 646                                       <0x4a084800 0x64>,
 647                                       <0x4a084c00 0x40>;
 648                                 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 649                                 ctrl-module = <&omap_control_usb>;
 650                         };
 651                 };
 652         };
 653 };