2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
22 d-cache-line-size = <32>;
23 i-cache-line-size = <32>;
24 d-cache-size = <32768>;
25 i-cache-size = <32768>;
27 timebase-frequency = <0>;
29 clock-frequency = <0>;
34 compatible = "simple-bus";
37 ranges = <0x40000000 0x40000000 0x80000000>;
39 l2-cache-controller@80040000 {
40 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
41 reg = <0x80040000 0x1000>;
43 arm,tag-latency = <1 1 1>;
44 arm,data-latency = <1 1 1>;
45 arm,filter-ranges = <0 0x40000000>;
48 intc: interrupt-controller@80020000 {
49 #interrupt-cells = <1>;
51 compatible = "sirf,prima2-intc";
52 reg = <0x80020000 0x1000>;
56 compatible = "simple-bus";
59 ranges = <0x88000000 0x88000000 0x40000>;
61 clock-controller@88000000 {
62 compatible = "sirf,prima2-clkc";
63 reg = <0x88000000 0x1000>;
67 reset-controller@88010000 {
68 compatible = "sirf,prima2-rstc";
69 reg = <0x88010000 0x1000>;
72 rsc-controller@88020000 {
73 compatible = "sirf,prima2-rsc";
74 reg = <0x88020000 0x1000>;
79 compatible = "simple-bus";
82 ranges = <0x90000000 0x90000000 0x10000>;
84 memory-controller@90000000 {
85 compatible = "sirf,prima2-memc";
86 reg = <0x90000000 0x10000>;
92 compatible = "simple-bus";
95 ranges = <0x90010000 0x90010000 0x30000>;
98 compatible = "sirf,prima2-lcd";
99 reg = <0x90010000 0x20000>;
104 compatible = "sirf,prima2-vpp";
105 reg = <0x90020000 0x10000>;
111 compatible = "simple-bus";
112 #address-cells = <1>;
114 ranges = <0x98000000 0x98000000 0x8000000>;
117 compatible = "powervr,sgx531";
118 reg = <0x98000000 0x8000000>;
124 compatible = "simple-bus";
125 #address-cells = <1>;
127 ranges = <0xa0000000 0xa0000000 0x8000000>;
129 multimedia@a0000000 {
130 compatible = "sirf,prima2-video-codec";
131 reg = <0xa0000000 0x8000000>;
137 compatible = "simple-bus";
138 #address-cells = <1>;
140 ranges = <0xa8000000 0xa8000000 0x2000000>;
143 compatible = "sirf,prima2-dspif";
144 reg = <0xa8000000 0x10000>;
149 compatible = "sirf,prima2-gps";
150 reg = <0xa8010000 0x10000>;
155 compatible = "sirf,prima2-dsp";
156 reg = <0xa9000000 0x1000000>;
162 compatible = "simple-bus";
163 #address-cells = <1>;
165 ranges = <0xb0000000 0xb0000000 0x180000>;
168 compatible = "sirf,prima2-tick";
169 reg = <0xb0020000 0x1000>;
174 compatible = "sirf,prima2-nand";
175 reg = <0xb0030000 0x10000>;
180 compatible = "sirf,prima2-audio";
181 reg = <0xb0040000 0x10000>;
185 uart0: uart@b0050000 {
187 compatible = "sirf,prima2-uart";
188 reg = <0xb0050000 0x10000>;
192 uart1: uart@b0060000 {
194 compatible = "sirf,prima2-uart";
195 reg = <0xb0060000 0x10000>;
199 uart2: uart@b0070000 {
201 compatible = "sirf,prima2-uart";
202 reg = <0xb0070000 0x10000>;
208 compatible = "sirf,prima2-usp";
209 reg = <0xb0080000 0x10000>;
215 compatible = "sirf,prima2-usp";
216 reg = <0xb0090000 0x10000>;
222 compatible = "sirf,prima2-usp";
223 reg = <0xb00a0000 0x10000>;
227 dmac0: dma-controller@b00b0000 {
229 compatible = "sirf,prima2-dmac";
230 reg = <0xb00b0000 0x10000>;
234 dmac1: dma-controller@b0160000 {
236 compatible = "sirf,prima2-dmac";
237 reg = <0xb0160000 0x10000>;
242 compatible = "sirf,prima2-vip";
243 reg = <0xb00C0000 0x10000>;
248 compatible = "sirf,prima2-spi";
249 reg = <0xb00d0000 0x10000>;
255 compatible = "sirf,prima2-spi";
256 reg = <0xb0170000 0x10000>;
262 compatible = "sirf,prima2-i2c";
263 reg = <0xb00e0000 0x10000>;
269 compatible = "sirf,prima2-i2c";
270 reg = <0xb00f0000 0x10000>;
275 compatible = "sirf,prima2-tsc";
276 reg = <0xb0110000 0x10000>;
280 gpio: pinctrl@b0120000 {
282 #interrupt-cells = <2>;
283 compatible = "sirf,prima2-pinctrl";
284 reg = <0xb0120000 0x10000>;
285 interrupts = <43 44 45 46 47>;
287 interrupt-controller;
289 lcd_16pins_a: lcd0@0 {
291 sirf,pins = "lcd_16bitsgrp";
292 sirf,function = "lcd_16bits";
295 lcd_18pins_a: lcd0@1 {
297 sirf,pins = "lcd_18bitsgrp";
298 sirf,function = "lcd_18bits";
301 lcd_24pins_a: lcd0@2 {
303 sirf,pins = "lcd_24bitsgrp";
304 sirf,function = "lcd_24bits";
307 lcdrom_pins_a: lcdrom0@0 {
309 sirf,pins = "lcdromgrp";
310 sirf,function = "lcdrom";
313 uart0_pins_a: uart0@0 {
315 sirf,pins = "uart0grp";
316 sirf,function = "uart0";
319 uart1_pins_a: uart1@0 {
321 sirf,pins = "uart1grp";
322 sirf,function = "uart1";
325 uart2_pins_a: uart2@0 {
327 sirf,pins = "uart2grp";
328 sirf,function = "uart2";
331 uart2_noflow_pins_a: uart2@1 {
333 sirf,pins = "uart2_nostreamctrlgrp";
334 sirf,function = "uart2_nostreamctrl";
337 spi0_pins_a: spi0@0 {
339 sirf,pins = "spi0grp";
340 sirf,function = "spi0";
343 spi1_pins_a: spi1@0 {
345 sirf,pins = "spi1grp";
346 sirf,function = "spi1";
349 i2c0_pins_a: i2c0@0 {
351 sirf,pins = "i2c0grp";
352 sirf,function = "i2c0";
355 i2c1_pins_a: i2c1@0 {
357 sirf,pins = "i2c1grp";
358 sirf,function = "i2c1";
361 pwm0_pins_a: pwm0@0 {
363 sirf,pins = "pwm0grp";
364 sirf,function = "pwm0";
367 pwm1_pins_a: pwm1@0 {
369 sirf,pins = "pwm1grp";
370 sirf,function = "pwm1";
373 pwm2_pins_a: pwm2@0 {
375 sirf,pins = "pwm2grp";
376 sirf,function = "pwm2";
379 pwm3_pins_a: pwm3@0 {
381 sirf,pins = "pwm3grp";
382 sirf,function = "pwm3";
387 sirf,pins = "gpsgrp";
388 sirf,function = "gps";
393 sirf,pins = "vipgrp";
394 sirf,function = "vip";
397 sdmmc0_pins_a: sdmmc0@0 {
399 sirf,pins = "sdmmc0grp";
400 sirf,function = "sdmmc0";
403 sdmmc1_pins_a: sdmmc1@0 {
405 sirf,pins = "sdmmc1grp";
406 sirf,function = "sdmmc1";
409 sdmmc2_pins_a: sdmmc2@0 {
411 sirf,pins = "sdmmc2grp";
412 sirf,function = "sdmmc2";
415 sdmmc3_pins_a: sdmmc3@0 {
417 sirf,pins = "sdmmc3grp";
418 sirf,function = "sdmmc3";
421 sdmmc4_pins_a: sdmmc4@0 {
423 sirf,pins = "sdmmc4grp";
424 sirf,function = "sdmmc4";
427 sdmmc5_pins_a: sdmmc5@0 {
429 sirf,pins = "sdmmc5grp";
430 sirf,function = "sdmmc5";
435 sirf,pins = "i2sgrp";
436 sirf,function = "i2s";
439 ac97_pins_a: ac97@0 {
441 sirf,pins = "ac97grp";
442 sirf,function = "ac97";
445 nand_pins_a: nand@0 {
447 sirf,pins = "nandgrp";
448 sirf,function = "nand";
451 usp0_pins_a: usp0@0 {
453 sirf,pins = "usp0grp";
454 sirf,function = "usp0";
457 usp1_pins_a: usp1@0 {
459 sirf,pins = "usp1grp";
460 sirf,function = "usp1";
463 usp2_pins_a: usp2@0 {
465 sirf,pins = "usp2grp";
466 sirf,function = "usp2";
469 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
471 sirf,pins = "usb0_utmi_drvbusgrp";
472 sirf,function = "usb0_utmi_drvbus";
475 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
477 sirf,pins = "usb1_utmi_drvbusgrp";
478 sirf,function = "usb1_utmi_drvbus";
481 warm_rst_pins_a: warm_rst@0 {
483 sirf,pins = "warm_rstgrp";
484 sirf,function = "warm_rst";
487 pulse_count_pins_a: pulse_count@0 {
489 sirf,pins = "pulse_countgrp";
490 sirf,function = "pulse_count";
493 cko0_rst_pins_a: cko0_rst@0 {
495 sirf,pins = "cko0_rstgrp";
496 sirf,function = "cko0_rst";
499 cko1_rst_pins_a: cko1_rst@0 {
501 sirf,pins = "cko1_rstgrp";
502 sirf,function = "cko1_rst";
508 compatible = "sirf,prima2-pwm";
509 reg = <0xb0130000 0x10000>;
513 compatible = "sirf,prima2-efuse";
514 reg = <0xb0140000 0x10000>;
518 compatible = "sirf,prima2-pulsec";
519 reg = <0xb0150000 0x10000>;
524 compatible = "sirf,prima2-pciiobg", "simple-bus";
525 #address-cells = <1>;
527 ranges = <0x56000000 0x56000000 0x1b00000>;
529 sd0: sdhci@56000000 {
531 compatible = "sirf,prima2-sdhc";
532 reg = <0x56000000 0x100000>;
536 sd1: sdhci@56100000 {
538 compatible = "sirf,prima2-sdhc";
539 reg = <0x56100000 0x100000>;
543 sd2: sdhci@56200000 {
545 compatible = "sirf,prima2-sdhc";
546 reg = <0x56200000 0x100000>;
550 sd3: sdhci@56300000 {
552 compatible = "sirf,prima2-sdhc";
553 reg = <0x56300000 0x100000>;
557 sd4: sdhci@56400000 {
559 compatible = "sirf,prima2-sdhc";
560 reg = <0x56400000 0x100000>;
564 sd5: sdhci@56500000 {
566 compatible = "sirf,prima2-sdhc";
567 reg = <0x56500000 0x100000>;
572 compatible = "sirf,prima2-pcicp";
573 reg = <0x57900000 0x100000>;
577 rom-interface@57a00000 {
578 compatible = "sirf,prima2-romif";
579 reg = <0x57a00000 0x100000>;
585 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
586 #address-cells = <1>;
588 reg = <0x80030000 0x10000>;
591 compatible = "sirf,prima2-gpsrtc";
592 reg = <0x1000 0x1000>;
593 interrupts = <55 56 57>;
597 compatible = "sirf,prima2-sysrtc";
598 reg = <0x2000 0x1000>;
599 interrupts = <52 53 54>;
603 compatible = "sirf,prima2-pwrc";
604 reg = <0x3000 0x1000>;
610 compatible = "simple-bus";
611 #address-cells = <1>;
613 ranges = <0xb8000000 0xb8000000 0x40000>;
616 compatible = "chipidea,ci13611a-prima2";
617 reg = <0xb8000000 0x10000>;
622 compatible = "chipidea,ci13611a-prima2";
623 reg = <0xb8010000 0x10000>;
628 compatible = "synopsys,dwc-ahsata";
629 reg = <0xb8020000 0x10000>;
634 compatible = "sirf,prima2-security";
635 reg = <0xb8030000 0x10000>;