2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
40 clock-latency = <150000>;
45 compatible = "simple-bus";
48 ranges = <0x40000000 0x40000000 0x80000000>;
50 l2-cache-controller@80040000 {
51 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
52 reg = <0x80040000 0x1000>;
54 arm,tag-latency = <1 1 1>;
55 arm,data-latency = <1 1 1>;
56 arm,filter-ranges = <0 0x40000000>;
59 intc: interrupt-controller@80020000 {
60 #interrupt-cells = <1>;
62 compatible = "sirf,prima2-intc";
63 reg = <0x80020000 0x1000>;
67 compatible = "simple-bus";
70 ranges = <0x88000000 0x88000000 0x40000>;
72 clks: clock-controller@88000000 {
73 compatible = "sirf,prima2-clkc";
74 reg = <0x88000000 0x1000>;
79 rstc: reset-controller@88010000 {
80 compatible = "sirf,prima2-rstc";
81 reg = <0x88010000 0x1000>;
85 rsc-controller@88020000 {
86 compatible = "sirf,prima2-rsc";
87 reg = <0x88020000 0x1000>;
91 compatible = "sirf,prima2-cphifbg";
92 reg = <0x88030000 0x1000>;
98 compatible = "simple-bus";
101 ranges = <0x90000000 0x90000000 0x10000>;
103 memory-controller@90000000 {
104 compatible = "sirf,prima2-memc";
105 reg = <0x90000000 0x2000>;
111 compatible = "sirf,prima2-memcmon";
112 reg = <0x90002000 0x200>;
119 compatible = "simple-bus";
120 #address-cells = <1>;
122 ranges = <0x90010000 0x90010000 0x30000>;
125 compatible = "sirf,prima2-lcd";
126 reg = <0x90010000 0x20000>;
131 compatible = "sirf,prima2-vpp";
132 reg = <0x90020000 0x10000>;
139 compatible = "simple-bus";
140 #address-cells = <1>;
142 ranges = <0x98000000 0x98000000 0x8000000>;
145 compatible = "powervr,sgx531";
146 reg = <0x98000000 0x8000000>;
153 compatible = "simple-bus";
154 #address-cells = <1>;
156 ranges = <0xa0000000 0xa0000000 0x8000000>;
158 multimedia@a0000000 {
159 compatible = "sirf,prima2-video-codec";
160 reg = <0xa0000000 0x8000000>;
167 compatible = "simple-bus";
168 #address-cells = <1>;
170 ranges = <0xa8000000 0xa8000000 0x2000000>;
173 compatible = "sirf,prima2-dspif";
174 reg = <0xa8000000 0x10000>;
179 compatible = "sirf,prima2-gps";
180 reg = <0xa8010000 0x10000>;
186 compatible = "sirf,prima2-dsp";
187 reg = <0xa9000000 0x1000000>;
194 compatible = "simple-bus";
195 #address-cells = <1>;
197 ranges = <0xb0000000 0xb0000000 0x180000>,
198 <0x56000000 0x56000000 0x1b00000>;
201 compatible = "sirf,prima2-tick";
202 reg = <0xb0020000 0x1000>;
207 compatible = "sirf,prima2-nand";
208 reg = <0xb0030000 0x10000>;
214 compatible = "sirf,prima2-audio";
215 reg = <0xb0040000 0x10000>;
220 uart0: uart@b0050000 {
222 compatible = "sirf,prima2-uart";
223 reg = <0xb0050000 0x1000>;
227 dmas = <&dmac1 5>, <&dmac0 2>;
228 dma-names = "rx", "tx";
231 uart1: uart@b0060000 {
233 compatible = "sirf,prima2-uart";
234 reg = <0xb0060000 0x1000>;
240 uart2: uart@b0070000 {
242 compatible = "sirf,prima2-uart";
243 reg = <0xb0070000 0x1000>;
247 dmas = <&dmac0 6>, <&dmac0 7>;
248 dma-names = "rx", "tx";
253 compatible = "sirf,prima2-usp";
254 reg = <0xb0080000 0x10000>;
258 dmas = <&dmac1 1>, <&dmac1 2>;
259 dma-names = "rx", "tx";
264 compatible = "sirf,prima2-usp";
265 reg = <0xb0090000 0x10000>;
269 dmas = <&dmac0 14>, <&dmac0 15>;
270 dma-names = "rx", "tx";
275 compatible = "sirf,prima2-usp";
276 reg = <0xb00a0000 0x10000>;
280 dmas = <&dmac0 10>, <&dmac0 11>;
281 dma-names = "rx", "tx";
284 dmac0: dma-controller@b00b0000 {
286 compatible = "sirf,prima2-dmac";
287 reg = <0xb00b0000 0x10000>;
293 dmac1: dma-controller@b0160000 {
295 compatible = "sirf,prima2-dmac";
296 reg = <0xb0160000 0x10000>;
303 compatible = "sirf,prima2-vip";
304 reg = <0xb00C0000 0x10000>;
307 sirf,vip-dma-rx-channel = <16>;
312 compatible = "sirf,prima2-spi";
313 reg = <0xb00d0000 0x10000>;
315 sirf,spi-num-chipselects = <1>;
316 sirf,spi-dma-rx-channel = <25>;
317 sirf,spi-dma-tx-channel = <20>;
318 #address-cells = <1>;
326 compatible = "sirf,prima2-spi";
327 reg = <0xb0170000 0x10000>;
329 sirf,spi-num-chipselects = <1>;
330 sirf,spi-dma-rx-channel = <12>;
331 sirf,spi-dma-tx-channel = <13>;
332 #address-cells = <1>;
340 compatible = "sirf,prima2-i2c";
341 reg = <0xb00e0000 0x10000>;
344 #address-cells = <1>;
350 compatible = "sirf,prima2-i2c";
351 reg = <0xb00f0000 0x10000>;
354 #address-cells = <1>;
359 compatible = "sirf,prima2-tsc";
360 reg = <0xb0110000 0x10000>;
365 gpio: pinctrl@b0120000 {
367 #interrupt-cells = <2>;
368 compatible = "sirf,prima2-pinctrl";
369 reg = <0xb0120000 0x10000>;
370 interrupts = <43 44 45 46 47>;
372 interrupt-controller;
374 lcd_16pins_a: lcd0@0 {
376 sirf,pins = "lcd_16bitsgrp";
377 sirf,function = "lcd_16bits";
380 lcd_18pins_a: lcd0@1 {
382 sirf,pins = "lcd_18bitsgrp";
383 sirf,function = "lcd_18bits";
386 lcd_24pins_a: lcd0@2 {
388 sirf,pins = "lcd_24bitsgrp";
389 sirf,function = "lcd_24bits";
392 lcdrom_pins_a: lcdrom0@0 {
394 sirf,pins = "lcdromgrp";
395 sirf,function = "lcdrom";
398 uart0_pins_a: uart0@0 {
400 sirf,pins = "uart0grp";
401 sirf,function = "uart0";
404 uart0_noflow_pins_a: uart0@1 {
406 sirf,pins = "uart0_nostreamctrlgrp";
407 sirf,function = "uart0_nostreamctrl";
410 uart1_pins_a: uart1@0 {
412 sirf,pins = "uart1grp";
413 sirf,function = "uart1";
416 uart2_pins_a: uart2@0 {
418 sirf,pins = "uart2grp";
419 sirf,function = "uart2";
422 uart2_noflow_pins_a: uart2@1 {
424 sirf,pins = "uart2_nostreamctrlgrp";
425 sirf,function = "uart2_nostreamctrl";
428 spi0_pins_a: spi0@0 {
430 sirf,pins = "spi0grp";
431 sirf,function = "spi0";
434 spi1_pins_a: spi1@0 {
436 sirf,pins = "spi1grp";
437 sirf,function = "spi1";
440 i2c0_pins_a: i2c0@0 {
442 sirf,pins = "i2c0grp";
443 sirf,function = "i2c0";
446 i2c1_pins_a: i2c1@0 {
448 sirf,pins = "i2c1grp";
449 sirf,function = "i2c1";
452 pwm0_pins_a: pwm0@0 {
454 sirf,pins = "pwm0grp";
455 sirf,function = "pwm0";
458 pwm1_pins_a: pwm1@0 {
460 sirf,pins = "pwm1grp";
461 sirf,function = "pwm1";
464 pwm2_pins_a: pwm2@0 {
466 sirf,pins = "pwm2grp";
467 sirf,function = "pwm2";
470 pwm3_pins_a: pwm3@0 {
472 sirf,pins = "pwm3grp";
473 sirf,function = "pwm3";
478 sirf,pins = "gpsgrp";
479 sirf,function = "gps";
484 sirf,pins = "vipgrp";
485 sirf,function = "vip";
488 sdmmc0_pins_a: sdmmc0@0 {
490 sirf,pins = "sdmmc0grp";
491 sirf,function = "sdmmc0";
494 sdmmc1_pins_a: sdmmc1@0 {
496 sirf,pins = "sdmmc1grp";
497 sirf,function = "sdmmc1";
500 sdmmc2_pins_a: sdmmc2@0 {
502 sirf,pins = "sdmmc2grp";
503 sirf,function = "sdmmc2";
506 sdmmc3_pins_a: sdmmc3@0 {
508 sirf,pins = "sdmmc3grp";
509 sirf,function = "sdmmc3";
512 sdmmc4_pins_a: sdmmc4@0 {
514 sirf,pins = "sdmmc4grp";
515 sirf,function = "sdmmc4";
518 sdmmc5_pins_a: sdmmc5@0 {
520 sirf,pins = "sdmmc5grp";
521 sirf,function = "sdmmc5";
526 sirf,pins = "i2sgrp";
527 sirf,function = "i2s";
530 ac97_pins_a: ac97@0 {
532 sirf,pins = "ac97grp";
533 sirf,function = "ac97";
536 nand_pins_a: nand@0 {
538 sirf,pins = "nandgrp";
539 sirf,function = "nand";
542 usp0_pins_a: usp0@0 {
544 sirf,pins = "usp0grp";
545 sirf,function = "usp0";
548 usp0_uart_nostreamctrl_pins_a: usp0@1 {
551 "usp0_uart_nostreamctrl_grp";
553 "usp0_uart_nostreamctrl";
556 usp0_only_utfs_pins_a: usp0@2 {
558 sirf,pins = "usp0_only_utfs_grp";
559 sirf,function = "usp0_only_utfs";
562 usp0_only_urfs_pins_a: usp0@3 {
564 sirf,pins = "usp0_only_urfs_grp";
565 sirf,function = "usp0_only_urfs";
568 usp1_pins_a: usp1@0 {
570 sirf,pins = "usp1grp";
571 sirf,function = "usp1";
574 usp1_uart_nostreamctrl_pins_a: usp1@1 {
577 "usp1_uart_nostreamctrl_grp";
579 "usp1_uart_nostreamctrl";
582 usp2_pins_a: usp2@0 {
584 sirf,pins = "usp2grp";
585 sirf,function = "usp2";
588 usp2_uart_nostreamctrl_pins_a: usp2@1 {
591 "usp2_uart_nostreamctrl_grp";
593 "usp2_uart_nostreamctrl";
596 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
598 sirf,pins = "usb0_utmi_drvbusgrp";
599 sirf,function = "usb0_utmi_drvbus";
602 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
604 sirf,pins = "usb1_utmi_drvbusgrp";
605 sirf,function = "usb1_utmi_drvbus";
608 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
610 sirf,pins = "usb1_dp_dngrp";
611 sirf,function = "usb1_dp_dn";
614 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
615 uart1_route_io_usb1 {
616 sirf,pins = "uart1_route_io_usb1grp";
617 sirf,function = "uart1_route_io_usb1";
620 warm_rst_pins_a: warm_rst@0 {
622 sirf,pins = "warm_rstgrp";
623 sirf,function = "warm_rst";
626 pulse_count_pins_a: pulse_count@0 {
628 sirf,pins = "pulse_countgrp";
629 sirf,function = "pulse_count";
632 cko0_pins_a: cko0@0 {
634 sirf,pins = "cko0grp";
635 sirf,function = "cko0";
638 cko1_pins_a: cko1@0 {
640 sirf,pins = "cko1grp";
641 sirf,function = "cko1";
647 compatible = "sirf,prima2-pwm";
648 reg = <0xb0130000 0x10000>;
653 compatible = "sirf,prima2-efuse";
654 reg = <0xb0140000 0x10000>;
659 compatible = "sirf,prima2-pulsec";
660 reg = <0xb0150000 0x10000>;
666 compatible = "sirf,prima2-pciiobg", "simple-bus";
667 #address-cells = <1>;
669 ranges = <0x56000000 0x56000000 0x1b00000>;
671 sd0: sdhci@56000000 {
673 compatible = "sirf,prima2-sdhc";
674 reg = <0x56000000 0x100000>;
681 sd1: sdhci@56100000 {
683 compatible = "sirf,prima2-sdhc";
684 reg = <0x56100000 0x100000>;
691 sd2: sdhci@56200000 {
693 compatible = "sirf,prima2-sdhc";
694 reg = <0x56200000 0x100000>;
700 sd3: sdhci@56300000 {
702 compatible = "sirf,prima2-sdhc";
703 reg = <0x56300000 0x100000>;
709 sd4: sdhci@56400000 {
711 compatible = "sirf,prima2-sdhc";
712 reg = <0x56400000 0x100000>;
718 sd5: sdhci@56500000 {
720 compatible = "sirf,prima2-sdhc";
721 reg = <0x56500000 0x100000>;
727 compatible = "sirf,prima2-pcicp";
728 reg = <0x57900000 0x100000>;
732 rom-interface@57a00000 {
733 compatible = "sirf,prima2-romif";
734 reg = <0x57a00000 0x100000>;
740 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
741 #address-cells = <1>;
743 reg = <0x80030000 0x10000>;
746 compatible = "sirf,prima2-gpsrtc";
747 reg = <0x1000 0x1000>;
748 interrupts = <55 56 57>;
752 compatible = "sirf,prima2-sysrtc";
753 reg = <0x2000 0x1000>;
754 interrupts = <52 53 54>;
758 compatible = "sirf,prima2-minigpsrtc";
759 reg = <0x2000 0x1000>;
764 compatible = "sirf,prima2-pwrc";
765 reg = <0x3000 0x1000>;
771 compatible = "simple-bus";
772 #address-cells = <1>;
774 ranges = <0xb8000000 0xb8000000 0x40000>;
777 compatible = "chipidea,ci13611a-prima2";
778 reg = <0xb8000000 0x10000>;
784 compatible = "chipidea,ci13611a-prima2";
785 reg = <0xb8010000 0x10000>;
791 compatible = "synopsys,dwc-ahsata";
792 reg = <0xb8020000 0x10000>;
797 compatible = "sirf,prima2-security";
798 reg = <0xb8030000 0x10000>;