3 #include "skeleton.dtsi"
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
6 #include <dt-bindings/soc/qcom,gsbi.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 model = "Qualcomm APQ8064";
11 compatible = "qcom,apq8064";
12 interrupt-parent = <&intc>;
19 compatible = "qcom,krait";
20 enable-method = "qcom,kpss-acc-v1";
23 next-level-cache = <&L2>;
29 compatible = "qcom,krait";
30 enable-method = "qcom,kpss-acc-v1";
33 next-level-cache = <&L2>;
39 compatible = "qcom,krait";
40 enable-method = "qcom,kpss-acc-v1";
43 next-level-cache = <&L2>;
49 compatible = "qcom,krait";
50 enable-method = "qcom,kpss-acc-v1";
53 next-level-cache = <&L2>;
65 compatible = "qcom,krait-pmu";
66 interrupts = <1 10 0x304>;
73 compatible = "simple-bus";
75 tlmm_pinmux: pinctrl@800000 {
76 compatible = "qcom,apq8064-pinctrl";
77 reg = <0x800000 0x4000>;
82 #interrupt-cells = <2>;
83 interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&ps_hold>;
88 sdc4_gpios: sdc4-gpios {
90 pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
103 intc: interrupt-controller@2000000 {
104 compatible = "qcom,msm-qgic2";
105 interrupt-controller;
106 #interrupt-cells = <3>;
107 reg = <0x02000000 0x1000>,
112 compatible = "qcom,kpss-timer", "qcom,msm-timer";
113 interrupts = <1 1 0x301>,
116 reg = <0x0200a000 0x100>;
117 clock-frequency = <27000000>,
119 cpu-offset = <0x80000>;
122 acc0: clock-controller@2088000 {
123 compatible = "qcom,kpss-acc-v1";
124 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
127 acc1: clock-controller@2098000 {
128 compatible = "qcom,kpss-acc-v1";
129 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
132 acc2: clock-controller@20a8000 {
133 compatible = "qcom,kpss-acc-v1";
134 reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;
137 acc3: clock-controller@20b8000 {
138 compatible = "qcom,kpss-acc-v1";
139 reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;
142 saw0: regulator@2089000 {
143 compatible = "qcom,saw2";
144 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
148 saw1: regulator@2099000 {
149 compatible = "qcom,saw2";
150 reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
154 saw2: regulator@20a9000 {
155 compatible = "qcom,saw2";
156 reg = <0x020a9000 0x1000>, <0x02009000 0x1000>;
160 saw3: regulator@20b9000 {
161 compatible = "qcom,saw2";
162 reg = <0x020b9000 0x1000>, <0x02009000 0x1000>;
166 gsbi1: gsbi@12440000 {
168 compatible = "qcom,gsbi-v1.0.0";
169 reg = <0x12440000 0x100>;
170 clocks = <&gcc GSBI1_H_CLK>;
171 clock-names = "iface";
172 #address-cells = <1>;
177 compatible = "qcom,i2c-qup-v1.1.1";
178 reg = <0x12460000 0x1000>;
179 interrupts = <0 194 IRQ_TYPE_NONE>;
180 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
181 clock-names = "core", "iface";
182 #address-cells = <1>;
187 gsbi2: gsbi@12480000 {
189 compatible = "qcom,gsbi-v1.0.0";
190 reg = <0x12480000 0x100>;
191 clocks = <&gcc GSBI2_H_CLK>;
192 clock-names = "iface";
193 #address-cells = <1>;
198 compatible = "qcom,i2c-qup-v1.1.1";
199 reg = <0x124a0000 0x1000>;
200 interrupts = <0 196 IRQ_TYPE_NONE>;
201 clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
202 clock-names = "core", "iface";
203 #address-cells = <1>;
208 gsbi7: gsbi@16600000 {
210 compatible = "qcom,gsbi-v1.0.0";
211 reg = <0x16600000 0x100>;
212 clocks = <&gcc GSBI7_H_CLK>;
213 clock-names = "iface";
214 #address-cells = <1>;
219 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
220 reg = <0x16640000 0x1000>,
222 interrupts = <0 158 0x0>;
223 clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
224 clock-names = "core", "iface";
230 compatible = "qcom,ssbi";
231 reg = <0x00500000 0x1000>;
232 qcom,controller-type = "pmic-arbiter";
235 gcc: clock-controller@900000 {
236 compatible = "qcom,gcc-apq8064";
237 reg = <0x00900000 0x4000>;
242 mmcc: clock-controller@4000000 {
243 compatible = "qcom,mmcc-apq8064";
244 reg = <0x4000000 0x1000>;
249 /* Temporary fixed regulator */
250 vsdcc_fixed: vsdcc-regulator {
251 compatible = "regulator-fixed";
252 regulator-name = "SDCC Power";
253 regulator-min-microvolt = <2700000>;
254 regulator-max-microvolt = <2700000>;
258 sdcc1bam:dma@12402000{
259 compatible = "qcom,bam-v1.3.0";
260 reg = <0x12402000 0x8000>;
261 interrupts = <0 98 0>;
262 clocks = <&gcc SDC1_H_CLK>;
263 clock-names = "bam_clk";
268 sdcc3bam:dma@12182000{
269 compatible = "qcom,bam-v1.3.0";
270 reg = <0x12182000 0x8000>;
271 interrupts = <0 96 0>;
272 clocks = <&gcc SDC3_H_CLK>;
273 clock-names = "bam_clk";
278 sdcc4bam:dma@121c2000{
279 compatible = "qcom,bam-v1.3.0";
280 reg = <0x121c2000 0x8000>;
281 interrupts = <0 95 0>;
282 clocks = <&gcc SDC4_H_CLK>;
283 clock-names = "bam_clk";
289 compatible = "arm,amba-bus";
290 #address-cells = <1>;
293 sdcc1: sdcc@12400000 {
295 compatible = "arm,pl18x", "arm,primecell";
296 arm,primecell-periphid = <0x00051180>;
297 reg = <0x12400000 0x2000>;
298 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
299 interrupt-names = "cmd_irq";
300 clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
301 clock-names = "mclk", "apb_pclk";
303 max-frequency = <96000000>;
307 vmmc-supply = <&vsdcc_fixed>;
308 dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
309 dma-names = "tx", "rx";
312 sdcc3: sdcc@12180000 {
313 compatible = "arm,pl18x", "arm,primecell";
314 arm,primecell-periphid = <0x00051180>;
316 reg = <0x12180000 0x2000>;
317 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
318 interrupt-names = "cmd_irq";
319 clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
320 clock-names = "mclk", "apb_pclk";
324 max-frequency = <192000000>;
326 vmmc-supply = <&vsdcc_fixed>;
327 dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
328 dma-names = "tx", "rx";
331 sdcc4: sdcc@121c0000 {
332 compatible = "arm,pl18x", "arm,primecell";
333 arm,primecell-periphid = <0x00051180>;
335 reg = <0x121c0000 0x2000>;
336 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
337 interrupt-names = "cmd_irq";
338 clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
339 clock-names = "mclk", "apb_pclk";
343 max-frequency = <48000000>;
344 vmmc-supply = <&vsdcc_fixed>;
345 vqmmc-supply = <&vsdcc_fixed>;
346 dmas = <&sdcc4bam 2>, <&sdcc4bam 1>;
347 dma-names = "tx", "rx";
348 pinctrl-names = "default";
349 pinctrl-0 = <&sdc4_gpios>;