3 /include/ "skeleton.dtsi"
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 model = "Qualcomm MSM8660";
11 compatible = "qcom,msm8660";
12 interrupt-parent = <&intc>;
19 compatible = "qcom,scorpion";
20 enable-method = "qcom,gcc-msm8660";
23 next-level-cache = <&L2>;
27 compatible = "qcom,scorpion";
28 enable-method = "qcom,gcc-msm8660";
31 next-level-cache = <&L2>;
44 compatible = "simple-bus";
46 intc: interrupt-controller@2080000 {
47 compatible = "qcom,msm-8660-qgic";
49 #interrupt-cells = <3>;
50 reg = < 0x02080000 0x1000 >,
51 < 0x02081000 0x1000 >;
55 compatible = "qcom,scss-timer", "qcom,msm-timer";
56 interrupts = <1 0 0x301>,
59 reg = <0x02000000 0x100>;
60 clock-frequency = <27000000>,
62 cpu-offset = <0x40000>;
65 msmgpio: gpio@800000 {
66 compatible = "qcom,msm-gpio";
67 reg = <0x00800000 0x4000>;
71 interrupts = <0 16 0x4>;
73 #interrupt-cells = <2>;
76 gcc: clock-controller@900000 {
77 compatible = "qcom,gcc-msm8660";
80 reg = <0x900000 0x4000>;
83 gsbi12: gsbi@19c00000 {
84 compatible = "qcom,gsbi-v1.0.0";
85 reg = <0x19c00000 0x100>;
86 clocks = <&gcc GSBI12_H_CLK>;
87 clock-names = "iface";
93 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
94 reg = <0x19c40000 0x1000>,
96 interrupts = <0 195 0x0>;
97 clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
98 clock-names = "core", "iface";
104 compatible = "qcom,ssbi";
105 reg = <0x500000 0x1000>;
106 qcom,controller-type = "pmic-arbiter";
109 compatible = "qcom,pm8058";
110 interrupt-parent = <&msmgpio>;
112 #interrupt-cells = <2>;
113 interrupt-controller;
114 #address-cells = <1>;
118 compatible = "qcom,pm8058-pwrkey";
120 interrupt-parent = <&pmicintc>;
121 interrupts = <50 1>, <51 1>;
127 compatible = "qcom,pm8058-keypad";
129 interrupt-parent = <&pmicintc>;
130 interrupts = <74 1>, <75 1>;
137 compatible = "qcom,pm8058-rtc";
138 interrupt-parent = <&pmicintc>;
145 compatible = "qcom,pm8058-vib";
151 /* Temporary fixed regulator */
152 vsdcc_fixed: vsdcc-regulator {
153 compatible = "regulator-fixed";
154 regulator-name = "SDCC Power";
155 regulator-min-microvolt = <2700000>;
156 regulator-max-microvolt = <2700000>;
161 compatible = "arm,amba-bus";
162 #address-cells = <1>;
165 sdcc1: sdcc@12400000 {
167 compatible = "arm,pl18x", "arm,primecell";
168 arm,primecell-periphid = <0x00051180>;
169 reg = <0x12400000 0x8000>;
170 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
171 interrupt-names = "cmd_irq";
172 clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
173 clock-names = "mclk", "apb_pclk";
175 max-frequency = <48000000>;
179 vmmc-supply = <&vsdcc_fixed>;
182 sdcc3: sdcc@12180000 {
183 compatible = "arm,pl18x", "arm,primecell";
184 arm,primecell-periphid = <0x00051180>;
186 reg = <0x12180000 0x8000>;
187 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
188 interrupt-names = "cmd_irq";
189 clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
190 clock-names = "mclk", "apb_pclk";
194 max-frequency = <48000000>;
196 vmmc-supply = <&vsdcc_fixed>;