arch/arm/boot/dts/rk3288-android.dtsi

   1 /*
   2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/pwm/pwm.h>
  43 #include <dt-bindings/input/input.h>
  44 #include <dt-bindings/soc/rockchip-system-status.h>
  45 #include "rk3288-dram-default-timing.dtsi"
  46 #include <dt-bindings/display/media-bus-format.h>
  47
  48 / {
  49         chosen {
  50                 bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M";
  51         };
  52
  53         /delete-node/ dmc@ff610000;
  54
  55         dfi: dfi {
  56                 compatible = "rockchip,rk3288-dfi";
  57                 rockchip,pmu = <&pmu>;
  58                 rockchip,grf = <&grf>;
  59                 status = "disabled";
  60         };
  61
  62         dmc: dmc {
  63                 compatible = "rockchip,rk3288-dmc";
  64                 devfreq-events = <&dfi>;
  65                 clocks = <&cru SCLK_DDRCLK>, <&cru PCLK_PUBL0>,
  66                          <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL1>,
  67                          <&cru PCLK_DDRUPCTL1>;
  68                 clock-names = "dmc_clk", "pclk_phy0", "pclk_upctl0",
  69                               "pclk_phy1", "pclk_upctl1";
  70                 upthreshold = <55>;
  71                 downdifferential = <10>;
  72                 operating-points-v2 = <&dmc_opp_table>;
  73                 vop-dclk-mode = <0>;
  74                 min-cpu-freq = <600000>;
  75                 rockchip,ddr_timing = <&ddr_timing>;
  76                 system-status-freq = <
  77                         /*system status         freq(KHz)*/
  78                         SYS_STATUS_NORMAL       396000
  79                         SYS_STATUS_REBOOT       396000
  80                         SYS_STATUS_SUSPEND      192000
  81                         SYS_STATUS_VIDEO_1080P  300000
  82                         SYS_STATUS_VIDEO_4K     396000
  83                         SYS_STATUS_PERFORMANCE  528000
  84                         SYS_STATUS_BOOST        396000
  85                         SYS_STATUS_DUALVIEW     396000
  86                         SYS_STATUS_ISP          396000
  87                 >;
  88                 auto-min-freq = <400000>;
  89                 auto-freq-en = <1>;
  90                 status = "diasbled";
  91         };
  92
  93         dmc_opp_table: opp_table2 {
  94                 compatible = "operating-points-v2";
  95
  96                 opp-192000000 {
  97                         opp-hz = /bits/ 64 <192000000>;
  98                         opp-microvolt = <1100000>;
  99                 };
 100                 opp-300000000 {
 101                         opp-hz = /bits/ 64 <300000000>;
 102                         opp-microvolt = <1100000>;
 103                 };
 104                 opp-396000000 {
 105                         opp-hz = /bits/ 64 <396000000>;
 106                         opp-microvolt = <1100000>;
 107                 };
 108                 opp-528000000 {
 109                         opp-hz = /bits/ 64 <528000000>;
 110                         opp-microvolt = <1150000>;
 111                 };
 112         };
 113
 114         reserved-memory {
 115                 ramoops_mem: ramoops@00000000 {
 116                         reg = <0x0 0x8000000 0x0 0xF0000>;
 117                 };
 118
 119                 drm_logo: drm-logo@00000000 {
 120                 compatible = "rockchip,drm-logo";
 121                         reg = <0x0 0x0 0x0 0x0>;
 122                 };
 123         };
 124
 125         ramoops {
 126                 compatible = "ramoops";
 127                 record-size = <0x0 0x20000>;
 128                 console-size = <0x0 0x80000>;
 129                 ftrace-size = <0x0 0x00000>;
 130                 pmsg-size = <0x0 0x50000>;
 131                 memory-region = <&ramoops_mem>;
 132         };
 133
 134         fiq-debugger {
 135                 compatible = "rockchip,fiq-debugger";
 136                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
 137                 rockchip,serial-id = <2>;
 138                 rockchip,wake-irq = <0>;
 139                 rockchip,irq-mode-enable = <0>;  /* If enable uart uses irq instead of fiq */
 140                 rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
 141                 pinctrl-names = "default";
 142                 pinctrl-0 = <&uart2_xfer>;
 143         };
 144
 145         psci {
 146                 compatible = "arm,psci-1.0";
 147                 method = "smc";
 148         };
 149
 150         /delete-node/ timer@ff810000;
 151
 152         backlight: backlight {
 153                 compatible = "pwm-backlight";
 154                 brightness-levels = <
 155                           0   1   2   3   4   5   6   7
 156                           8   9  10  11  12  13  14  15
 157                          16  17  18  19  20  21  22  23
 158                          24  25  26  27  28  29  30  31
 159                          32  33  34  35  36  37  38  39
 160                          40  41  42  43  44  45  46  47
 161                          48  49  50  51  52  53  54  55
 162                          56  57  58  59  60  61  62  63
 163                          64  65  66  67  68  69  70  71
 164                          72  73  74  75  76  77  78  79
 165                          80  81  82  83  84  85  86  87
 166                          88  89  90  91  92  93  94  95
 167                          96  97  98  99 100 101 102 103
 168                         104 105 106 107 108 109 110 111
 169                         112 113 114 115 116 117 118 119
 170                         120 121 122 123 124 125 126 127
 171                         128 129 130 131 132 133 134 135
 172                         136 137 138 139 140 141 142 143
 173                         144 145 146 147 148 149 150 151
 174                         152 153 154 155 156 157 158 159
 175                         160 161 162 163 164 165 166 167
 176                         168 169 170 171 172 173 174 175
 177                         176 177 178 179 180 181 182 183
 178                         184 185 186 187 188 189 190 191
 179                         192 193 194 195 196 197 198 199
 180                         200 201 202 203 204 205 206 207
 181                         208 209 210 211 212 213 214 215
 182                         216 217 218 219 220 221 222 223
 183                         224 225 226 227 228 229 230 231
 184                         232 233 234 235 236 237 238 239
 185                         240 241 242 243 244 245 246 247
 186                         248 249 250 251 252 253 254 255>;
 187                 default-brightness-level = <128>;
 188                 enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
 189                 pinctrl-names = "default";
 190                 pinctrl-0 = <&bl_en>;
 191                 pwms = <&pwm0 0 1000000 0>;
 192         };
 193
 194         display-subsystem {
 195                 status = "okay";
 196
 197                 ports = <&vopb_out>, <&vopl_out>;
 198                 memory-region = <&drm_logo>;
 199
 200                 route {
 201                         route_edp: route-edp {
 202                                 status = "disabled";
 203                                 logo,uboot = "logo.bmp";
 204                                 logo,kernel = "logo_kernel.bmp";
 205                                 logo,mode = "center";
 206                                 charge_logo,mode = "center";
 207                                 connect = <&vopb_out_edp>;
 208                         };
 209
 210                         route_dsi0: route-dsi0 {
 211                                 status = "disabled";
 212                                 logo,uboot = "logo.bmp";
 213                                 logo,kernel = "logo_kernel.bmp";
 214                                 logo,mode = "center";
 215                                 charge_logo,mode = "center";
 216                                 connect = <&vopb_out_dsi0>;
 217                         };
 218
 219                         route_lvds: route-lvds {
 220                                 status = "disabled";
 221                                 logo,uboot = "logo.bmp";
 222                                 logo,kernel = "logo_kernel.bmp";
 223                                 logo,mode = "center";
 224                                 charge_logo,mode = "center";
 225                                 connect = <&vopb_out_lvds>;
 226                         };
 227                 };
 228         };
 229
 230         rk_key: rockchip-key {
 231                 compatible = "rockchip,key";
 232                 status = "okay";
 233
 234                 io-channels = <&saradc 1>;
 235
 236                 vol-up-key {
 237                         linux,code = <115>;
 238                         label = "volume up";
 239                         rockchip,adc_value = <1>;
 240                 };
 241
 242                 vol-down-key {
 243                         linux,code = <114>;
 244                         label = "volume down";
 245                         rockchip,adc_value = <170>;
 246                 };
 247
 248                 power-key {
 249                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 250                         linux,code = <116>;
 251                         pinctrl-names = "default";
 252                         pinctrl-0 = <&pwrbtn>;
 253                         label = "power";
 254                         gpio-key,wakeup;
 255                 };
 256
 257                 menu-key {
 258                         linux,code = <59>;
 259                         label = "menu";
 260                         rockchip,adc_value = <355>;
 261                 };
 262
 263                 home-key {
 264                         linux,code = <102>;
 265                         label = "home";
 266                         rockchip,adc_value = <746>;
 267                 };
 268
 269                 back-key {
 270                         linux,code = <158>;
 271                         label = "back";
 272                         rockchip,adc_value = <560>;
 273                 };
 274
 275                 camera-key {
 276                         linux,code = <212>;
 277                         label = "camera";
 278                         rockchip,adc_value = <450>;
 279                 };
 280         };
 281
 282         dwc_control_usb: dwc-control-usb@ff770284 {
 283                 compatible = "rockchip,rk3288-dwc-control-usb";
 284                 status = "okay";
 285                 reg = <0x0 0xff770284 0x0 0x04>, <0x0 0xff770288 0x0 0x04>,
 286                       <0x0 0xff7702cc 0x0 0x04>, <0x0 0xff7702d4 0x0 0x04>,
 287                       <0x0 0xff770320 0x0 0x14>, <0x0 0xff770334 0x0 0x14>,
 288                       <0x0 0xff770348 0x0 0x10>, <0x0 0xff770358 0x0 0x08>,
 289                       <0x0 0xff770360 0x0 0x08>;
 290                 reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
 291                             "GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
 292                             "GRF_UOC0_BASE", "GRF_UOC1_BASE",
 293                             "GRF_UOC2_BASE", "GRF_UOC3_BASE",
 294                             "GRF_UOC4_BASE";
 295                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
 296                              <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
 297                              <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
 298                              <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
 299                              <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 300                 interrupt-names = "otg_id", "otg_bvalid",
 301                                   "otg_linestate", "host0_linestate",
 302                                   "host1_linestate";
 303                 clocks = <&cru HCLK_USB_PERI>;
 304                 clock-names = "hclk_usb_peri";
 305
 306                 otg_drv_gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 307                 rockchip,remote_wakeup;
 308                 rockchip,usb_irq_wakeup;
 309
 310                 usb_bc {
 311                         compatible = "synopsys,phy";
 312                         rk_usb,bvalid     = <0x288 14 1>;
 313                         rk_usb,iddig      = <0x288 17 1>;
 314                         rk_usb,dcdenb     = <0x328 14 1>;
 315                         rk_usb,vdatsrcenb = <0x328  7 1>;
 316                         rk_usb,vdatdetenb = <0x328  6 1>;
 317                         rk_usb,chrgsel    = <0x328  5 1>;
 318                         rk_usb,chgdet     = <0x2cc 23 1>;
 319                         rk_usb,fsvminus   = <0x2cc 25 1>;
 320                         rk_usb,fsvplus    = <0x2cc 24 1>;
 321                 };
 322         };
 323
 324         nandc0: nandc@ff400000 {
 325                 compatible = "rockchip,rk-nandc";
 326                 reg = <0x0 0xff400000 0x0 0x4000>;
 327                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 328                 nandc_id = <0>;
 329                 clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
 330                 clock-names = "clk_nandc", "hclk_nandc";
 331                 status = "disabled";
 332         };
 333
 334         hdmi_analog_sound: hdmi-analog-sound {
 335                 status = "disabled";
 336                 compatible = "rockchip,rk3288-hdmi-analog",
 337                                 "rockchip,rk3368-hdmi-analog";
 338                 rockchip,model = "rockchip,rt5640-codec";
 339                 rockchip,cpu = <&i2s>;
 340                 rockchip,codec = <&rt5640>, <&hdmi>;
 341                 rockchip,widgets =
 342                         "Microphone", "Microphone Jack",
 343                         "Headphone", "Headphone Jack";
 344                 rockchip,routing =
 345                         "MIC1", "Microphone Jack",
 346                         "MIC2", "Microphone Jack",
 347                         "Microphone Jack", "micbias1",
 348                         "Headphone Jack", "HPOL",
 349                         "Headphone Jack", "HPOR";
 350         };
 351 };
 352
 353 &edp_panel {
 354         backlight = <&backlight>;
 355 };
 356
 357 &cpu0 {
 358         enable-method = "psci";
 359 };
 360
 361 &cpu0_opp_table {
 362         clocks = <&cru PLL_APLL>;
 363         leakage-scaling-sel = <0   254   25>;
 364
 365         opp-1800000000 {
 366                 opp-hz = /bits/ 64 <1800000000>;
 367                 opp-microvolt = <1350000>;
 368                 clock-latency-ns = <40000>;
 369                 status = "disabled";
 370         };
 371 };
 372
 373 &cpu1 {
 374         enable-method = "psci";
 375 };
 376
 377 &cpu2 {
 378         enable-method = "psci";
 379 };
 380
 381 &cpu3 {
 382         enable-method = "psci";
 383 };
 384
 385 &dmac_bus_s {
 386         /* change to non-secure dmac */
 387         reg = <0x0 0xff600000 0x0 0x4000>;
 388 };
 389
 390 &efuse {
 391         compatible = "rockchip,rk3288-secure-efuse";
 392 };
 393
 394 &iep {
 395         status = "okay";
 396 };
 397
 398 &iep_mmu {
 399         status = "okay";
 400 };
 401
 402 &dsi0 {
 403         ports {
 404                 dsi0_in: port {
 405                         dsi0_in_vopl: endpoint@1 {
 406                                 status = "disabled";
 407                         };
 408                 };
 409         };
 410 };
 411
 412 &edp {
 413         ports {
 414                 edp_in: port@0 {
 415                         edp_in_vopl: endpoint@1 {
 416                                 status = "disabled";
 417                         };
 418                 };
 419         };
 420 };
 421
 422 &rga {
 423         compatible = "rockchip,rga2";
 424         clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
 425         clock-names = "aclk_rga", "hclk_rga", "clk_rga";
 426 };
 427
 428 &usb_otg {
 429         compatible = "rockchip,rk3288_usb20_otg";
 430         clocks = <&usbphy0>, <&cru HCLK_OTG0>;
 431         clock-names = "clk_usbphy0", "hclk_usb0";
 432         resets = <&cru SRST_USBOTG_AHB>,
 433                  <&cru SRST_USBOTG_PHY>,
 434                  <&cru SRST_USBOTG_CON>;
 435         reset-names = "otg_ahb", "otg_phy", "otg_controller";
 436         /*0 - Normal, 1 - Force Host, 2 - Force Device*/
 437         rockchip,usb-mode = <0>;
 438 };
 439
 440 &pinctrl {
 441
 442         backlight {
 443                 bl_en: bl-en {
 444                         rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
 445                 };
 446         };
 447
 448         buttons {
 449                 pwrbtn: pwrbtn {
 450                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
 451                 };
 452         };
 453 };