2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/pwm/pwm.h>
43 #include <dt-bindings/input/input.h>
47 bootargs = "earlycon=uart8250,mmio32,0xff690000";
51 ramoops_mem: ramoops@00000000 {
52 reg = <0x8000000 0xF0000>;
57 compatible = "ramoops";
58 record-size = <0x0 0x20000>;
59 console-size = <0x0 0x80000>;
60 ftrace-size = <0x0 0x00000>;
61 pmsg-size = <0x0 0x50000>;
62 memory-region = <&ramoops_mem>;
66 compatible = "rockchip,fiq-debugger";
67 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
68 rockchip,serial-id = <2>;
69 rockchip,wake-irq = <0>;
70 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
71 rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
72 pinctrl-names = "default";
73 pinctrl-0 = <&uart2_xfer>;
77 compatible = "arm,psci-1.0";
81 /delete-node/ timer@ff810000;
83 backlight: backlight {
84 compatible = "pwm-backlight";
88 16 17 18 19 20 21 22 23
89 24 25 26 27 28 29 30 31
90 32 33 34 35 36 37 38 39
91 40 41 42 43 44 45 46 47
92 48 49 50 51 52 53 54 55
93 56 57 58 59 60 61 62 63
94 64 65 66 67 68 69 70 71
95 72 73 74 75 76 77 78 79
96 80 81 82 83 84 85 86 87
97 88 89 90 91 92 93 94 95
98 96 97 98 99 100 101 102 103
99 104 105 106 107 108 109 110 111
100 112 113 114 115 116 117 118 119
101 120 121 122 123 124 125 126 127
102 128 129 130 131 132 133 134 135
103 136 137 138 139 140 141 142 143
104 144 145 146 147 148 149 150 151
105 152 153 154 155 156 157 158 159
106 160 161 162 163 164 165 166 167
107 168 169 170 171 172 173 174 175
108 176 177 178 179 180 181 182 183
109 184 185 186 187 188 189 190 191
110 192 193 194 195 196 197 198 199
111 200 201 202 203 204 205 206 207
112 208 209 210 211 212 213 214 215
113 216 217 218 219 220 221 222 223
114 224 225 226 227 228 229 230 231
115 232 233 234 235 236 237 238 239
116 240 241 242 243 244 245 246 247
117 248 249 250 251 252 253 254 255>;
118 default-brightness-level = <128>;
119 enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&bl_en>;
122 pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
125 rk_key: rockchip-key {
126 compatible = "rockchip,key";
129 io-channels = <&saradc 1>;
134 rockchip,adc_value = <1>;
139 label = "volume down";
140 rockchip,adc_value = <170>;
144 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pwrbtn>;
155 rockchip,adc_value = <355>;
161 rockchip,adc_value = <746>;
167 rockchip,adc_value = <560>;
173 rockchip,adc_value = <450>;
177 dwc_control_usb: dwc-control-usb@ff770284 {
178 compatible = "rockchip,rk3288-dwc-control-usb";
180 reg = <0xff770284 0x04>, <0xff770288 0x04>,
181 <0xff7702cc 0x04>, <0xff7702d4 0x04>,
182 <0xff770320 0x14>, <0xff770334 0x14>,
183 <0xff770348 0x10>, <0xff770358 0x08>,
185 reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
186 "GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
187 "GRF_UOC0_BASE", "GRF_UOC1_BASE",
188 "GRF_UOC2_BASE", "GRF_UOC3_BASE",
190 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
193 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
194 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
195 interrupt-names = "otg_id", "otg_bvalid",
196 "otg_linestate", "host0_linestate",
198 clocks = <&cru HCLK_USB_PERI>;
199 clock-names = "hclk_usb_peri";
201 otg_drv_gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
202 rockchip,remote_wakeup;
203 rockchip,usb_irq_wakeup;
206 compatible = "synopsys,phy";
207 rk_usb,bvalid = <0x288 14 1>;
208 rk_usb,iddig = <0x288 17 1>;
209 rk_usb,dcdenb = <0x328 14 1>;
210 rk_usb,vdatsrcenb = <0x328 7 1>;
211 rk_usb,vdatdetenb = <0x328 6 1>;
212 rk_usb,chrgsel = <0x328 5 1>;
213 rk_usb,chgdet = <0x2cc 23 1>;
214 rk_usb,fsvminus = <0x2cc 25 1>;
215 rk_usb,fsvplus = <0x2cc 24 1>;
219 nandc0: nandc@ff400000 {
220 compatible = "rockchip,rk-nandc";
221 reg = <0x0 0xff400000 0x0 0x4000>;
222 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
224 clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
225 clock-names = "clk_nandc", "hclk_nandc";
231 backlight = <&backlight>;
235 enable-method = "psci";
239 enable-method = "psci";
243 enable-method = "psci";
247 enable-method = "psci";
251 /* change to non-secure dmac */
252 reg = <0xff600000 0x4000>;
256 compatible = "rockchip,rk3288-secure-efuse";
260 compatible = "rockchip,rga2";
261 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
262 clock-names = "aclk_rga", "hclk_rga", "clk_rga";
266 compatible = "rockchip,rk3288_usb20_otg";
267 clocks = <&usbphy0>, <&cru HCLK_OTG0>;
268 clock-names = "clk_usbphy0", "hclk_usb0";
269 resets = <&cru SRST_USBOTG_AHB>,
270 <&cru SRST_USBOTG_PHY>,
271 <&cru SRST_USBOTG_CON>;
272 reset-names = "otg_ahb", "otg_phy", "otg_controller";
273 /*0 - Normal, 1 - Force Host, 2 - Force Device*/
274 rockchip,usb-mode = <0>;
281 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
287 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;