2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/pwm/pwm.h>
43 #include <dt-bindings/input/input.h>
47 bootargs = "earlycon=uart8250,mmio32,0xff690000";
50 backlight: backlight {
51 compatible = "pwm-backlight";
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84 248 249 250 251 252 253 254 255>;
85 default-brightness-level = <128>;
86 enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
87 pinctrl-names = "default";
89 pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
92 rk_key: rockchip-key {
93 compatible = "rockchip,key";
96 io-channels = <&saradc 1>;
101 rockchip,adc_value = <1>;
106 label = "volume down";
107 rockchip,adc_value = <170>;
111 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
113 pinctrl-names = "default";
114 pinctrl-0 = <&pwrbtn>;
122 rockchip,adc_value = <355>;
128 rockchip,adc_value = <746>;
134 rockchip,adc_value = <560>;
140 rockchip,adc_value = <450>;
144 dwc_control_usb: dwc-control-usb@ff770284 {
145 compatible = "rockchip,rk3288-dwc-control-usb";
147 reg = <0xff770284 0x04>, <0xff770288 0x04>,
148 <0xff7702cc 0x04>, <0xff7702d4 0x04>,
149 <0xff770320 0x14>, <0xff770334 0x14>,
150 <0xff770348 0x10>, <0xff770358 0x08>,
152 reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
153 "GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
154 "GRF_UOC0_BASE", "GRF_UOC1_BASE",
155 "GRF_UOC2_BASE", "GRF_UOC3_BASE",
157 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
158 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
159 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
160 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
161 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
162 interrupt-names = "otg_id", "otg_bvalid",
163 "otg_linestate", "host0_linestate",
165 clocks = <&cru HCLK_USB_PERI>;
166 clock-names = "hclk_usb_peri";
168 otg_drv_gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
169 rockchip,remote_wakeup;
170 rockchip,usb_irq_wakeup;
173 compatible = "synopsys,phy";
174 rk_usb,bvalid = <0x288 14 1>;
175 rk_usb,iddig = <0x288 17 1>;
176 rk_usb,dcdenb = <0x328 14 1>;
177 rk_usb,vdatsrcenb = <0x328 7 1>;
178 rk_usb,vdatdetenb = <0x328 6 1>;
179 rk_usb,chrgsel = <0x328 5 1>;
180 rk_usb,chgdet = <0x2cc 23 1>;
181 rk_usb,fsvminus = <0x2cc 25 1>;
182 rk_usb,fsvplus = <0x2cc 24 1>;
188 compatible = "rockchip,rk3288_usb20_otg";
189 clocks = <&usbphy0>, <&cru HCLK_OTG0>;
190 clock-names = "clk_usbphy0", "hclk_usb0";
191 resets = <&cru SRST_USBOTG_AHB>,
192 <&cru SRST_USBOTG_PHY>,
193 <&cru SRST_USBOTG_CON>;
194 reset-names = "otg_ahb", "otg_phy", "otg_controller";
195 /*0 - Normal, 1 - Force Host, 2 - Force Device*/
196 rockchip,usb-mode = <0>;
203 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
209 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;