2 * Copyright (c) 2015~2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/pwm/pwm.h>
44 #include <dt-bindings/input/input.h>
45 #include "rk3288.dtsi"
49 bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1";
52 edp_panel: edp-panel {
56 panel_in_edp: endpoint {
57 remote-endpoint = <&edp_out_panel>;
62 lvds_panel: lvds-panel {
64 pinctrl-0 = <&lcd_cs>;
66 panel_in_lvds: endpoint {
67 remote-endpoint = <&lvds_out_panel>;
74 compatible = "simple-audio-card";
75 simple-audio-card,format = "i2s";
76 simple-audio-card,name = "rockchip,rt5640-codec";
77 simple-audio-card,mclk-fs = <512>;
78 simple-audio-card,widgets =
79 "Microphone", "Microphone Jack",
80 "Headphone", "Headphone Jack";
81 simple-audio-card,routing =
82 "MIC1", "Microphone Jack",
83 "MIC2", "Microphone Jack",
84 "Microphone Jack", "micbias1",
85 "Headphone Jack", "HPOL",
86 "Headphone Jack", "HPOR";
88 simple-audio-card,dai-link@0 {
95 sound-dai = <&rt5640>;
99 simple-audio-card,dai-link@1 {
111 ext_gmac: external-gmac-clock {
112 compatible = "fixed-clock";
113 clock-frequency = <125000000>;
114 clock-output-names = "ext_gmac";
118 vccadc_ref: vccadc-ref {
119 compatible = "regulator-fixed";
120 regulator-name = "vcc1v8_sys";
123 regulator-min-microvolt = <1800000>;
124 regulator-max-microvolt = <1800000>;
127 /* This turns on USB vbus for both host0 (ehci) and host1 (dwc2) */
128 vcc_host: vcc-host-regulator {
129 compatible = "regulator-fixed";
131 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&host_vbus_drv>;
134 regulator-name = "vcc_host";
139 vcc_phy: vcc-phy-regulator {
140 compatible = "regulator-fixed";
142 gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
143 pinctrl-names = "default";
144 pinctrl-0 = <ð_phy_pwr>;
145 regulator-name = "vcc_phy";
146 regulator-min-microvolt = <3300000>;
147 regulator-max-microvolt = <3300000>;
152 vcc_sys: vsys-regulator {
153 compatible = "regulator-fixed";
154 regulator-name = "vcc_sys";
155 regulator-min-microvolt = <5000000>;
156 regulator-max-microvolt = <5000000>;
161 /* This switch DIO3222 HOST_DP_HOST to host2 (dwc2) */
162 vcc_3g: vcc-3g-regulator {
163 compatible = "regulator-fixed";
165 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pwr_3g>;
168 regulator-name = "vcc_3g";
172 * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from
173 * vcc_io directly. Those boards won't be able to power cycle SD cards
174 * but it shouldn't hurt to toggle this pin there anyway.
176 vcc_sd: sdmmc-regulator {
177 compatible = "regulator-fixed";
178 pinctrl-names = "default";
179 pinctrl-0 = <&sdmmc_pwr>;
180 regulator-name = "vcc_sd";
181 regulator-min-microvolt = <3300000>;
182 regulator-max-microvolt = <3300000>;
183 startup-delay-us = <100000>;
184 vin-supply = <&vcc_io>;
188 compatible = "bluetooth-platdata";
189 uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
190 pinctrl-names = "default", "rts_gpio";
191 pinctrl-0 = <&uart0_rts>;
192 pinctrl-1 = <&uart0_gpios>;
193 BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
194 BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
195 BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
200 compatible = "wlan-platdata";
201 rockchip,grf = <&grf>;
202 wifi_chip_type = "ap6335";
204 WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
217 max-frequency = <100000000>;
224 phy-supply = <&vcc_phy>;
226 clock_in_out = "input";
227 snps,reset-gpio = <&gpio4 7 0>;
228 snps,reset-active-low;
229 snps,reset-delays-us = <0 10000 50000>;
230 assigned-clocks = <&cru SCLK_MAC>;
231 assigned-clock-parents = <&ext_gmac>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&rgmii_pins>;
241 #address-cells = <1>;
243 #sound-dai-cells = <0>;
248 vref-supply = <&vccadc_ref>;
261 card-detect-delay = <200>;
262 disable-wp; /* wp not hooked up */
264 pinctrl-names = "default";
265 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
267 vmmc-supply = <&vcc_sd>;
268 vqmmc-supply = <&vccio_sd>;
279 #address-cells = <1>;
281 edp_out_panel: endpoint {
283 remote-endpoint = <&panel_in_edp>;
301 #sound-dai-cells = <0>;
302 compatible = "realtek,rt5640";
304 clocks = <&cru SCLK_I2S0_OUT>;
305 clock-names = "mclk";
306 interrupt-parent = <&gpio6>;
307 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
317 clock-frequency = <400000>;
320 compatible = "GSL,GSL3673";
322 screen_max_x = <1536>;
323 screen_max_y = <2048>;
324 irq_gpio_number = <&gpio7 6 IRQ_TYPE_LEVEL_LOW>;
325 rst_gpio_number = <&gpio7 5 GPIO_ACTIVE_HIGH>;
331 #sound-dai-cells = <0>;
338 sdcard-supply = <&vccio_sd>;
339 wifi-supply = <&vcc_18>;
365 clock-frequency = <50000000>;
366 clock-freq-min-max = <200000 50000000>;
372 keep-power-in-suspend;
373 mmc-pwrseq = <&sdio_pwrseq>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&uart0_xfer &uart0_cts>;
397 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
398 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
407 rockchip-relinquish-port;
428 #address-cells = <1>;
431 lvds_out_panel: endpoint@0 {
433 remote-endpoint = <&panel_in_lvds>;
456 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
457 drive-strength = <8>;
460 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
462 drive-strength = <8>;
467 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
472 wifi_enable_h: wifi-enable-h {
473 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
479 * Default drive strength isn't enough to achieve even
480 * high-speed mode on EVB board so bump up to 8ma.
482 sdmmc_bus4: sdmmc-bus4 {
483 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
484 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
485 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
486 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
489 sdmmc_clk: sdmmc-clk {
490 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
493 sdmmc_cmd: sdmmc-cmd {
494 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
497 sdmmc_pwr: sdmmc-pwr {
498 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
503 host_vbus_drv: host-vbus-drv {
504 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
508 rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
513 eth_phy_pwr: eth-phy-pwr {
514 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
520 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
525 uart0_gpios: uart0-gpios {
526 rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;