2 * Copyright (c) 2015~2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/pwm/pwm.h>
44 #include <dt-bindings/input/input.h>
45 #include "rk3288.dtsi"
49 bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1";
57 drm_logo: drm-logo@00000000 {
58 compatible = "rockchip,drm-logo";
62 /* global autoconfigured region for contiguous allocations */
64 compatible = "shared-dma-pool";
66 size = <0x0 0x2000000>;
72 compatible = "rockchip,ion";
77 reg = <0x00000000 0x2000000>;
84 backlight: backlight {
85 compatible = "pwm-backlight";
89 16 17 18 19 20 21 22 23
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100 104 105 106 107 108 109 110 111
101 112 113 114 115 116 117 118 119
102 120 121 122 123 124 125 126 127
103 128 129 130 131 132 133 134 135
104 136 137 138 139 140 141 142 143
105 144 145 146 147 148 149 150 151
106 152 153 154 155 156 157 158 159
107 160 161 162 163 164 165 166 167
108 168 169 170 171 172 173 174 175
109 176 177 178 179 180 181 182 183
110 184 185 186 187 188 189 190 191
111 192 193 194 195 196 197 198 199
112 200 201 202 203 204 205 206 207
113 208 209 210 211 212 213 214 215
114 216 217 218 219 220 221 222 223
115 224 225 226 227 228 229 230 231
116 232 233 234 235 236 237 238 239
117 240 241 242 243 244 245 246 247
118 248 249 250 251 252 253 254 255>;
119 default-brightness-level = <128>;
120 enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&bl_en>;
123 pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
126 rk_key: rockchip-key {
127 compatible = "rockchip,key";
130 io-channels = <&saradc 1>;
135 rockchip,adc_value = <1>;
140 label = "volume down";
141 rockchip,adc_value = <170>;
145 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pwrbtn>;
156 rockchip,adc_value = <355>;
162 rockchip,adc_value = <746>;
168 rockchip,adc_value = <560>;
174 rockchip,adc_value = <450>;
179 compatible ="lg,lp079qx1-sp0v", "simple-panel";
180 backlight = <&backlight>;
181 enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
182 pinctrl-0 = <&lcd_cs>;
185 panel_in_edp: endpoint {
186 remote-endpoint = <&edp_out_panel>;
193 compatible = "simple-audio-card";
194 simple-audio-card,format = "i2s";
195 simple-audio-card,name = "rockchip,rt5640-codec";
196 simple-audio-card,mclk-fs = <512>;
197 simple-audio-card,widgets =
198 "Microphone", "Microphone Jack",
199 "Headphone", "Headphone Jack";
200 simple-audio-card,routing =
201 "MIC1", "Microphone Jack",
202 "MIC2", "Microphone Jack",
203 "Microphone Jack", "micbias1",
204 "Headphone Jack", "HPOL",
205 "Headphone Jack", "HPOR";
207 simple-audio-card,dai-link@0 {
214 sound-dai = <&rt5640>;
218 simple-audio-card,dai-link@1 {
230 lvds_panel: lvds_panel {
231 compatible ="auo,b101ew05","simple-panel";
232 backlight = <&backlight>;
233 enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
234 pinctrl-0 = <&lcd_cs>;
238 ext_gmac: external-gmac-clock {
239 compatible = "fixed-clock";
240 clock-frequency = <125000000>;
241 clock-output-names = "ext_gmac";
245 vccadc_ref: vccadc-ref {
246 compatible = "regulator-fixed";
247 regulator-name = "vcc1v8_sys";
250 regulator-min-microvolt = <1800000>;
251 regulator-max-microvolt = <1800000>;
254 /* This turns on USB vbus for both host0 (ehci) and host1 (dwc2) */
255 vcc_host: vcc-host-regulator {
256 compatible = "regulator-fixed";
258 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&host_vbus_drv>;
261 regulator-name = "vcc_host";
266 vcc_phy: vcc-phy-regulator {
267 compatible = "regulator-fixed";
269 gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
270 pinctrl-names = "default";
271 pinctrl-0 = <ð_phy_pwr>;
272 regulator-name = "vcc_phy";
273 regulator-min-microvolt = <3300000>;
274 regulator-max-microvolt = <3300000>;
279 vcc_sys: vsys-regulator {
280 compatible = "regulator-fixed";
281 regulator-name = "vcc_sys";
282 regulator-min-microvolt = <5000000>;
283 regulator-max-microvolt = <5000000>;
288 /* This switch DIO3222 HOST_DP_HOST to host2 (dwc2) */
289 vcc_3g: vcc-3g-regulator {
290 compatible = "regulator-fixed";
292 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pwr_3g>;
295 regulator-name = "vcc_3g";
299 * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from
300 * vcc_io directly. Those boards won't be able to power cycle SD cards
301 * but it shouldn't hurt to toggle this pin there anyway.
303 vcc_sd: sdmmc-regulator {
304 compatible = "regulator-fixed";
305 pinctrl-names = "default";
306 pinctrl-0 = <&sdmmc_pwr>;
307 regulator-name = "vcc_sd";
308 regulator-min-microvolt = <3300000>;
309 regulator-max-microvolt = <3300000>;
310 startup-delay-us = <100000>;
311 vin-supply = <&vcc_io>;
315 compatible = "bluetooth-platdata";
316 uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
317 pinctrl-names = "default", "rts_gpio";
318 pinctrl-0 = <&uart0_rts>;
319 pinctrl-1 = <&uart0_gpios>;
320 BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
321 BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
322 BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
327 compatible = "wlan-platdata";
328 rockchip,grf = <&grf>;
329 wifi_chip_type = "ap6335";
331 WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
348 phy-supply = <&vcc_phy>;
350 clock_in_out = "input";
351 snps,reset-gpio = <&gpio4 7 0>;
352 snps,reset-active-low;
353 snps,reset-delays-us = <0 10000 1000000>;
354 assigned-clocks = <&cru SCLK_MAC>;
355 assigned-clock-parents = <&ext_gmac>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&rgmii_pins>;
364 #address-cells = <1>;
366 #sound-dai-cells = <0>;
369 /* Don't use vopl for HDMI */
372 /delete-node/ endpoint@1;
378 vref-supply = <&vccadc_ref>;
391 card-detect-delay = <200>;
392 disable-wp; /* wp not hooked up */
394 pinctrl-names = "default";
395 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
397 vmmc-supply = <&vcc_sd>;
398 vqmmc-supply = <&vccio_sd>;
411 /* Don't use vopb for eDP */
413 /delete-node/ endpoint@0;
418 #address-cells = <1>;
420 edp_out_panel: endpoint {
422 remote-endpoint = <&panel_in_edp>;
440 #sound-dai-cells = <0>;
441 compatible = "realtek,rt5640";
443 clocks = <&cru SCLK_I2S0_OUT>;
444 clock-names = "mclk";
445 interrupt-parent = <&gpio6>;
446 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
454 compatible = "GSL,GSL3673";
456 screen_max_x = <1536>;
457 screen_max_y = <2048>;
458 irq_gpio_number = <&gpio7 6 IRQ_TYPE_LEVEL_LOW>;
459 rst_gpio_number = <&gpio7 5 GPIO_ACTIVE_HIGH>;
465 #sound-dai-cells = <0>;
472 sdcard-supply = <&vccio_sd>;
473 wifi-supply = <&vcc_18>;
491 clock-frequency = <50000000>;
492 clock-freq-min-max = <200000 50000000>;
498 keep-power-in-suspend;
499 mmc-pwrseq = <&sdio_pwrseq>;
502 pinctrl-names = "default";
503 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
509 pinctrl-names = "default";
510 pinctrl-0 = <&uart0_xfer &uart0_cts>;
523 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
524 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
533 rockchip-relinquish-port;
546 rockchip,data-mapping = "jeida";
547 rockchip,data-width = <24>;
548 rockchip,output = "lvds";
549 rockchip,panel = <&lvds_panel>;
556 /* Don't use vopb for eDP, save it for HDMI */
558 /delete-node/ endpoint@1;
569 /* Don't use vopb for HDMI, save it for eDP */
571 /delete-node/ endpoint@0;
580 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
581 drive-strength = <8>;
584 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
586 drive-strength = <8>;
591 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
597 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
603 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
608 wifi_enable_h: wifi-enable-h {
609 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
615 * Default drive strength isn't enough to achieve even
616 * high-speed mode on EVB board so bump up to 8ma.
618 sdmmc_bus4: sdmmc-bus4 {
619 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
620 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
621 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
622 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
625 sdmmc_clk: sdmmc-clk {
626 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
629 sdmmc_cmd: sdmmc-cmd {
630 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
633 sdmmc_pwr: sdmmc-pwr {
634 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
639 host_vbus_drv: host-vbus-drv {
640 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
644 rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
649 eth_phy_pwr: eth-phy-pwr {
650 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
656 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
661 uart0_gpios: uart0-gpios {
662 rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;