arch/arm/boot/dts/rk3288-phycore-som.dtsi

   1 /*
   2  * Device tree file for Phytec phyCORE-RK3288 SoM
   3  * Copyright (C) 2017 PHYTEC Messtechnik GmbH
   4  * Author: Wadim Egorov <w.egorov@phytec.de>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include <dt-bindings/net/ti-dp83867.h>
  46 #include "rk3288.dtsi"
  47
  48 / {
  49         model = "Phytec RK3288 phyCORE";
  50         compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
  51
  52         /*
  53          * Set the minimum memory size here and
  54          * let the bootloader set the real size.
  55          */
  56         memory {
  57                 device_type = "memory";
  58                 reg = <0 0x8000000>;
  59         };
  60
  61         aliases {
  62                 rtc0 = &i2c_rtc;
  63                 rtc1 = &rk818;
  64         };
  65
  66         ext_gmac: external-gmac-clock {
  67                 compatible = "fixed-clock";
  68                 #clock-cells = <0>;
  69                 clock-frequency = <125000000>;
  70                 clock-output-names = "ext_gmac";
  71         };
  72
  73         leds: user-leds {
  74                 compatible = "gpio-leds";
  75                 pinctrl-names = "default";
  76                 pinctrl-0 = <&user_led>;
  77
  78                 user {
  79                         label = "green_led";
  80                         gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
  81                         linux,default-trigger = "heartbeat";
  82                         default-state = "keep";
  83                 };
  84         };
  85
  86         sound {
  87                 compatible = "simple-audio-card";
  88                 simple-audio-card,format = "i2s";
  89                 simple-audio-card,name = "rockchip,phytec-codec";
  90                 simple-audio-card,mclk-fs = <512>;
  91
  92                 simple-audio-card,dai-link@0 {
  93                         format = "i2s";
  94                         cpu {
  95                                 sound-dai = <&i2s>;
  96                         };
  97                         codec {
  98                                 sound-dai = <&hdmi>;
  99                         };
 100                 };
 101         };
 102
 103         vdd_emmc_io: vdd-emmc-io {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "vdd_emmc_io";
 106                 regulator-min-microvolt = <1800000>;
 107                 regulator-max-microvolt = <1800000>;
 108                 vin-supply = <&vdd_3v3_io>;
 109         };
 110
 111         vdd_in_otg_out: vdd-in-otg-out {
 112                 compatible = "regulator-fixed";
 113                 regulator-name = "vdd_in_otg_out";
 114                 regulator-always-on;
 115                 regulator-boot-on;
 116                 regulator-min-microvolt = <5000000>;
 117                 regulator-max-microvolt = <5000000>;
 118         };
 119
 120         vdd_misc_1v8: vdd-misc-1v8 {
 121                 compatible = "regulator-fixed";
 122                 regulator-name = "vdd_misc_1v8";
 123                 regulator-always-on;
 124                 regulator-boot-on;
 125                 regulator-min-microvolt = <1800000>;
 126                 regulator-max-microvolt = <1800000>;
 127         };
 128 };
 129
 130 &cpu0 {
 131         cpu0-supply = <&vdd_cpu>;
 132 };
 133
 134 &emmc {
 135         status = "okay";
 136         bus-width = <8>;
 137         cap-mmc-highspeed;
 138         disable-wp;
 139         non-removable;
 140         num-slots = <1>;
 141         pinctrl-names = "default";
 142         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
 143         vmmc-supply = <&vdd_3v3_io>;
 144         vqmmc-supply = <&vdd_emmc_io>;
 145 };
 146
 147 &gmac {
 148         assigned-clocks = <&cru SCLK_MAC>;
 149         assigned-clock-parents = <&ext_gmac>;
 150         clock_in_out = "input";
 151         pinctrl-names = "default";
 152         pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
 153         phy-supply = <&vdd_eth_2v5>;
 154         phy-mode = "rgmii";
 155         snps,reset-active-low;
 156         snps,reset-delays-us = <0 10000 1000000>;
 157         snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
 158         tx_delay = <0x30>;
 159         rx_delay = <0x10>;
 160 };
 161
 162 &gpu {
 163         mali-supply = <&vdd_gpu>;
 164         status = "okay";
 165 };
 166
 167 &hdmi {
 168         #address-cells = <1>;
 169         #size-cells = <0>;
 170         #sound-dai-cells = <0>;
 171 };
 172
 173 &hevc_service {
 174         status = "okay";
 175 };
 176
 177 &io_domains {
 178         status = "okay";
 179         sdcard-supply = <&vdd_io_sd>;
 180         flash0-supply = <&vdd_emmc_io>;
 181         flash1-supply = <&vdd_misc_1v8>;
 182         gpio1830-supply = <&vdd_3v3_io>;
 183         gpio30-supply = <&vdd_3v3_io>;
 184         bb-supply = <&vdd_3v3_io>;
 185         dvp-supply = <&vdd_3v3_io>;
 186         lcdc-supply = <&vdd_3v3_io>;
 187         wifi-supply = <&vdd_3v3_io>;
 188         audio-supply = <&vdd_3v3_io>;
 189 };
 190
 191 &i2c0 {
 192         status = "okay";
 193         clock-frequency = <400000>;
 194
 195         rk818: pmic@1c {
 196                 compatible = "rockchip,rk818";
 197                 reg = <0x1c>;
 198
 199                 clock-output-names = "xin32k";
 200                 interrupt-parent = <&gpio0>;
 201                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 202                 pinctrl-names = "default";
 203                 pinctrl-0 = <&pmic_int>;
 204                 rockchip,system-power-controller;
 205                 wakeup-source;
 206                 #clock-cells = <1>;
 207
 208                 vcc1-supply = <&vdd_sys>;
 209                 vcc2-supply = <&vdd_sys>;
 210                 vcc3-supply = <&vdd_sys>;
 211                 vcc4-supply = <&vdd_sys>;
 212                 boost-supply = <&vdd_in_otg_out>;
 213                 vcc6-supply = <&vdd_sys>;
 214                 vcc7-supply = <&vdd_misc_1v8>;
 215                 vcc8-supply = <&vdd_misc_1v8>;
 216                 vcc9-supply = <&vdd_3v3_io>;
 217                 vddio-supply = <&vdd_3v3_io>;
 218
 219                 regulators {
 220                         vdd_log: DCDC_REG1 {
 221                                 regulator-name = "vdd_log";
 222                                 regulator-always-on;
 223                                 regulator-boot-on;
 224                                 regulator-min-microvolt = <1100000>;
 225                                 regulator-max-microvolt = <1100000>;
 226                                 regulator-state-mem {
 227                                         regulator-off-in-suspend;
 228                                 };
 229                         };
 230
 231                         vdd_gpu: DCDC_REG2 {
 232                                 regulator-name = "vdd_gpu";
 233                                 regulator-always-on;
 234                                 regulator-boot-on;
 235                                 regulator-min-microvolt = <800000>;
 236                                 regulator-max-microvolt = <1250000>;
 237                                 regulator-state-mem {
 238                                         regulator-on-in-suspend;
 239                                         regulator-suspend-microvolt = <1000000>;
 240                                 };
 241                         };
 242
 243                         vcc_ddr: DCDC_REG3 {
 244                                 regulator-name = "vcc_ddr";
 245                                 regulator-always-on;
 246                                 regulator-boot-on;
 247                                 regulator-state-mem {
 248                                         regulator-on-in-suspend;
 249                                 };
 250                         };
 251
 252                         vdd_3v3_io: DCDC_REG4 {
 253                                 regulator-name = "vdd_3v3_io";
 254                                 regulator-always-on;
 255                                 regulator-boot-on;
 256                                 regulator-min-microvolt = <3300000>;
 257                                 regulator-max-microvolt = <3300000>;
 258                                 regulator-state-mem {
 259                                         regulator-on-in-suspend;
 260                                         regulator-suspend-microvolt = <3300000>;
 261                                 };
 262                         };
 263
 264                         vdd_sys: DCDC_BOOST {
 265                                 regulator-name = "vdd_sys";
 266                                 regulator-always-on;
 267                                 regulator-boot-on;
 268                                 regulator-min-microvolt = <5000000>;
 269                                 regulator-max-microvolt = <5000000>;
 270                                 regulator-state-mem {
 271                                         regulator-on-in-suspend;
 272                                         regulator-suspend-microvolt = <5000000>;
 273                                 };
 274                         };
 275
 276                         /* vcc9 */
 277                         vdd_sd: SWITCH_REG {
 278                                 regulator-name = "vdd_sd";
 279                                 regulator-always-on;
 280                                 regulator-boot-on;
 281                                 regulator-state-mem {
 282                                         regulator-off-in-suspend;
 283                                 };
 284                         };
 285
 286                         /* vcc6 */
 287                         vdd_eth_2v5: LDO_REG2 {
 288                                 regulator-name = "vdd_eth_2v5";
 289                                 regulator-always-on;
 290                                 regulator-boot-on;
 291                                 regulator-min-microvolt = <2500000>;
 292                                 regulator-max-microvolt = <2500000>;
 293                                 regulator-state-mem {
 294                                         regulator-on-in-suspend;
 295                                         regulator-suspend-microvolt = <2500000>;
 296                                 };
 297                         };
 298
 299                         /* vcc7 */
 300                         vdd_1v0: LDO_REG3 {
 301                                 regulator-name = "vdd_1v0";
 302                                 regulator-always-on;
 303                                 regulator-boot-on;
 304                                 regulator-min-microvolt = <1000000>;
 305                                 regulator-max-microvolt = <1000000>;
 306                                 regulator-state-mem {
 307                                         regulator-on-in-suspend;
 308                                         regulator-suspend-microvolt = <1000000>;
 309                                 };
 310                         };
 311
 312                         /* vcc8 */
 313                         vdd_1v8_lcd_ldo: LDO_REG4 {
 314                                 regulator-name = "vdd_1v8_lcd_ldo";
 315                                 regulator-always-on;
 316                                 regulator-boot-on;
 317                                 regulator-min-microvolt = <1800000>;
 318                                 regulator-max-microvolt = <1800000>;
 319                                 regulator-state-mem {
 320                                         regulator-on-in-suspend;
 321                                         regulator-suspend-microvolt = <1800000>;
 322                                 };
 323                         };
 324
 325                         /* vcc8 */
 326                         vdd_1v0_lcd: LDO_REG6 {
 327                                 regulator-name = "vdd_1v0_lcd";
 328                                 regulator-always-on;
 329                                 regulator-boot-on;
 330                                 regulator-min-microvolt = <1000000>;
 331                                 regulator-max-microvolt = <1000000>;
 332                                 regulator-state-mem {
 333                                         regulator-on-in-suspend;
 334                                         regulator-suspend-microvolt = <1000000>;
 335                                 };
 336                         };
 337
 338                         /* vcc7 */
 339                         vdd_1v8_ldo: LDO_REG7 {
 340                                 regulator-name = "vdd_1v8_ldo";
 341                                 regulator-always-on;
 342                                 regulator-boot-on;
 343                                 regulator-min-microvolt = <1800000>;
 344                                 regulator-max-microvolt = <1800000>;
 345                                 regulator-state-mem {
 346                                         regulator-off-in-suspend;
 347                                         regulator-suspend-microvolt = <1800000>;
 348                                 };
 349                         };
 350
 351                         /* vcc9 */
 352                         vdd_io_sd: LDO_REG9 {
 353                                 regulator-name = "vdd_io_sd";
 354                                 regulator-always-on;
 355                                 regulator-boot-on;
 356                                 regulator-min-microvolt = <3300000>;
 357                                 regulator-max-microvolt = <3300000>;
 358                                 regulator-state-mem {
 359                                         regulator-on-in-suspend;
 360                                         regulator-suspend-microvolt = <3300000>;
 361                                 };
 362                         };
 363                 };
 364         };
 365
 366         /* M24C32-D */
 367         i2c_eeprom: eeprom@50 {
 368                 compatible = "atmel,24c32";
 369                 reg = <0x50>;
 370                 pagesize = <32>;
 371         };
 372
 373         vdd_cpu: regulator@60 {
 374                 compatible = "fcs,fan53555";
 375                 reg = <0x60>;
 376                 fcs,suspend-voltage-selector = <1>;
 377                 regulator-always-on;
 378                 regulator-boot-on;
 379                 regulator-enable-ramp-delay = <300>;
 380                 regulator-name = "vdd_cpu";
 381                 regulator-min-microvolt = <800000>;
 382                 regulator-max-microvolt = <1430000>;
 383                 regulator-ramp-delay = <8000>;
 384                 vin-supply = <&vdd_sys>;
 385         };
 386 };
 387
 388 &i2s {
 389         #sound-dai-cells = <0>;
 390         status = "okay";
 391 };
 392
 393 &rga {
 394         status = "okay";
 395 };
 396
 397 &pinctrl {
 398         pcfg_output_high: pcfg-output-high {
 399                 output-high;
 400         };
 401
 402         emmc {
 403                 /*
 404                  * We run eMMC at max speed; bump up drive strength.
 405                  * We also have external pulls, so disable the internal ones.
 406                  */
 407                 emmc_clk: emmc-clk {
 408                         rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
 409                 };
 410
 411                 emmc_cmd: emmc-cmd {
 412                         rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
 413                 };
 414
 415                 emmc_bus8: emmc-bus8 {
 416                         rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
 417                                         <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
 418                                         <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
 419                                         <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
 420                                         <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
 421                                         <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
 422                                         <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
 423                                         <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
 424                 };
 425         };
 426
 427         gmac {
 428                 phy_int: phy-int {
 429                         rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
 430                 };
 431
 432                 phy_rst: phy-rst {
 433                         rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
 434                 };
 435         };
 436
 437         leds {
 438                 user_led: user-led {
 439                         rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
 440                 };
 441         };
 442
 443         pmic {
 444                 pmic_int: pmic-int {
 445                         rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
 446                 };
 447
 448                 /* Pin for switching state between sleep and non-sleep state */
 449                 pmic_sleep: pmic-sleep {
 450                         rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
 451                 };
 452         };
 453 };
 454
 455 &pwm1 {
 456         status = "okay";
 457 };
 458
 459 &saradc {
 460         status = "okay";
 461         vref-supply = <&vdd_1v8_ldo>;
 462 };
 463
 464 &spi2 {
 465         status = "okay";
 466
 467         serial_flash: flash@0 {
 468                 compatible = "micron,n25q128a13", "jedec,spi-nor";
 469                 reg = <0x0>;
 470                 spi-max-frequency = <50000000>;
 471                 m25p,fast-read;
 472                 #address-cells = <1>;
 473                 #size-cells = <1>;
 474                 status = "okay";
 475         };
 476 };
 477
 478 &tsadc {
 479         status = "okay";
 480         rockchip,hw-tshut-mode = <0>;
 481         rockchip,hw-tshut-polarity = <0>;
 482         pinctrl-1 = <&otp_gpio>;
 483 };
 484
 485 &vopb {
 486         status = "okay";
 487 };
 488
 489 &vopb_mmu {
 490         status = "okay";
 491 };
 492
 493 &vopl {
 494         status = "okay";
 495 };
 496
 497 &vopl_mmu {
 498         status = "okay";
 499 };
 500
 501 &vpu_service {
 502         status = "okay";
 503 };
 504
 505 &wdt {
 506         status = "okay";
 507 };