2 * Samsung's S3C64xx SoC series common device tree source
4 * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
6 * Samsung's S3C64xx SoC series device nodes are listed in this file.
7 * Particular SoCs from S3C64xx series can include this file and provide
8 * values for SoCs specfic bindings.
10 * Note: This file does not include device nodes for all the controllers in
11 * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
12 * nodes can be added to this file.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
19 #include "skeleton.dtsi"
20 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
34 compatible = "arm,arm1176jzf-s", "arm,arm1176";
40 compatible = "simple-bus";
45 vic0: interrupt-controller@71200000 {
46 compatible = "arm,pl192-vic";
48 reg = <0x71200000 0x1000>;
49 #interrupt-cells = <1>;
52 vic1: interrupt-controller@71300000 {
53 compatible = "arm,pl192-vic";
55 reg = <0x71300000 0x1000>;
56 #interrupt-cells = <1>;
59 sdhci0: sdhci@7c200000 {
60 compatible = "samsung,s3c6410-sdhci";
61 reg = <0x7c200000 0x100>;
62 interrupt-parent = <&vic1>;
64 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
65 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
70 sdhci1: sdhci@7c300000 {
71 compatible = "samsung,s3c6410-sdhci";
72 reg = <0x7c300000 0x100>;
73 interrupt-parent = <&vic1>;
75 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
76 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
81 sdhci2: sdhci@7c400000 {
82 compatible = "samsung,s3c6410-sdhci";
83 reg = <0x7c400000 0x100>;
84 interrupt-parent = <&vic1>;
86 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
87 clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
92 watchdog: watchdog@7e004000 {
93 compatible = "samsung,s3c2410-wdt";
94 reg = <0x7e004000 0x1000>;
95 interrupt-parent = <&vic0>;
97 clock-names = "watchdog";
98 clocks = <&clocks PCLK_WDT>;
103 compatible = "samsung,s3c2440-i2c";
104 reg = <0x7f004000 0x1000>;
105 interrupt-parent = <&vic1>;
108 clocks = <&clocks PCLK_IIC0>;
110 #address-cells = <1>;
114 uart0: serial@7f005000 {
115 compatible = "samsung,s3c6400-uart";
116 reg = <0x7f005000 0x100>;
117 interrupt-parent = <&vic1>;
119 clock-names = "uart", "clk_uart_baud2",
121 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
126 uart1: serial@7f005400 {
127 compatible = "samsung,s3c6400-uart";
128 reg = <0x7f005400 0x100>;
129 interrupt-parent = <&vic1>;
131 clock-names = "uart", "clk_uart_baud2",
133 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
138 uart2: serial@7f005800 {
139 compatible = "samsung,s3c6400-uart";
140 reg = <0x7f005800 0x100>;
141 interrupt-parent = <&vic1>;
143 clock-names = "uart", "clk_uart_baud2",
145 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
150 uart3: serial@7f005c00 {
151 compatible = "samsung,s3c6400-uart";
152 reg = <0x7f005c00 0x100>;
153 interrupt-parent = <&vic1>;
155 clock-names = "uart", "clk_uart_baud2",
157 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
163 compatible = "samsung,s3c6400-pwm";
164 reg = <0x7f006000 0x1000>;
165 interrupt-parent = <&vic0>;
166 interrupts = <23>, <24>, <25>, <27>, <28>;
167 clock-names = "timers";
168 clocks = <&clocks PCLK_PWM>;
169 samsung,pwm-outputs = <0>, <1>;
174 pinctrl0: pinctrl@7f008000 {
175 compatible = "samsung,s3c64xx-pinctrl";
176 reg = <0x7f008000 0x1000>;
177 interrupt-parent = <&vic1>;
180 pctrl_int_map: pinctrl-interrupt-map {
181 interrupt-map = <0 &vic0 0>,
185 #address-cells = <0>;
187 #interrupt-cells = <1>;
190 wakeup-interrupt-controller {
191 compatible = "samsung,s3c64xx-wakeup-eint";
192 interrupts = <0>, <1>, <2>, <3>;
193 interrupt-parent = <&pctrl_int_map>;
199 #include "s3c64xx-pinctrl.dtsi"