arch/arm/boot/dts/sama5d3.dtsi

   1 /*
   2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
   3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
   4  *
   5  *  Copyright (C) 2013 Atmel,
   6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/dma/at91.h>
  13 #include <dt-bindings/pinctrl/at91.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/clock/at91.h>
  17
  18 / {
  19         model = "Atmel SAMA5D3 family SoC";
  20         compatible = "atmel,sama5d3", "atmel,sama5";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 serial4 = &usart3;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 gpio4 = &pioE;
  34                 tcb0 = &tcb0;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 ssc1 = &ssc1;
  40                 pwm0 = &pwm0;
  41         };
  42         cpus {
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45                 cpu@0 {
  46                         device_type = "cpu";
  47                         compatible = "arm,cortex-a5";
  48                         reg = <0x0>;
  49                 };
  50         };
  51
  52         pmu {
  53                 compatible = "arm,cortex-a5-pmu";
  54                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
  55         };
  56
  57         memory {
  58                 reg = <0x20000000 0x8000000>;
  59         };
  60
  61         clocks {
  62                 slow_xtal: slow_xtal {
  63                         compatible = "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <0>;
  66                 };
  67
  68                 main_xtal: main_xtal {
  69                         compatible = "fixed-clock";
  70                         #clock-cells = <0>;
  71                         clock-frequency = <0>;
  72                 };
  73
  74                 adc_op_clk: adc_op_clk{
  75                         compatible = "fixed-clock";
  76                         #clock-cells = <0>;
  77                         clock-frequency = <20000000>;
  78                 };
  79         };
  80
  81         sram: sram@00300000 {
  82                 compatible = "mmio-sram";
  83                 reg = <0x00300000 0x20000>;
  84         };
  85
  86         ahb {
  87                 compatible = "simple-bus";
  88                 #address-cells = <1>;
  89                 #size-cells = <1>;
  90                 ranges;
  91
  92                 apb {
  93                         compatible = "simple-bus";
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         ranges;
  97
  98                         mmc0: mmc@f0000000 {
  99                                 compatible = "atmel,hsmci";
 100                                 reg = <0xf0000000 0x600>;
 101                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 102                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
 103                                 dma-names = "rxtx";
 104                                 pinctrl-names = "default";
 105                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
 106                                 status = "disabled";
 107                                 #address-cells = <1>;
 108                                 #size-cells = <0>;
 109                                 clocks = <&mci0_clk>;
 110                                 clock-names = "mci_clk";
 111                         };
 112
 113                         spi0: spi@f0004000 {
 114                                 #address-cells = <1>;
 115                                 #size-cells = <0>;
 116                                 compatible = "atmel,at91rm9200-spi";
 117                                 reg = <0xf0004000 0x100>;
 118                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
 119                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
 120                                        <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
 121                                 dma-names = "tx", "rx";
 122                                 pinctrl-names = "default";
 123                                 pinctrl-0 = <&pinctrl_spi0>;
 124                                 clocks = <&spi0_clk>;
 125                                 clock-names = "spi_clk";
 126                                 status = "disabled";
 127                         };
 128
 129                         ssc0: ssc@f0008000 {
 130                                 compatible = "atmel,at91sam9g45-ssc";
 131                                 reg = <0xf0008000 0x4000>;
 132                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
 133                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
 134                                        <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
 135                                 dma-names = "tx", "rx";
 136                                 pinctrl-names = "default";
 137                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 138                                 clocks = <&ssc0_clk>;
 139                                 clock-names = "pclk";
 140                                 status = "disabled";
 141                         };
 142
 143                         tcb0: timer@f0010000 {
 144                                 compatible = "atmel,at91sam9x5-tcb";
 145                                 reg = <0xf0010000 0x100>;
 146                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 147                                 clocks = <&tcb0_clk>;
 148                                 clock-names = "t0_clk";
 149                         };
 150
 151                         i2c0: i2c@f0014000 {
 152                                 compatible = "atmel,at91sam9x5-i2c";
 153                                 reg = <0xf0014000 0x4000>;
 154                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
 155                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
 156                                        <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
 157                                 dma-names = "tx", "rx";
 158                                 pinctrl-names = "default";
 159                                 pinctrl-0 = <&pinctrl_i2c0>;
 160                                 #address-cells = <1>;
 161                                 #size-cells = <0>;
 162                                 clocks = <&twi0_clk>;
 163                                 status = "disabled";
 164                         };
 165
 166                         i2c1: i2c@f0018000 {
 167                                 compatible = "atmel,at91sam9x5-i2c";
 168                                 reg = <0xf0018000 0x4000>;
 169                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
 170                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
 171                                        <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
 172                                 dma-names = "tx", "rx";
 173                                 pinctrl-names = "default";
 174                                 pinctrl-0 = <&pinctrl_i2c1>;
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                                 clocks = <&twi1_clk>;
 178                                 status = "disabled";
 179                         };
 180
 181                         usart0: serial@f001c000 {
 182                                 compatible = "atmel,at91sam9260-usart";
 183                                 reg = <0xf001c000 0x100>;
 184                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 185                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
 186                                        <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 187                                 dma-names = "tx", "rx";
 188                                 pinctrl-names = "default";
 189                                 pinctrl-0 = <&pinctrl_usart0>;
 190                                 clocks = <&usart0_clk>;
 191                                 clock-names = "usart";
 192                                 status = "disabled";
 193                         };
 194
 195                         usart1: serial@f0020000 {
 196                                 compatible = "atmel,at91sam9260-usart";
 197                                 reg = <0xf0020000 0x100>;
 198                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 199                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
 200                                        <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 201                                 dma-names = "tx", "rx";
 202                                 pinctrl-names = "default";
 203                                 pinctrl-0 = <&pinctrl_usart1>;
 204                                 clocks = <&usart1_clk>;
 205                                 clock-names = "usart";
 206                                 status = "disabled";
 207                         };
 208
 209                         pwm0: pwm@f002c000 {
 210                                 compatible = "atmel,sama5d3-pwm";
 211                                 reg = <0xf002c000 0x300>;
 212                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
 213                                 #pwm-cells = <3>;
 214                                 clocks = <&pwm_clk>;
 215                                 status = "disabled";
 216                         };
 217
 218                         isi: isi@f0034000 {
 219                                 compatible = "atmel,at91sam9g45-isi";
 220                                 reg = <0xf0034000 0x4000>;
 221                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
 222                                 clocks = <&isi_clk>;
 223                                 clock-names = "isi_clk";
 224                                 status = "disabled";
 225                         };
 226
 227                         sfr: sfr@f0038000 {
 228                                 compatible = "atmel,sama5d3-sfr", "syscon";
 229                                 reg = <0xf0038000 0x60>;
 230                         };
 231
 232                         mmc1: mmc@f8000000 {
 233                                 compatible = "atmel,hsmci";
 234                                 reg = <0xf8000000 0x600>;
 235                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
 236                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
 237                                 dma-names = "rxtx";
 238                                 pinctrl-names = "default";
 239                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 240                                 status = "disabled";
 241                                 #address-cells = <1>;
 242                                 #size-cells = <0>;
 243                                 clocks = <&mci1_clk>;
 244                                 clock-names = "mci_clk";
 245                         };
 246
 247                         spi1: spi@f8008000 {
 248                                 #address-cells = <1>;
 249                                 #size-cells = <0>;
 250                                 compatible = "atmel,at91rm9200-spi";
 251                                 reg = <0xf8008000 0x100>;
 252                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
 253                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
 254                                        <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
 255                                 dma-names = "tx", "rx";
 256                                 pinctrl-names = "default";
 257                                 pinctrl-0 = <&pinctrl_spi1>;
 258                                 clocks = <&spi1_clk>;
 259                                 clock-names = "spi_clk";
 260                                 status = "disabled";
 261                         };
 262
 263                         ssc1: ssc@f800c000 {
 264                                 compatible = "atmel,at91sam9g45-ssc";
 265                                 reg = <0xf800c000 0x4000>;
 266                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
 267                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
 268                                        <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
 269                                 dma-names = "tx", "rx";
 270                                 pinctrl-names = "default";
 271                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 272                                 clocks = <&ssc1_clk>;
 273                                 clock-names = "pclk";
 274                                 status = "disabled";
 275                         };
 276
 277                         adc0: adc@f8018000 {
 278                                 #address-cells = <1>;
 279                                 #size-cells = <0>;
 280                                 compatible = "atmel,at91sam9x5-adc";
 281                                 reg = <0xf8018000 0x100>;
 282                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 283                                 pinctrl-names = "default";
 284                                 pinctrl-0 = <
 285                                         &pinctrl_adc0_adtrg
 286                                         &pinctrl_adc0_ad0
 287                                         &pinctrl_adc0_ad1
 288                                         &pinctrl_adc0_ad2
 289                                         &pinctrl_adc0_ad3
 290                                         &pinctrl_adc0_ad4
 291                                         &pinctrl_adc0_ad5
 292                                         &pinctrl_adc0_ad6
 293                                         &pinctrl_adc0_ad7
 294                                         &pinctrl_adc0_ad8
 295                                         &pinctrl_adc0_ad9
 296                                         &pinctrl_adc0_ad10
 297                                         &pinctrl_adc0_ad11
 298                                         >;
 299                                 clocks = <&adc_clk>,
 300                                          <&adc_op_clk>;
 301                                 clock-names = "adc_clk", "adc_op_clk";
 302                                 atmel,adc-channels-used = <0xfff>;
 303                                 atmel,adc-startup-time = <40>;
 304                                 atmel,adc-use-external-triggers;
 305                                 atmel,adc-vref = <3000>;
 306                                 atmel,adc-res = <10 12>;
 307                                 atmel,adc-res-names = "lowres", "highres";
 308                                 status = "disabled";
 309
 310                                 trigger@0 {
 311                                         reg = <0>;
 312                                         trigger-name = "external-rising";
 313                                         trigger-value = <0x1>;
 314                                         trigger-external;
 315                                 };
 316                                 trigger@1 {
 317                                         reg = <1>;
 318                                         trigger-name = "external-falling";
 319                                         trigger-value = <0x2>;
 320                                         trigger-external;
 321                                 };
 322                                 trigger@2 {
 323                                         reg = <2>;
 324                                         trigger-name = "external-any";
 325                                         trigger-value = <0x3>;
 326                                         trigger-external;
 327                                 };
 328                                 trigger@3 {
 329                                         reg = <3>;
 330                                         trigger-name = "continuous";
 331                                         trigger-value = <0x6>;
 332                                 };
 333                         };
 334
 335                         i2c2: i2c@f801c000 {
 336                                 compatible = "atmel,at91sam9x5-i2c";
 337                                 reg = <0xf801c000 0x4000>;
 338                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
 339                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
 340                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
 341                                 dma-names = "tx", "rx";
 342                                 pinctrl-names = "default";
 343                                 pinctrl-0 = <&pinctrl_i2c2>;
 344                                 #address-cells = <1>;
 345                                 #size-cells = <0>;
 346                                 clocks = <&twi2_clk>;
 347                                 status = "disabled";
 348                         };
 349
 350                         usart2: serial@f8020000 {
 351                                 compatible = "atmel,at91sam9260-usart";
 352                                 reg = <0xf8020000 0x100>;
 353                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 354                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
 355                                        <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 356                                 dma-names = "tx", "rx";
 357                                 pinctrl-names = "default";
 358                                 pinctrl-0 = <&pinctrl_usart2>;
 359                                 clocks = <&usart2_clk>;
 360                                 clock-names = "usart";
 361                                 status = "disabled";
 362                         };
 363
 364                         usart3: serial@f8024000 {
 365                                 compatible = "atmel,at91sam9260-usart";
 366                                 reg = <0xf8024000 0x100>;
 367                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 368                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
 369                                        <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 370                                 dma-names = "tx", "rx";
 371                                 pinctrl-names = "default";
 372                                 pinctrl-0 = <&pinctrl_usart3>;
 373                                 clocks = <&usart3_clk>;
 374                                 clock-names = "usart";
 375                                 status = "disabled";
 376                         };
 377
 378                         sha@f8034000 {
 379                                 compatible = "atmel,at91sam9g46-sha";
 380                                 reg = <0xf8034000 0x100>;
 381                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
 382                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
 383                                 dma-names = "tx";
 384                                 clocks = <&sha_clk>;
 385                                 clock-names = "sha_clk";
 386                         };
 387
 388                         aes@f8038000 {
 389                                 compatible = "atmel,at91sam9g46-aes";
 390                                 reg = <0xf8038000 0x100>;
 391                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
 392                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
 393                                        <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
 394                                 dma-names = "tx", "rx";
 395                                 clocks = <&aes_clk>;
 396                                 clock-names = "aes_clk";
 397                         };
 398
 399                         tdes@f803c000 {
 400                                 compatible = "atmel,at91sam9g46-tdes";
 401                                 reg = <0xf803c000 0x100>;
 402                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
 403                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
 404                                        <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
 405                                 dma-names = "tx", "rx";
 406                                 clocks = <&tdes_clk>;
 407                                 clock-names = "tdes_clk";
 408                         };
 409
 410                         dma0: dma-controller@ffffe600 {
 411                                 compatible = "atmel,at91sam9g45-dma";
 412                                 reg = <0xffffe600 0x200>;
 413                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
 414                                 #dma-cells = <2>;
 415                                 clocks = <&dma0_clk>;
 416                                 clock-names = "dma_clk";
 417                         };
 418
 419                         dma1: dma-controller@ffffe800 {
 420                                 compatible = "atmel,at91sam9g45-dma";
 421                                 reg = <0xffffe800 0x200>;
 422                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 423                                 #dma-cells = <2>;
 424                                 clocks = <&dma1_clk>;
 425                                 clock-names = "dma_clk";
 426                         };
 427
 428                         ramc0: ramc@ffffea00 {
 429                                 compatible = "atmel,sama5d3-ddramc";
 430                                 reg = <0xffffea00 0x200>;
 431                                 clocks = <&ddrck>, <&mpddr_clk>;
 432                                 clock-names = "ddrck", "mpddr";
 433                         };
 434
 435                         dbgu: serial@ffffee00 {
 436                                 compatible = "atmel,at91sam9260-usart";
 437                                 reg = <0xffffee00 0x200>;
 438                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 439                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
 440                                        <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 441                                 dma-names = "tx", "rx";
 442                                 pinctrl-names = "default";
 443                                 pinctrl-0 = <&pinctrl_dbgu>;
 444                                 clocks = <&dbgu_clk>;
 445                                 clock-names = "usart";
 446                                 status = "disabled";
 447                         };
 448
 449                         aic: interrupt-controller@fffff000 {
 450                                 #interrupt-cells = <3>;
 451                                 compatible = "atmel,sama5d3-aic";
 452                                 interrupt-controller;
 453                                 reg = <0xfffff000 0x200>;
 454                                 atmel,external-irqs = <47>;
 455                         };
 456
 457                         pinctrl@fffff200 {
 458                                 #address-cells = <1>;
 459                                 #size-cells = <1>;
 460                                 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
 461                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 462                                 atmel,mux-mask = <
 463                                         /*   A          B          C  */
 464                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
 465                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
 466                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
 467                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
 468                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
 469                                         >;
 470
 471                                 /* shared pinctrl settings */
 472                                 adc0 {
 473                                         pinctrl_adc0_adtrg: adc0_adtrg {
 474                                                 atmel,pins =
 475                                                         <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
 476                                         };
 477                                         pinctrl_adc0_ad0: adc0_ad0 {
 478                                                 atmel,pins =
 479                                                         <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
 480                                         };
 481                                         pinctrl_adc0_ad1: adc0_ad1 {
 482                                                 atmel,pins =
 483                                                         <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
 484                                         };
 485                                         pinctrl_adc0_ad2: adc0_ad2 {
 486                                                 atmel,pins =
 487                                                         <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
 488                                         };
 489                                         pinctrl_adc0_ad3: adc0_ad3 {
 490                                                 atmel,pins =
 491                                                         <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
 492                                         };
 493                                         pinctrl_adc0_ad4: adc0_ad4 {
 494                                                 atmel,pins =
 495                                                         <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
 496                                         };
 497                                         pinctrl_adc0_ad5: adc0_ad5 {
 498                                                 atmel,pins =
 499                                                         <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
 500                                         };
 501                                         pinctrl_adc0_ad6: adc0_ad6 {
 502                                                 atmel,pins =
 503                                                         <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
 504                                         };
 505                                         pinctrl_adc0_ad7: adc0_ad7 {
 506                                                 atmel,pins =
 507                                                         <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
 508                                         };
 509                                         pinctrl_adc0_ad8: adc0_ad8 {
 510                                                 atmel,pins =
 511                                                         <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
 512                                         };
 513                                         pinctrl_adc0_ad9: adc0_ad9 {
 514                                                 atmel,pins =
 515                                                         <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
 516                                         };
 517                                         pinctrl_adc0_ad10: adc0_ad10 {
 518                                                 atmel,pins =
 519                                                         <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
 520                                         };
 521                                         pinctrl_adc0_ad11: adc0_ad11 {
 522                                                 atmel,pins =
 523                                                         <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
 524                                         };
 525                                 };
 526
 527                                 dbgu {
 528                                         pinctrl_dbgu: dbgu-0 {
 529                                                 atmel,pins =
 530                                                         <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB30 periph A */
 531                                                          AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB31 periph A with pullup */
 532                                         };
 533                                 };
 534
 535                                 i2c0 {
 536                                         pinctrl_i2c0: i2c0-0 {
 537                                                 atmel,pins =
 538                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
 539                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
 540                                         };
 541                                 };
 542
 543                                 i2c1 {
 544                                         pinctrl_i2c1: i2c1-0 {
 545                                                 atmel,pins =
 546                                                         <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
 547                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
 548                                         };
 549                                 };
 550
 551                                 i2c2 {
 552                                         pinctrl_i2c2: i2c2-0 {
 553                                                 atmel,pins =
 554                                                         <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
 555                                                          AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
 556                                         };
 557                                 };
 558
 559                                 isi {
 560                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
 561                                                 atmel,pins =
 562                                                         <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
 563                                                          AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
 564                                                          AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
 565                                                          AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
 566                                                          AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
 567                                                          AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
 568                                                          AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
 569                                                          AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
 570                                                          AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
 571                                                          AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
 572                                                          AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
 573                                         };
 574
 575                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
 576                                                 atmel,pins =
 577                                                         <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
 578                                                          AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
 579                                         };
 580
 581                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
 582                                                 atmel,pins =
 583                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
 584                                                          AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
 585                                         };
 586
 587                                         pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
 588                                                 atmel,pins =
 589                                                         <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
 590                                         };
 591                                 };
 592
 593                                 mmc0 {
 594                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 595                                                 atmel,pins =
 596                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A MCI0_CK */
 597                                                          AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
 598                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD1 periph A MCI0_DA0 with pullup */
 599                                         };
 600                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 601                                                 atmel,pins =
 602                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
 603                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
 604                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD4 periph A MCI0_DA3 with pullup */
 605                                         };
 606                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
 607                                                 atmel,pins =
 608                                                         <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
 609                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
 610                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
 611                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
 612                                         };
 613                                 };
 614
 615                                 mmc1 {
 616                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
 617                                                 atmel,pins =
 618                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
 619                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
 620                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
 621                                         };
 622                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
 623                                                 atmel,pins =
 624                                                         <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
 625                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
 626                                                          AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
 627                                         };
 628                                 };
 629
 630                                 nand0 {
 631                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
 632                                                 atmel,pins =
 633                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PE21 periph A with pullup */
 634                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PE22 periph A with pullup */
 635                                         };
 636                                 };
 637
 638                                 pwm0 {
 639                                         pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
 640                                                 atmel,pins =
 641                                                         <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
 642                                         };
 643                                         pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
 644                                                 atmel,pins =
 645                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTX0 */
 646                                         };
 647                                         pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
 648                                                 atmel,pins =
 649                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
 650                                         };
 651                                         pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
 652                                                 atmel,pins =
 653                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTX1 */
 654                                         };
 655
 656                                         pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
 657                                                 atmel,pins =
 658                                                         <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
 659                                         };
 660                                         pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
 661                                                 atmel,pins =
 662                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GRX0 */
 663                                         };
 664                                         pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
 665                                                 atmel,pins =
 666                                                         <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
 667                                         };
 668                                         pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
 669                                                 atmel,pins =
 670                                                         <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
 671                                         };
 672                                         pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
 673                                                 atmel,pins =
 674                                                         <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GRX1 */
 675                                         };
 676                                         pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
 677                                                 atmel,pins =
 678                                                         <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
 679                                         };
 680
 681                                         pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
 682                                                 atmel,pins =
 683                                                         <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTXCK */
 684                                         };
 685                                         pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
 686                                                 atmel,pins =
 687                                                         <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA4 and TIOA0 */
 688                                         };
 689                                         pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
 690                                                 atmel,pins =
 691                                                         <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTXEN */
 692                                         };
 693                                         pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
 694                                                 atmel,pins =
 695                                                         <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA5 and TIOB0 */
 696                                         };
 697
 698                                         pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
 699                                                 atmel,pins =
 700                                                         <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
 701                                         };
 702                                         pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
 703                                                 atmel,pins =
 704                                                         <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA6 and TCLK0 */
 705                                         };
 706                                         pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
 707                                                 atmel,pins =
 708                                                         <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
 709                                         };
 710                                         pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
 711                                                 atmel,pins =
 712                                                         <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA7 */
 713                                         };
 714                                 };
 715
 716                                 spi0 {
 717                                         pinctrl_spi0: spi0-0 {
 718                                                 atmel,pins =
 719                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A SPI0_MISO pin */
 720                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A SPI0_MOSI pin */
 721                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
 722                                         };
 723                                 };
 724
 725                                 spi1 {
 726                                         pinctrl_spi1: spi1-0 {
 727                                                 atmel,pins =
 728                                                         <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A SPI1_MISO pin */
 729                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A SPI1_MOSI pin */
 730                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
 731                                         };
 732                                 };
 733
 734                                 ssc0 {
 735                                         pinctrl_ssc0_tx: ssc0_tx {
 736                                                 atmel,pins =
 737                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A TK0 */
 738                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC17 periph A TF0 */
 739                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
 740                                         };
 741
 742                                         pinctrl_ssc0_rx: ssc0_rx {
 743                                                 atmel,pins =
 744                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A RK0 */
 745                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC20 periph A RF0 */
 746                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
 747                                         };
 748                                 };
 749
 750                                 ssc1 {
 751                                         pinctrl_ssc1_tx: ssc1_tx {
 752                                                 atmel,pins =
 753                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB2 periph B TK1, conflicts with GTX2 */
 754                                                          AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B TF1, conflicts with GTX3 */
 755                                                          AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB6 periph B TD1, conflicts with TD1 */
 756                                         };
 757
 758                                         pinctrl_ssc1_rx: ssc1_rx {
 759                                                 atmel,pins =
 760                                                         <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB7 periph B RK1, conflicts with EREFCK */
 761                                                          AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB10 periph B RF1, conflicts with GTXER */
 762                                                          AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
 763                                         };
 764                                 };
 765
 766                                 usart0 {
 767                                         pinctrl_usart0: usart0-0 {
 768                                                 atmel,pins =
 769                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A */
 770                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PD18 periph A with pullup */
 771                                         };
 772
 773                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
 774                                                 atmel,pins =
 775                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
 776                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
 777                                         };
 778                                 };
 779
 780                                 usart1 {
 781                                         pinctrl_usart1: usart1-0 {
 782                                                 atmel,pins =
 783                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB28 periph A */
 784                                                          AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB29 periph A with pullup */
 785                                         };
 786
 787                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
 788                                                 atmel,pins =
 789                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB26 periph A, conflicts with GRX7 */
 790                                                          AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
 791                                         };
 792                                 };
 793
 794                                 usart2 {
 795                                         pinctrl_usart2: usart2-0 {
 796                                                 atmel,pins =
 797                                                         <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE25 periph B, conflicts with A25 */
 798                                                          AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE26 periph B with pullup, conflicts NCS0 */
 799                                         };
 800
 801                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
 802                                                 atmel,pins =
 803                                                         <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE23 periph B, conflicts with A23 */
 804                                                          AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
 805                                         };
 806                                 };
 807
 808                                 usart3 {
 809                                         pinctrl_usart3: usart3-0 {
 810                                                 atmel,pins =
 811                                                         <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE18 periph B, conflicts with A18 */
 812                                                          AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE19 periph B with pullup, conflicts with A19 */
 813                                         };
 814
 815                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
 816                                                 atmel,pins =
 817                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE16 periph B, conflicts with A16 */
 818                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
 819                                         };
 820                                 };
 821
 822
 823                                 pioA: gpio@fffff200 {
 824                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 825                                         reg = <0xfffff200 0x100>;
 826                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
 827                                         #gpio-cells = <2>;
 828                                         gpio-controller;
 829                                         interrupt-controller;
 830                                         #interrupt-cells = <2>;
 831                                         clocks = <&pioA_clk>;
 832                                 };
 833
 834                                 pioB: gpio@fffff400 {
 835                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 836                                         reg = <0xfffff400 0x100>;
 837                                         interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
 838                                         #gpio-cells = <2>;
 839                                         gpio-controller;
 840                                         interrupt-controller;
 841                                         #interrupt-cells = <2>;
 842                                         clocks = <&pioB_clk>;
 843                                 };
 844
 845                                 pioC: gpio@fffff600 {
 846                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 847                                         reg = <0xfffff600 0x100>;
 848                                         interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
 849                                         #gpio-cells = <2>;
 850                                         gpio-controller;
 851                                         interrupt-controller;
 852                                         #interrupt-cells = <2>;
 853                                         clocks = <&pioC_clk>;
 854                                 };
 855
 856                                 pioD: gpio@fffff800 {
 857                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 858                                         reg = <0xfffff800 0x100>;
 859                                         interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
 860                                         #gpio-cells = <2>;
 861                                         gpio-controller;
 862                                         interrupt-controller;
 863                                         #interrupt-cells = <2>;
 864                                         clocks = <&pioD_clk>;
 865                                 };
 866
 867                                 pioE: gpio@fffffa00 {
 868                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 869                                         reg = <0xfffffa00 0x100>;
 870                                         interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
 871                                         #gpio-cells = <2>;
 872                                         gpio-controller;
 873                                         interrupt-controller;
 874                                         #interrupt-cells = <2>;
 875                                         clocks = <&pioE_clk>;
 876                                 };
 877                         };
 878
 879                         pmc: pmc@fffffc00 {
 880                                 compatible = "atmel,sama5d3-pmc";
 881                                 reg = <0xfffffc00 0x120>;
 882                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 883                                 interrupt-controller;
 884                                 #address-cells = <1>;
 885                                 #size-cells = <0>;
 886                                 #interrupt-cells = <1>;
 887
 888                                 main_rc_osc: main_rc_osc {
 889                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 890                                         #clock-cells = <0>;
 891                                         interrupt-parent = <&pmc>;
 892                                         interrupts = <AT91_PMC_MOSCRCS>;
 893                                         clock-frequency = <12000000>;
 894                                         clock-accuracy = <50000000>;
 895                                 };
 896
 897                                 main_osc: main_osc {
 898                                         compatible = "atmel,at91rm9200-clk-main-osc";
 899                                         #clock-cells = <0>;
 900                                         interrupt-parent = <&pmc>;
 901                                         interrupts = <AT91_PMC_MOSCS>;
 902                                         clocks = <&main_xtal>;
 903                                 };
 904
 905                                 main: mainck {
 906                                         compatible = "atmel,at91sam9x5-clk-main";
 907                                         #clock-cells = <0>;
 908                                         interrupt-parent = <&pmc>;
 909                                         interrupts = <AT91_PMC_MOSCSELS>;
 910                                         clocks = <&main_rc_osc &main_osc>;
 911                                 };
 912
 913                                 plla: pllack {
 914                                         compatible = "atmel,sama5d3-clk-pll";
 915                                         #clock-cells = <0>;
 916                                         interrupt-parent = <&pmc>;
 917                                         interrupts = <AT91_PMC_LOCKA>;
 918                                         clocks = <&main>;
 919                                         reg = <0>;
 920                                         atmel,clk-input-range = <8000000 50000000>;
 921                                         #atmel,pll-clk-output-range-cells = <4>;
 922                                         atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
 923                                 };
 924
 925                                 plladiv: plladivck {
 926                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 927                                         #clock-cells = <0>;
 928                                         clocks = <&plla>;
 929                                 };
 930
 931                                 utmi: utmick {
 932                                         compatible = "atmel,at91sam9x5-clk-utmi";
 933                                         #clock-cells = <0>;
 934                                         interrupt-parent = <&pmc>;
 935                                         interrupts = <AT91_PMC_LOCKU>;
 936                                         clocks = <&main>;
 937                                 };
 938
 939                                 mck: masterck {
 940                                         compatible = "atmel,at91sam9x5-clk-master";
 941                                         #clock-cells = <0>;
 942                                         interrupt-parent = <&pmc>;
 943                                         interrupts = <AT91_PMC_MCKRDY>;
 944                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 945                                         atmel,clk-output-range = <0 166000000>;
 946                                         atmel,clk-divisors = <1 2 4 3>;
 947                                 };
 948
 949                                 usb: usbck {
 950                                         compatible = "atmel,at91sam9x5-clk-usb";
 951                                         #clock-cells = <0>;
 952                                         clocks = <&plladiv>, <&utmi>;
 953                                 };
 954
 955                                 prog: progck {
 956                                         compatible = "atmel,at91sam9x5-clk-programmable";
 957                                         #address-cells = <1>;
 958                                         #size-cells = <0>;
 959                                         interrupt-parent = <&pmc>;
 960                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 961
 962                                         prog0: prog0 {
 963                                                 #clock-cells = <0>;
 964                                                 reg = <0>;
 965                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 966                                         };
 967
 968                                         prog1: prog1 {
 969                                                 #clock-cells = <0>;
 970                                                 reg = <1>;
 971                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 972                                         };
 973
 974                                         prog2: prog2 {
 975                                                 #clock-cells = <0>;
 976                                                 reg = <2>;
 977                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 978                                         };
 979                                 };
 980
 981                                 smd: smdclk {
 982                                         compatible = "atmel,at91sam9x5-clk-smd";
 983                                         #clock-cells = <0>;
 984                                         clocks = <&plladiv>, <&utmi>;
 985                                 };
 986
 987                                 systemck {
 988                                         compatible = "atmel,at91rm9200-clk-system";
 989                                         #address-cells = <1>;
 990                                         #size-cells = <0>;
 991
 992                                         ddrck: ddrck {
 993                                                 #clock-cells = <0>;
 994                                                 reg = <2>;
 995                                                 clocks = <&mck>;
 996                                         };
 997
 998                                         smdck: smdck {
 999                                                 #clock-cells = <0>;
1000                                                 reg = <4>;
1001                                                 clocks = <&smd>;
1002                                         };
1003
1004                                         uhpck: uhpck {
1005                                                 #clock-cells = <0>;
1006                                                 reg = <6>;
1007                                                 clocks = <&usb>;
1008                                         };
1009
1010                                         udpck: udpck {
1011                                                 #clock-cells = <0>;
1012                                                 reg = <7>;
1013                                                 clocks = <&usb>;
1014                                         };
1015
1016                                         pck0: pck0 {
1017                                                 #clock-cells = <0>;
1018                                                 reg = <8>;
1019                                                 clocks = <&prog0>;
1020                                         };
1021
1022                                         pck1: pck1 {
1023                                                 #clock-cells = <0>;
1024                                                 reg = <9>;
1025                                                 clocks = <&prog1>;
1026                                         };
1027
1028                                         pck2: pck2 {
1029                                                 #clock-cells = <0>;
1030                                                 reg = <10>;
1031                                                 clocks = <&prog2>;
1032                                         };
1033                                 };
1034
1035                                 periphck {
1036                                         compatible = "atmel,at91sam9x5-clk-peripheral";
1037                                         #address-cells = <1>;
1038                                         #size-cells = <0>;
1039                                         clocks = <&mck>;
1040
1041                                         dbgu_clk: dbgu_clk {
1042                                                 #clock-cells = <0>;
1043                                                 reg = <2>;
1044                                         };
1045
1046                                         hsmc_clk: hsmc_clk {
1047                                                 #clock-cells = <0>;
1048                                                 reg = <5>;
1049                                         };
1050
1051                                         pioA_clk: pioA_clk {
1052                                                 #clock-cells = <0>;
1053                                                 reg = <6>;
1054                                         };
1055
1056                                         pioB_clk: pioB_clk {
1057                                                 #clock-cells = <0>;
1058                                                 reg = <7>;
1059                                         };
1060
1061                                         pioC_clk: pioC_clk {
1062                                                 #clock-cells = <0>;
1063                                                 reg = <8>;
1064                                         };
1065
1066                                         pioD_clk: pioD_clk {
1067                                                 #clock-cells = <0>;
1068                                                 reg = <9>;
1069                                         };
1070
1071                                         pioE_clk: pioE_clk {
1072                                                 #clock-cells = <0>;
1073                                                 reg = <10>;
1074                                         };
1075
1076                                         usart0_clk: usart0_clk {
1077                                                 #clock-cells = <0>;
1078                                                 reg = <12>;
1079                                                 atmel,clk-output-range = <0 66000000>;
1080                                         };
1081
1082                                         usart1_clk: usart1_clk {
1083                                                 #clock-cells = <0>;
1084                                                 reg = <13>;
1085                                                 atmel,clk-output-range = <0 66000000>;
1086                                         };
1087
1088                                         usart2_clk: usart2_clk {
1089                                                 #clock-cells = <0>;
1090                                                 reg = <14>;
1091                                                 atmel,clk-output-range = <0 66000000>;
1092                                         };
1093
1094                                         usart3_clk: usart3_clk {
1095                                                 #clock-cells = <0>;
1096                                                 reg = <15>;
1097                                                 atmel,clk-output-range = <0 66000000>;
1098                                         };
1099
1100                                         twi0_clk: twi0_clk {
1101                                                 reg = <18>;
1102                                                 #clock-cells = <0>;
1103                                                 atmel,clk-output-range = <0 16625000>;
1104                                         };
1105
1106                                         twi1_clk: twi1_clk {
1107                                                 #clock-cells = <0>;
1108                                                 reg = <19>;
1109                                                 atmel,clk-output-range = <0 16625000>;
1110                                         };
1111
1112                                         twi2_clk: twi2_clk {
1113                                                 #clock-cells = <0>;
1114                                                 reg = <20>;
1115                                                 atmel,clk-output-range = <0 16625000>;
1116                                         };
1117
1118                                         mci0_clk: mci0_clk {
1119                                                 #clock-cells = <0>;
1120                                                 reg = <21>;
1121                                         };
1122
1123                                         mci1_clk: mci1_clk {
1124                                                 #clock-cells = <0>;
1125                                                 reg = <22>;
1126                                         };
1127
1128                                         spi0_clk: spi0_clk {
1129                                                 #clock-cells = <0>;
1130                                                 reg = <24>;
1131                                                 atmel,clk-output-range = <0 133000000>;
1132                                         };
1133
1134                                         spi1_clk: spi1_clk {
1135                                                 #clock-cells = <0>;
1136                                                 reg = <25>;
1137                                                 atmel,clk-output-range = <0 133000000>;
1138                                         };
1139
1140                                         tcb0_clk: tcb0_clk {
1141                                                 #clock-cells = <0>;
1142                                                 reg = <26>;
1143                                                 atmel,clk-output-range = <0 133000000>;
1144                                         };
1145
1146                                         pwm_clk: pwm_clk {
1147                                                 #clock-cells = <0>;
1148                                                 reg = <28>;
1149                                         };
1150
1151                                         adc_clk: adc_clk {
1152                                                 #clock-cells = <0>;
1153                                                 reg = <29>;
1154                                                 atmel,clk-output-range = <0 66000000>;
1155                                         };
1156
1157                                         dma0_clk: dma0_clk {
1158                                                 #clock-cells = <0>;
1159                                                 reg = <30>;
1160                                         };
1161
1162                                         dma1_clk: dma1_clk {
1163                                                 #clock-cells = <0>;
1164                                                 reg = <31>;
1165                                         };
1166
1167                                         uhphs_clk: uhphs_clk {
1168                                                 #clock-cells = <0>;
1169                                                 reg = <32>;
1170                                         };
1171
1172                                         udphs_clk: udphs_clk {
1173                                                 #clock-cells = <0>;
1174                                                 reg = <33>;
1175                                         };
1176
1177                                         isi_clk: isi_clk {
1178                                                 #clock-cells = <0>;
1179                                                 reg = <37>;
1180                                         };
1181
1182                                         ssc0_clk: ssc0_clk {
1183                                                 #clock-cells = <0>;
1184                                                 reg = <38>;
1185                                                 atmel,clk-output-range = <0 66000000>;
1186                                         };
1187
1188                                         ssc1_clk: ssc1_clk {
1189                                                 #clock-cells = <0>;
1190                                                 reg = <39>;
1191                                                 atmel,clk-output-range = <0 66000000>;
1192                                         };
1193
1194                                         sha_clk: sha_clk {
1195                                                 #clock-cells = <0>;
1196                                                 reg = <42>;
1197                                         };
1198
1199                                         aes_clk: aes_clk {
1200                                                 #clock-cells = <0>;
1201                                                 reg = <43>;
1202                                         };
1203
1204                                         tdes_clk: tdes_clk {
1205                                                 #clock-cells = <0>;
1206                                                 reg = <44>;
1207                                         };
1208
1209                                         trng_clk: trng_clk {
1210                                                 #clock-cells = <0>;
1211                                                 reg = <45>;
1212                                         };
1213
1214                                         fuse_clk: fuse_clk {
1215                                                 #clock-cells = <0>;
1216                                                 reg = <48>;
1217                                         };
1218
1219                                         mpddr_clk: mpddr_clk {
1220                                                 #clock-cells = <0>;
1221                                                 reg = <49>;
1222                                         };
1223                                 };
1224                         };
1225
1226                         rstc@fffffe00 {
1227                                 compatible = "atmel,at91sam9g45-rstc";
1228                                 reg = <0xfffffe00 0x10>;
1229                         };
1230
1231                         shutdown-controller@fffffe10 {
1232                                 compatible = "atmel,at91sam9x5-shdwc";
1233                                 reg = <0xfffffe10 0x10>;
1234                         };
1235
1236                         pit: timer@fffffe30 {
1237                                 compatible = "atmel,at91sam9260-pit";
1238                                 reg = <0xfffffe30 0xf>;
1239                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1240                                 clocks = <&mck>;
1241                         };
1242
1243                         watchdog@fffffe40 {
1244                                 compatible = "atmel,at91sam9260-wdt";
1245                                 reg = <0xfffffe40 0x10>;
1246                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1247                                 atmel,watchdog-type = "hardware";
1248                                 atmel,reset-type = "all";
1249                                 atmel,dbg-halt;
1250                                 atmel,idle-halt;
1251                                 status = "disabled";
1252                         };
1253
1254                         sckc@fffffe50 {
1255                                 compatible = "atmel,at91sam9x5-sckc";
1256                                 reg = <0xfffffe50 0x4>;
1257
1258                                 slow_rc_osc: slow_rc_osc {
1259                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1260                                         #clock-cells = <0>;
1261                                         clock-frequency = <32768>;
1262                                         clock-accuracy = <50000000>;
1263                                         atmel,startup-time-usec = <75>;
1264                                 };
1265
1266                                 slow_osc: slow_osc {
1267                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1268                                         #clock-cells = <0>;
1269                                         clocks = <&slow_xtal>;
1270                                         atmel,startup-time-usec = <1200000>;
1271                                 };
1272
1273                                 clk32k: slowck {
1274                                         compatible = "atmel,at91sam9x5-clk-slow";
1275                                         #clock-cells = <0>;
1276                                         clocks = <&slow_rc_osc &slow_osc>;
1277                                 };
1278                         };
1279
1280                         rtc@fffffeb0 {
1281                                 compatible = "atmel,at91rm9200-rtc";
1282                                 reg = <0xfffffeb0 0x30>;
1283                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1284                         };
1285                 };
1286
1287                 usb0: gadget@00500000 {
1288                         #address-cells = <1>;
1289                         #size-cells = <0>;
1290                         compatible = "atmel,at91sam9rl-udc";
1291                         reg = <0x00500000 0x100000
1292                                0xf8030000 0x4000>;
1293                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1294                         clocks = <&udphs_clk>, <&utmi>;
1295                         clock-names = "pclk", "hclk";
1296                         status = "disabled";
1297
1298                         ep0 {
1299                                 reg = <0>;
1300                                 atmel,fifo-size = <64>;
1301                                 atmel,nb-banks = <1>;
1302                         };
1303
1304                         ep1 {
1305                                 reg = <1>;
1306                                 atmel,fifo-size = <1024>;
1307                                 atmel,nb-banks = <3>;
1308                                 atmel,can-dma;
1309                                 atmel,can-isoc;
1310                         };
1311
1312                         ep2 {
1313                                 reg = <2>;
1314                                 atmel,fifo-size = <1024>;
1315                                 atmel,nb-banks = <3>;
1316                                 atmel,can-dma;
1317                                 atmel,can-isoc;
1318                         };
1319
1320                         ep3 {
1321                                 reg = <3>;
1322                                 atmel,fifo-size = <1024>;
1323                                 atmel,nb-banks = <2>;
1324                                 atmel,can-dma;
1325                         };
1326
1327                         ep4 {
1328                                 reg = <4>;
1329                                 atmel,fifo-size = <1024>;
1330                                 atmel,nb-banks = <2>;
1331                                 atmel,can-dma;
1332                         };
1333
1334                         ep5 {
1335                                 reg = <5>;
1336                                 atmel,fifo-size = <1024>;
1337                                 atmel,nb-banks = <2>;
1338                                 atmel,can-dma;
1339                         };
1340
1341                         ep6 {
1342                                 reg = <6>;
1343                                 atmel,fifo-size = <1024>;
1344                                 atmel,nb-banks = <2>;
1345                                 atmel,can-dma;
1346                         };
1347
1348                         ep7 {
1349                                 reg = <7>;
1350                                 atmel,fifo-size = <1024>;
1351                                 atmel,nb-banks = <2>;
1352                                 atmel,can-dma;
1353                         };
1354
1355                         ep8 {
1356                                 reg = <8>;
1357                                 atmel,fifo-size = <1024>;
1358                                 atmel,nb-banks = <2>;
1359                         };
1360
1361                         ep9 {
1362                                 reg = <9>;
1363                                 atmel,fifo-size = <1024>;
1364                                 atmel,nb-banks = <2>;
1365                         };
1366
1367                         ep10 {
1368                                 reg = <10>;
1369                                 atmel,fifo-size = <1024>;
1370                                 atmel,nb-banks = <2>;
1371                         };
1372
1373                         ep11 {
1374                                 reg = <11>;
1375                                 atmel,fifo-size = <1024>;
1376                                 atmel,nb-banks = <2>;
1377                         };
1378
1379                         ep12 {
1380                                 reg = <12>;
1381                                 atmel,fifo-size = <1024>;
1382                                 atmel,nb-banks = <2>;
1383                         };
1384
1385                         ep13 {
1386                                 reg = <13>;
1387                                 atmel,fifo-size = <1024>;
1388                                 atmel,nb-banks = <2>;
1389                         };
1390
1391                         ep14 {
1392                                 reg = <14>;
1393                                 atmel,fifo-size = <1024>;
1394                                 atmel,nb-banks = <2>;
1395                         };
1396
1397                         ep15 {
1398                                 reg = <15>;
1399                                 atmel,fifo-size = <1024>;
1400                                 atmel,nb-banks = <2>;
1401                         };
1402                 };
1403
1404                 usb1: ohci@00600000 {
1405                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1406                         reg = <0x00600000 0x100000>;
1407                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1408                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1409                                  <&uhpck>;
1410                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1411                         status = "disabled";
1412                 };
1413
1414                 usb2: ehci@00700000 {
1415                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1416                         reg = <0x00700000 0x100000>;
1417                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1418                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1419                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1420                         status = "disabled";
1421                 };
1422
1423                 nand0: nand@60000000 {
1424                         compatible = "atmel,at91rm9200-nand";
1425                         #address-cells = <1>;
1426                         #size-cells = <1>;
1427                         ranges;
1428                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
1429                                 0xffffc070 0x00000490   /* SMC PMECC regs */
1430                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
1431                                 0x00110000 0x00018000   /* ROM code */
1432                                 >;
1433                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1434                         atmel,nand-addr-offset = <21>;
1435                         atmel,nand-cmd-offset = <22>;
1436                         atmel,nand-has-dma;
1437                         pinctrl-names = "default";
1438                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1439                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1440                         status = "disabled";
1441
1442                         nfc@70000000 {
1443                                 compatible = "atmel,sama5d3-nfc";
1444                                 #address-cells = <1>;
1445                                 #size-cells = <1>;
1446                                 reg = <
1447                                         0x70000000 0x10000000   /* NFC Command Registers */
1448                                         0xffffc000 0x00000070   /* NFC HSMC regs */
1449                                         0x00200000 0x00100000   /* NFC SRAM banks */
1450                                         >;
1451                                 clocks = <&hsmc_clk>;
1452                         };
1453                 };
1454         };
1455 };