2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
47 compatible = "arm,cortex-a5";
53 compatible = "arm,cortex-a5-pmu";
54 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
58 reg = <0x20000000 0x8000000>;
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
71 clock-frequency = <0>;
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
77 clock-frequency = <20000000>;
82 compatible = "simple-bus";
88 compatible = "simple-bus";
94 compatible = "atmel,hsmci";
95 reg = <0xf0000000 0x600>;
96 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
97 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
102 #address-cells = <1>;
104 clocks = <&mci0_clk>;
105 clock-names = "mci_clk";
109 #address-cells = <1>;
111 compatible = "atmel,at91rm9200-spi";
112 reg = <0xf0004000 0x100>;
113 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
114 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
115 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
116 dma-names = "tx", "rx";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_spi0>;
119 clocks = <&spi0_clk>;
120 clock-names = "spi_clk";
125 compatible = "atmel,at91sam9g45-ssc";
126 reg = <0xf0008000 0x4000>;
127 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
128 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
129 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
130 dma-names = "tx", "rx";
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
133 clocks = <&ssc0_clk>;
134 clock-names = "pclk";
138 tcb0: timer@f0010000 {
139 compatible = "atmel,at91sam9x5-tcb";
140 reg = <0xf0010000 0x100>;
141 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
142 clocks = <&tcb0_clk>;
143 clock-names = "t0_clk";
147 compatible = "atmel,at91sam9x5-i2c";
148 reg = <0xf0014000 0x4000>;
149 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
150 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
151 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
152 dma-names = "tx", "rx";
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_i2c0>;
155 #address-cells = <1>;
157 clocks = <&twi0_clk>;
162 compatible = "atmel,at91sam9x5-i2c";
163 reg = <0xf0018000 0x4000>;
164 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
165 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
166 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
167 dma-names = "tx", "rx";
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_i2c1>;
170 #address-cells = <1>;
172 clocks = <&twi1_clk>;
176 usart0: serial@f001c000 {
177 compatible = "atmel,at91sam9260-usart";
178 reg = <0xf001c000 0x100>;
179 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_usart0>;
182 clocks = <&usart0_clk>;
183 clock-names = "usart";
187 usart1: serial@f0020000 {
188 compatible = "atmel,at91sam9260-usart";
189 reg = <0xf0020000 0x100>;
190 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usart1>;
193 clocks = <&usart1_clk>;
194 clock-names = "usart";
199 compatible = "atmel,sama5d3-pwm";
200 reg = <0xf002c000 0x300>;
201 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
208 compatible = "atmel,at91sam9g45-isi";
209 reg = <0xf0034000 0x4000>;
210 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
215 compatible = "atmel,hsmci";
216 reg = <0xf8000000 0x600>;
217 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
218 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
223 #address-cells = <1>;
225 clocks = <&mci1_clk>;
226 clock-names = "mci_clk";
230 #address-cells = <1>;
232 compatible = "atmel,at91rm9200-spi";
233 reg = <0xf8008000 0x100>;
234 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
235 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
236 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
237 dma-names = "tx", "rx";
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_spi1>;
240 clocks = <&spi1_clk>;
241 clock-names = "spi_clk";
246 compatible = "atmel,at91sam9g45-ssc";
247 reg = <0xf800c000 0x4000>;
248 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
249 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
250 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
251 dma-names = "tx", "rx";
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
254 clocks = <&ssc1_clk>;
255 clock-names = "pclk";
260 #address-cells = <1>;
262 compatible = "atmel,at91sam9x5-adc";
263 reg = <0xf8018000 0x100>;
264 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
265 pinctrl-names = "default";
283 clock-names = "adc_clk", "adc_op_clk";
284 atmel,adc-channels-used = <0xfff>;
285 atmel,adc-startup-time = <40>;
286 atmel,adc-use-external-triggers;
287 atmel,adc-vref = <3000>;
288 atmel,adc-res = <10 12>;
289 atmel,adc-res-names = "lowres", "highres";
294 trigger-name = "external-rising";
295 trigger-value = <0x1>;
300 trigger-name = "external-falling";
301 trigger-value = <0x2>;
306 trigger-name = "external-any";
307 trigger-value = <0x3>;
312 trigger-name = "continuous";
313 trigger-value = <0x6>;
318 compatible = "atmel,at91sam9x5-i2c";
319 reg = <0xf801c000 0x4000>;
320 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
321 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
322 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
323 dma-names = "tx", "rx";
324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_i2c2>;
326 #address-cells = <1>;
328 clocks = <&twi2_clk>;
332 usart2: serial@f8020000 {
333 compatible = "atmel,at91sam9260-usart";
334 reg = <0xf8020000 0x100>;
335 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_usart2>;
338 clocks = <&usart2_clk>;
339 clock-names = "usart";
343 usart3: serial@f8024000 {
344 compatible = "atmel,at91sam9260-usart";
345 reg = <0xf8024000 0x100>;
346 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&pinctrl_usart3>;
349 clocks = <&usart3_clk>;
350 clock-names = "usart";
355 compatible = "atmel,at91sam9g46-sha";
356 reg = <0xf8034000 0x100>;
357 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
358 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
361 clock-names = "sha_clk";
365 compatible = "atmel,at91sam9g46-aes";
366 reg = <0xf8038000 0x100>;
367 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
368 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
369 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
370 dma-names = "tx", "rx";
372 clock-names = "aes_clk";
376 compatible = "atmel,at91sam9g46-tdes";
377 reg = <0xf803c000 0x100>;
378 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
379 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
380 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
381 dma-names = "tx", "rx";
382 clocks = <&tdes_clk>;
383 clock-names = "tdes_clk";
386 dma0: dma-controller@ffffe600 {
387 compatible = "atmel,at91sam9g45-dma";
388 reg = <0xffffe600 0x200>;
389 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
391 clocks = <&dma0_clk>;
392 clock-names = "dma_clk";
395 dma1: dma-controller@ffffe800 {
396 compatible = "atmel,at91sam9g45-dma";
397 reg = <0xffffe800 0x200>;
398 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
400 clocks = <&dma1_clk>;
401 clock-names = "dma_clk";
404 ramc0: ramc@ffffea00 {
405 compatible = "atmel,at91sam9g45-ddramc";
406 reg = <0xffffea00 0x200>;
409 dbgu: serial@ffffee00 {
410 compatible = "atmel,at91sam9260-usart";
411 reg = <0xffffee00 0x200>;
412 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&pinctrl_dbgu>;
415 clocks = <&dbgu_clk>;
416 clock-names = "usart";
420 aic: interrupt-controller@fffff000 {
421 #interrupt-cells = <3>;
422 compatible = "atmel,sama5d3-aic";
423 interrupt-controller;
424 reg = <0xfffff000 0x200>;
425 atmel,external-irqs = <47>;
429 #address-cells = <1>;
431 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
432 ranges = <0xfffff200 0xfffff200 0xa00>;
435 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
436 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
437 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
438 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
439 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
442 /* shared pinctrl settings */
444 pinctrl_adc0_adtrg: adc0_adtrg {
446 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
448 pinctrl_adc0_ad0: adc0_ad0 {
450 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
452 pinctrl_adc0_ad1: adc0_ad1 {
454 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
456 pinctrl_adc0_ad2: adc0_ad2 {
458 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
460 pinctrl_adc0_ad3: adc0_ad3 {
462 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
464 pinctrl_adc0_ad4: adc0_ad4 {
466 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
468 pinctrl_adc0_ad5: adc0_ad5 {
470 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
472 pinctrl_adc0_ad6: adc0_ad6 {
474 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
476 pinctrl_adc0_ad7: adc0_ad7 {
478 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
480 pinctrl_adc0_ad8: adc0_ad8 {
482 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
484 pinctrl_adc0_ad9: adc0_ad9 {
486 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
488 pinctrl_adc0_ad10: adc0_ad10 {
490 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
492 pinctrl_adc0_ad11: adc0_ad11 {
494 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
499 pinctrl_dbgu: dbgu-0 {
501 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
502 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
507 pinctrl_i2c0: i2c0-0 {
509 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
510 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
515 pinctrl_i2c1: i2c1-0 {
517 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
518 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
523 pinctrl_i2c2: i2c2-0 {
525 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
526 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
533 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
534 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
535 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
536 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
537 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
538 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
539 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
540 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
541 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
542 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
543 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
544 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
545 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
547 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
549 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
554 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
556 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
557 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
558 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
560 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
562 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
563 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
564 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
566 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
568 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
569 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
570 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
571 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
576 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
578 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
579 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
580 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
582 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
584 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
585 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
586 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
591 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
593 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
594 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
599 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
601 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
603 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
605 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
607 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
609 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
611 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
613 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
616 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
618 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
620 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
622 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
624 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
626 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
628 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
630 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
632 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
634 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
636 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
638 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
641 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
643 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
645 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
647 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
649 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
651 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
653 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
655 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
658 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
660 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
662 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
664 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
666 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
668 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
670 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
672 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
677 pinctrl_spi0: spi0-0 {
679 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
680 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
681 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
686 pinctrl_spi1: spi1-0 {
688 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
689 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
690 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
695 pinctrl_ssc0_tx: ssc0_tx {
697 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
698 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
699 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
702 pinctrl_ssc0_rx: ssc0_rx {
704 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
705 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
706 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
711 pinctrl_ssc1_tx: ssc1_tx {
713 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
714 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
715 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
718 pinctrl_ssc1_rx: ssc1_rx {
720 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
721 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
722 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
727 pinctrl_usart0: usart0-0 {
729 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
730 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
733 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
735 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
736 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
741 pinctrl_usart1: usart1-0 {
743 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
744 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
747 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
749 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
750 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
755 pinctrl_usart2: usart2-0 {
757 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
758 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
761 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
763 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
764 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
769 pinctrl_usart3: usart3-0 {
771 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
772 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
775 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
777 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
778 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
783 pioA: gpio@fffff200 {
784 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
785 reg = <0xfffff200 0x100>;
786 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
789 interrupt-controller;
790 #interrupt-cells = <2>;
791 clocks = <&pioA_clk>;
794 pioB: gpio@fffff400 {
795 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
796 reg = <0xfffff400 0x100>;
797 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
800 interrupt-controller;
801 #interrupt-cells = <2>;
802 clocks = <&pioB_clk>;
805 pioC: gpio@fffff600 {
806 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
807 reg = <0xfffff600 0x100>;
808 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
811 interrupt-controller;
812 #interrupt-cells = <2>;
813 clocks = <&pioC_clk>;
816 pioD: gpio@fffff800 {
817 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
818 reg = <0xfffff800 0x100>;
819 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
822 interrupt-controller;
823 #interrupt-cells = <2>;
824 clocks = <&pioD_clk>;
827 pioE: gpio@fffffa00 {
828 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
829 reg = <0xfffffa00 0x100>;
830 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
833 interrupt-controller;
834 #interrupt-cells = <2>;
835 clocks = <&pioE_clk>;
840 compatible = "atmel,sama5d3-pmc";
841 reg = <0xfffffc00 0x120>;
842 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
843 interrupt-controller;
844 #address-cells = <1>;
846 #interrupt-cells = <1>;
848 main_rc_osc: main_rc_osc {
849 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
851 interrupt-parent = <&pmc>;
852 interrupts = <AT91_PMC_MOSCRCS>;
853 clock-frequency = <12000000>;
854 clock-accuracy = <50000000>;
858 compatible = "atmel,at91rm9200-clk-main-osc";
860 interrupt-parent = <&pmc>;
861 interrupts = <AT91_PMC_MOSCS>;
862 clocks = <&main_xtal>;
866 compatible = "atmel,at91sam9x5-clk-main";
868 interrupt-parent = <&pmc>;
869 interrupts = <AT91_PMC_MOSCSELS>;
870 clocks = <&main_rc_osc &main_osc>;
874 compatible = "atmel,sama5d3-clk-pll";
876 interrupt-parent = <&pmc>;
877 interrupts = <AT91_PMC_LOCKA>;
880 atmel,clk-input-range = <8000000 50000000>;
881 #atmel,pll-clk-output-range-cells = <4>;
882 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
886 compatible = "atmel,at91sam9x5-clk-plldiv";
892 compatible = "atmel,at91sam9x5-clk-utmi";
894 interrupt-parent = <&pmc>;
895 interrupts = <AT91_PMC_LOCKU>;
900 compatible = "atmel,at91sam9x5-clk-master";
902 interrupt-parent = <&pmc>;
903 interrupts = <AT91_PMC_MCKRDY>;
904 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
905 atmel,clk-output-range = <0 166000000>;
906 atmel,clk-divisors = <1 2 4 3>;
910 compatible = "atmel,at91sam9x5-clk-usb";
912 clocks = <&plladiv>, <&utmi>;
916 compatible = "atmel,at91sam9x5-clk-programmable";
917 #address-cells = <1>;
919 interrupt-parent = <&pmc>;
920 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
925 interrupts = <AT91_PMC_PCKRDY(0)>;
931 interrupts = <AT91_PMC_PCKRDY(1)>;
937 interrupts = <AT91_PMC_PCKRDY(2)>;
942 compatible = "atmel,at91sam9x5-clk-smd";
944 clocks = <&plladiv>, <&utmi>;
948 compatible = "atmel,at91rm9200-clk-system";
949 #address-cells = <1>;
996 compatible = "atmel,at91sam9x5-clk-peripheral";
997 #address-cells = <1>;
1001 dbgu_clk: dbgu_clk {
1006 pioA_clk: pioA_clk {
1011 pioB_clk: pioB_clk {
1016 pioC_clk: pioC_clk {
1021 pioD_clk: pioD_clk {
1026 pioE_clk: pioE_clk {
1031 usart0_clk: usart0_clk {
1034 atmel,clk-output-range = <0 66000000>;
1037 usart1_clk: usart1_clk {
1040 atmel,clk-output-range = <0 66000000>;
1043 usart2_clk: usart2_clk {
1046 atmel,clk-output-range = <0 66000000>;
1049 usart3_clk: usart3_clk {
1052 atmel,clk-output-range = <0 66000000>;
1055 twi0_clk: twi0_clk {
1058 atmel,clk-output-range = <0 16625000>;
1061 twi1_clk: twi1_clk {
1064 atmel,clk-output-range = <0 16625000>;
1067 twi2_clk: twi2_clk {
1070 atmel,clk-output-range = <0 16625000>;
1073 mci0_clk: mci0_clk {
1078 mci1_clk: mci1_clk {
1083 spi0_clk: spi0_clk {
1086 atmel,clk-output-range = <0 133000000>;
1089 spi1_clk: spi1_clk {
1092 atmel,clk-output-range = <0 133000000>;
1095 tcb0_clk: tcb0_clk {
1098 atmel,clk-output-range = <0 133000000>;
1109 atmel,clk-output-range = <0 66000000>;
1112 dma0_clk: dma0_clk {
1117 dma1_clk: dma1_clk {
1122 uhphs_clk: uhphs_clk {
1127 udphs_clk: udphs_clk {
1137 ssc0_clk: ssc0_clk {
1140 atmel,clk-output-range = <0 66000000>;
1143 ssc1_clk: ssc1_clk {
1146 atmel,clk-output-range = <0 66000000>;
1159 tdes_clk: tdes_clk {
1164 trng_clk: trng_clk {
1169 fuse_clk: fuse_clk {
1177 compatible = "atmel,at91sam9g45-rstc";
1178 reg = <0xfffffe00 0x10>;
1181 pit: timer@fffffe30 {
1182 compatible = "atmel,at91sam9260-pit";
1183 reg = <0xfffffe30 0xf>;
1184 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1189 compatible = "atmel,at91sam9260-wdt";
1190 reg = <0xfffffe40 0x10>;
1191 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1192 atmel,watchdog-type = "hardware";
1193 atmel,reset-type = "all";
1196 status = "disabled";
1200 compatible = "atmel,at91sam9x5-sckc";
1201 reg = <0xfffffe50 0x4>;
1203 slow_rc_osc: slow_rc_osc {
1204 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1206 clock-frequency = <32768>;
1207 clock-accuracy = <50000000>;
1208 atmel,startup-time-usec = <75>;
1211 slow_osc: slow_osc {
1212 compatible = "atmel,at91sam9x5-clk-slow-osc";
1214 clocks = <&slow_xtal>;
1215 atmel,startup-time-usec = <1200000>;
1219 compatible = "atmel,at91sam9x5-clk-slow";
1221 clocks = <&slow_rc_osc &slow_osc>;
1226 compatible = "atmel,at91rm9200-rtc";
1227 reg = <0xfffffeb0 0x30>;
1228 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1232 usb0: gadget@00500000 {
1233 #address-cells = <1>;
1235 compatible = "atmel,at91sam9rl-udc";
1236 reg = <0x00500000 0x100000
1238 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1239 clocks = <&udphs_clk>, <&utmi>;
1240 clock-names = "pclk", "hclk";
1241 status = "disabled";
1245 atmel,fifo-size = <64>;
1246 atmel,nb-banks = <1>;
1251 atmel,fifo-size = <1024>;
1252 atmel,nb-banks = <3>;
1259 atmel,fifo-size = <1024>;
1260 atmel,nb-banks = <3>;
1267 atmel,fifo-size = <1024>;
1268 atmel,nb-banks = <2>;
1274 atmel,fifo-size = <1024>;
1275 atmel,nb-banks = <2>;
1281 atmel,fifo-size = <1024>;
1282 atmel,nb-banks = <2>;
1288 atmel,fifo-size = <1024>;
1289 atmel,nb-banks = <2>;
1295 atmel,fifo-size = <1024>;
1296 atmel,nb-banks = <2>;
1302 atmel,fifo-size = <1024>;
1303 atmel,nb-banks = <2>;
1308 atmel,fifo-size = <1024>;
1309 atmel,nb-banks = <2>;
1314 atmel,fifo-size = <1024>;
1315 atmel,nb-banks = <2>;
1320 atmel,fifo-size = <1024>;
1321 atmel,nb-banks = <2>;
1326 atmel,fifo-size = <1024>;
1327 atmel,nb-banks = <2>;
1332 atmel,fifo-size = <1024>;
1333 atmel,nb-banks = <2>;
1338 atmel,fifo-size = <1024>;
1339 atmel,nb-banks = <2>;
1344 atmel,fifo-size = <1024>;
1345 atmel,nb-banks = <2>;
1349 usb1: ohci@00600000 {
1350 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1351 reg = <0x00600000 0x100000>;
1352 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1353 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1355 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1356 status = "disabled";
1359 usb2: ehci@00700000 {
1360 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1361 reg = <0x00700000 0x100000>;
1362 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1363 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1364 clock-names = "usb_clk", "ehci_clk", "uhpck";
1365 status = "disabled";
1368 nand0: nand@60000000 {
1369 compatible = "atmel,at91rm9200-nand";
1370 #address-cells = <1>;
1373 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1374 0xffffc070 0x00000490 /* SMC PMECC regs */
1375 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1376 0x00110000 0x00018000 /* ROM code */
1378 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1379 atmel,nand-addr-offset = <21>;
1380 atmel,nand-cmd-offset = <22>;
1382 pinctrl-names = "default";
1383 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1384 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1385 status = "disabled";
1388 compatible = "atmel,sama5d3-nfc";
1389 #address-cells = <1>;
1392 0x70000000 0x10000000 /* NFC Command Registers */
1393 0xffffc000 0x00000070 /* NFC HSMC regs */
1394 0x00200000 0x00100000 /* NFC SRAM banks */