2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clk/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
47 compatible = "arm,cortex-a5";
53 compatible = "arm,cortex-a5-pmu";
54 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
58 reg = <0x20000000 0x8000000>;
62 adc_op_clk: adc_op_clk{
63 compatible = "fixed-clock";
65 clock-frequency = <20000000>;
70 compatible = "simple-bus";
76 compatible = "simple-bus";
82 compatible = "atmel,hsmci";
83 reg = <0xf0000000 0x600>;
84 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
85 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
93 clock-names = "mci_clk";
99 compatible = "atmel,at91rm9200-spi";
100 reg = <0xf0004000 0x100>;
101 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
102 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
103 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
104 dma-names = "tx", "rx";
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_spi0>;
107 clocks = <&spi0_clk>;
108 clock-names = "spi_clk";
113 compatible = "atmel,at91sam9g45-ssc";
114 reg = <0xf0008000 0x4000>;
115 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
118 clocks = <&ssc0_clk>;
119 clock-names = "pclk";
123 tcb0: timer@f0010000 {
124 compatible = "atmel,at91sam9x5-tcb";
125 reg = <0xf0010000 0x100>;
126 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
127 clocks = <&tcb0_clk>;
128 clock-names = "t0_clk";
132 compatible = "atmel,at91sam9x5-i2c";
133 reg = <0xf0014000 0x4000>;
134 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
135 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
136 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
137 dma-names = "tx", "rx";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_i2c0>;
140 #address-cells = <1>;
142 clocks = <&twi0_clk>;
147 compatible = "atmel,at91sam9x5-i2c";
148 reg = <0xf0018000 0x4000>;
149 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
150 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
151 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
152 dma-names = "tx", "rx";
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_i2c1>;
155 #address-cells = <1>;
157 clocks = <&twi1_clk>;
161 usart0: serial@f001c000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xf001c000 0x100>;
164 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usart0>;
167 clocks = <&usart0_clk>;
168 clock-names = "usart";
172 usart1: serial@f0020000 {
173 compatible = "atmel,at91sam9260-usart";
174 reg = <0xf0020000 0x100>;
175 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_usart1>;
178 clocks = <&usart1_clk>;
179 clock-names = "usart";
184 compatible = "atmel,sama5d3-pwm";
185 reg = <0xf002c000 0x300>;
186 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
193 compatible = "atmel,at91sam9g45-isi";
194 reg = <0xf0034000 0x4000>;
195 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
200 compatible = "atmel,hsmci";
201 reg = <0xf8000000 0x600>;
202 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
203 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
208 #address-cells = <1>;
210 clocks = <&mci1_clk>;
211 clock-names = "mci_clk";
215 #address-cells = <1>;
217 compatible = "atmel,at91rm9200-spi";
218 reg = <0xf8008000 0x100>;
219 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
220 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
221 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
222 dma-names = "tx", "rx";
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_spi1>;
225 clocks = <&spi1_clk>;
226 clock-names = "spi_clk";
231 compatible = "atmel,at91sam9g45-ssc";
232 reg = <0xf800c000 0x4000>;
233 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
236 clocks = <&ssc1_clk>;
237 clock-names = "pclk";
242 compatible = "atmel,at91sam9260-adc";
243 reg = <0xf8018000 0x100>;
244 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
245 pinctrl-names = "default";
263 clock-names = "adc_clk", "adc_op_clk";
264 atmel,adc-channel-base = <0x50>;
265 atmel,adc-channels-used = <0xfff>;
266 atmel,adc-drdy-mask = <0x1000000>;
267 atmel,adc-num-channels = <12>;
268 atmel,adc-startup-time = <40>;
269 atmel,adc-status-register = <0x30>;
270 atmel,adc-trigger-register = <0xc0>;
271 atmel,adc-use-external;
272 atmel,adc-vref = <3000>;
273 atmel,adc-res = <10 12>;
274 atmel,adc-res-names = "lowres", "highres";
278 trigger-name = "external-rising";
279 trigger-value = <0x1>;
283 trigger-name = "external-falling";
284 trigger-value = <0x2>;
288 trigger-name = "external-any";
289 trigger-value = <0x3>;
293 trigger-name = "continuous";
294 trigger-value = <0x6>;
298 tsadcc: tsadcc@f8018000 {
299 compatible = "atmel,at91sam9x5-tsadcc";
300 reg = <0xf8018000 0x4000>;
301 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
302 atmel,tsadcc_clock = <300000>;
303 atmel,filtering_average = <0x03>;
304 atmel,pendet_debounce = <0x08>;
305 atmel,pendet_sensitivity = <0x02>;
306 atmel,ts_sample_hold_time = <0x0a>;
311 compatible = "atmel,at91sam9x5-i2c";
312 reg = <0xf801c000 0x4000>;
313 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
314 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
315 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
316 dma-names = "tx", "rx";
317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_i2c2>;
319 #address-cells = <1>;
321 clocks = <&twi2_clk>;
325 usart2: serial@f8020000 {
326 compatible = "atmel,at91sam9260-usart";
327 reg = <0xf8020000 0x100>;
328 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_usart2>;
331 clocks = <&usart2_clk>;
332 clock-names = "usart";
336 usart3: serial@f8024000 {
337 compatible = "atmel,at91sam9260-usart";
338 reg = <0xf8024000 0x100>;
339 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
340 pinctrl-names = "default";
341 pinctrl-0 = <&pinctrl_usart3>;
342 clocks = <&usart3_clk>;
343 clock-names = "usart";
348 compatible = "atmel,at91sam9g46-sha";
349 reg = <0xf8034000 0x100>;
350 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
351 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
354 clock-names = "sha_clk";
358 compatible = "atmel,at91sam9g46-aes";
359 reg = <0xf8038000 0x100>;
360 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
361 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
362 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
363 dma-names = "tx", "rx";
365 clock-names = "aes_clk";
369 compatible = "atmel,at91sam9g46-tdes";
370 reg = <0xf803c000 0x100>;
371 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
372 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
373 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
374 dma-names = "tx", "rx";
375 clocks = <&tdes_clk>;
376 clock-names = "tdes_clk";
379 dma0: dma-controller@ffffe600 {
380 compatible = "atmel,at91sam9g45-dma";
381 reg = <0xffffe600 0x200>;
382 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
384 clocks = <&dma0_clk>;
385 clock-names = "dma_clk";
388 dma1: dma-controller@ffffe800 {
389 compatible = "atmel,at91sam9g45-dma";
390 reg = <0xffffe800 0x200>;
391 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
393 clocks = <&dma1_clk>;
394 clock-names = "dma_clk";
397 ramc0: ramc@ffffea00 {
398 compatible = "atmel,at91sam9g45-ddramc";
399 reg = <0xffffea00 0x200>;
402 dbgu: serial@ffffee00 {
403 compatible = "atmel,at91sam9260-usart";
404 reg = <0xffffee00 0x200>;
405 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&pinctrl_dbgu>;
408 clocks = <&dbgu_clk>;
409 clock-names = "usart";
413 aic: interrupt-controller@fffff000 {
414 #interrupt-cells = <3>;
415 compatible = "atmel,sama5d3-aic";
416 interrupt-controller;
417 reg = <0xfffff000 0x200>;
418 atmel,external-irqs = <47>;
422 #address-cells = <1>;
424 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
425 ranges = <0xfffff200 0xfffff200 0xa00>;
428 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
429 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
430 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
431 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
432 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
435 /* shared pinctrl settings */
437 pinctrl_adc0_adtrg: adc0_adtrg {
439 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
441 pinctrl_adc0_ad0: adc0_ad0 {
443 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
445 pinctrl_adc0_ad1: adc0_ad1 {
447 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
449 pinctrl_adc0_ad2: adc0_ad2 {
451 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
453 pinctrl_adc0_ad3: adc0_ad3 {
455 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
457 pinctrl_adc0_ad4: adc0_ad4 {
459 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
461 pinctrl_adc0_ad5: adc0_ad5 {
463 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
465 pinctrl_adc0_ad6: adc0_ad6 {
467 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
469 pinctrl_adc0_ad7: adc0_ad7 {
471 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
473 pinctrl_adc0_ad8: adc0_ad8 {
475 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
477 pinctrl_adc0_ad9: adc0_ad9 {
479 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
481 pinctrl_adc0_ad10: adc0_ad10 {
483 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
485 pinctrl_adc0_ad11: adc0_ad11 {
487 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
492 pinctrl_dbgu: dbgu-0 {
494 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
495 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
500 pinctrl_i2c0: i2c0-0 {
502 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
503 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
508 pinctrl_i2c1: i2c1-0 {
510 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
511 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
516 pinctrl_i2c2: i2c2-0 {
518 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
519 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
526 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
527 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
528 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
529 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
530 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
531 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
532 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
533 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
534 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
535 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
536 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
537 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
538 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
540 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
542 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
547 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
549 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
550 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
551 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
553 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
555 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
556 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
557 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
559 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
561 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
562 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
563 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
564 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
569 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
571 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
572 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
573 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
575 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
577 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
578 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
579 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
584 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
586 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
587 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
592 pinctrl_spi0: spi0-0 {
594 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
595 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
596 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
601 pinctrl_spi1: spi1-0 {
603 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
604 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
605 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
610 pinctrl_ssc0_tx: ssc0_tx {
612 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
613 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
614 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
617 pinctrl_ssc0_rx: ssc0_rx {
619 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
620 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
621 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
626 pinctrl_ssc1_tx: ssc1_tx {
628 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
629 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
630 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
633 pinctrl_ssc1_rx: ssc1_rx {
635 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
636 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
637 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
642 pinctrl_usart0: usart0-0 {
644 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
645 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
648 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
650 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
651 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
656 pinctrl_usart1: usart1-0 {
658 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
659 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
662 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
664 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
665 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
670 pinctrl_usart2: usart2-0 {
672 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
673 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
676 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
678 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
679 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
684 pinctrl_usart3: usart3-0 {
686 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
687 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
690 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
692 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
693 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
698 pioA: gpio@fffff200 {
699 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
700 reg = <0xfffff200 0x100>;
701 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
704 interrupt-controller;
705 #interrupt-cells = <2>;
706 clocks = <&pioA_clk>;
709 pioB: gpio@fffff400 {
710 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
711 reg = <0xfffff400 0x100>;
712 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
715 interrupt-controller;
716 #interrupt-cells = <2>;
717 clocks = <&pioB_clk>;
720 pioC: gpio@fffff600 {
721 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
722 reg = <0xfffff600 0x100>;
723 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
726 interrupt-controller;
727 #interrupt-cells = <2>;
728 clocks = <&pioC_clk>;
731 pioD: gpio@fffff800 {
732 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
733 reg = <0xfffff800 0x100>;
734 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
737 interrupt-controller;
738 #interrupt-cells = <2>;
739 clocks = <&pioD_clk>;
742 pioE: gpio@fffffa00 {
743 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
744 reg = <0xfffffa00 0x100>;
745 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
748 interrupt-controller;
749 #interrupt-cells = <2>;
750 clocks = <&pioE_clk>;
755 compatible = "atmel,sama5d3-pmc";
756 reg = <0xfffffc00 0x120>;
757 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
758 interrupt-controller;
759 #address-cells = <1>;
761 #interrupt-cells = <1>;
764 compatible = "fixed-clock";
766 clock-frequency = <32768>;
770 compatible = "atmel,at91rm9200-clk-main";
772 interrupt-parent = <&pmc>;
773 interrupts = <AT91_PMC_MOSCS>;
778 compatible = "atmel,sama5d3-clk-pll";
780 interrupt-parent = <&pmc>;
781 interrupts = <AT91_PMC_LOCKA>;
784 atmel,clk-input-range = <8000000 50000000>;
785 #atmel,pll-clk-output-range-cells = <4>;
786 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
790 compatible = "atmel,at91sam9x5-clk-plldiv";
796 compatible = "atmel,at91sam9x5-clk-utmi";
798 interrupt-parent = <&pmc>;
799 interrupts = <AT91_PMC_LOCKU>;
804 compatible = "atmel,at91sam9x5-clk-master";
806 interrupt-parent = <&pmc>;
807 interrupts = <AT91_PMC_MCKRDY>;
808 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
809 atmel,clk-output-range = <0 166000000>;
810 atmel,clk-divisors = <1 2 4 3>;
814 compatible = "atmel,at91sam9x5-clk-usb";
816 clocks = <&plladiv>, <&utmi>;
820 compatible = "atmel,at91sam9x5-clk-programmable";
821 #address-cells = <1>;
823 interrupt-parent = <&pmc>;
824 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
829 interrupts = <AT91_PMC_PCKRDY(0)>;
835 interrupts = <AT91_PMC_PCKRDY(1)>;
841 interrupts = <AT91_PMC_PCKRDY(2)>;
846 compatible = "atmel,at91sam9x5-clk-smd";
848 clocks = <&plladiv>, <&utmi>;
852 compatible = "atmel,at91rm9200-clk-system";
853 #address-cells = <1>;
900 compatible = "atmel,at91sam9x5-clk-peripheral";
901 #address-cells = <1>;
935 usart0_clk: usart0_clk {
938 atmel,clk-output-range = <0 66000000>;
941 usart1_clk: usart1_clk {
944 atmel,clk-output-range = <0 66000000>;
947 usart2_clk: usart2_clk {
950 atmel,clk-output-range = <0 66000000>;
953 usart3_clk: usart3_clk {
956 atmel,clk-output-range = <0 66000000>;
962 atmel,clk-output-range = <0 16625000>;
968 atmel,clk-output-range = <0 16625000>;
974 atmel,clk-output-range = <0 16625000>;
990 atmel,clk-output-range = <0 133000000>;
996 atmel,clk-output-range = <0 133000000>;
1002 atmel,clk-output-range = <0 133000000>;
1013 atmel,clk-output-range = <0 66000000>;
1016 dma0_clk: dma0_clk {
1021 dma1_clk: dma1_clk {
1026 uhphs_clk: uhphs_clk {
1031 udphs_clk: udphs_clk {
1041 ssc0_clk: ssc0_clk {
1044 atmel,clk-output-range = <0 66000000>;
1047 ssc1_clk: ssc1_clk {
1050 atmel,clk-output-range = <0 66000000>;
1063 tdes_clk: tdes_clk {
1068 trng_clk: trng_clk {
1073 fuse_clk: fuse_clk {
1081 compatible = "atmel,at91sam9g45-rstc";
1082 reg = <0xfffffe00 0x10>;
1085 pit: timer@fffffe30 {
1086 compatible = "atmel,at91sam9260-pit";
1087 reg = <0xfffffe30 0xf>;
1088 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1093 compatible = "atmel,at91sam9260-wdt";
1094 reg = <0xfffffe40 0x10>;
1095 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1096 atmel,watchdog-type = "hardware";
1097 atmel,reset-type = "all";
1100 status = "disabled";
1104 compatible = "atmel,at91rm9200-rtc";
1105 reg = <0xfffffeb0 0x30>;
1106 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1110 usb0: gadget@00500000 {
1111 #address-cells = <1>;
1113 compatible = "atmel,at91sam9rl-udc";
1114 reg = <0x00500000 0x100000
1116 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1117 clocks = <&udphs_clk>, <&utmi>;
1118 clock-names = "pclk", "hclk";
1119 status = "disabled";
1123 atmel,fifo-size = <64>;
1124 atmel,nb-banks = <1>;
1129 atmel,fifo-size = <1024>;
1130 atmel,nb-banks = <3>;
1137 atmel,fifo-size = <1024>;
1138 atmel,nb-banks = <3>;
1145 atmel,fifo-size = <1024>;
1146 atmel,nb-banks = <2>;
1152 atmel,fifo-size = <1024>;
1153 atmel,nb-banks = <2>;
1159 atmel,fifo-size = <1024>;
1160 atmel,nb-banks = <2>;
1166 atmel,fifo-size = <1024>;
1167 atmel,nb-banks = <2>;
1173 atmel,fifo-size = <1024>;
1174 atmel,nb-banks = <2>;
1180 atmel,fifo-size = <1024>;
1181 atmel,nb-banks = <2>;
1186 atmel,fifo-size = <1024>;
1187 atmel,nb-banks = <2>;
1192 atmel,fifo-size = <1024>;
1193 atmel,nb-banks = <2>;
1198 atmel,fifo-size = <1024>;
1199 atmel,nb-banks = <2>;
1204 atmel,fifo-size = <1024>;
1205 atmel,nb-banks = <2>;
1210 atmel,fifo-size = <1024>;
1211 atmel,nb-banks = <2>;
1216 atmel,fifo-size = <1024>;
1217 atmel,nb-banks = <2>;
1222 atmel,fifo-size = <1024>;
1223 atmel,nb-banks = <2>;
1227 usb1: ohci@00600000 {
1228 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1229 reg = <0x00600000 0x100000>;
1230 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1231 clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
1233 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1234 status = "disabled";
1237 usb2: ehci@00700000 {
1238 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1239 reg = <0x00700000 0x100000>;
1240 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1241 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1242 clock-names = "usb_clk", "ehci_clk", "uhpck";
1243 status = "disabled";
1246 nand0: nand@60000000 {
1247 compatible = "atmel,at91rm9200-nand";
1248 #address-cells = <1>;
1251 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1252 0xffffc070 0x00000490 /* SMC PMECC regs */
1253 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1254 0x00110000 0x00018000 /* ROM code */
1256 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1257 atmel,nand-addr-offset = <21>;
1258 atmel,nand-cmd-offset = <22>;
1259 pinctrl-names = "default";
1260 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1261 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1262 status = "disabled";
1265 compatible = "atmel,sama5d3-nfc";
1266 #address-cells = <1>;
1269 0x70000000 0x10000000 /* NFC Command Registers */
1270 0xffffc000 0x00000070 /* NFC HSMC regs */
1271 0x00200000 0x00100000 /* NFC SRAM banks */