2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
47 compatible = "arm,cortex-a5";
53 compatible = "arm,cortex-a5-pmu";
54 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
58 reg = <0x20000000 0x8000000>;
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
71 clock-frequency = <0>;
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
77 clock-frequency = <20000000>;
82 compatible = "mmio-sram";
83 reg = <0x00300000 0x20000>;
87 compatible = "simple-bus";
93 compatible = "simple-bus";
99 compatible = "atmel,hsmci";
100 reg = <0xf0000000 0x600>;
101 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
102 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
107 #address-cells = <1>;
109 clocks = <&mci0_clk>;
110 clock-names = "mci_clk";
114 #address-cells = <1>;
116 compatible = "atmel,at91rm9200-spi";
117 reg = <0xf0004000 0x100>;
118 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
119 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
120 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
121 dma-names = "tx", "rx";
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_spi0>;
124 clocks = <&spi0_clk>;
125 clock-names = "spi_clk";
130 compatible = "atmel,at91sam9g45-ssc";
131 reg = <0xf0008000 0x4000>;
132 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
133 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
134 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
135 dma-names = "tx", "rx";
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
138 clocks = <&ssc0_clk>;
139 clock-names = "pclk";
143 tcb0: timer@f0010000 {
144 compatible = "atmel,at91sam9x5-tcb";
145 reg = <0xf0010000 0x100>;
146 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
147 clocks = <&tcb0_clk>;
148 clock-names = "t0_clk";
152 compatible = "atmel,at91sam9x5-i2c";
153 reg = <0xf0014000 0x4000>;
154 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
155 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
156 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
157 dma-names = "tx", "rx";
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_i2c0>;
160 #address-cells = <1>;
162 clocks = <&twi0_clk>;
167 compatible = "atmel,at91sam9x5-i2c";
168 reg = <0xf0018000 0x4000>;
169 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
170 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
171 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
172 dma-names = "tx", "rx";
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_i2c1>;
175 #address-cells = <1>;
177 clocks = <&twi1_clk>;
181 usart0: serial@f001c000 {
182 compatible = "atmel,at91sam9260-usart";
183 reg = <0xf001c000 0x100>;
184 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
185 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
186 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
187 dma-names = "tx", "rx";
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_usart0>;
190 clocks = <&usart0_clk>;
191 clock-names = "usart";
195 usart1: serial@f0020000 {
196 compatible = "atmel,at91sam9260-usart";
197 reg = <0xf0020000 0x100>;
198 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
199 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
200 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
201 dma-names = "tx", "rx";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_usart1>;
204 clocks = <&usart1_clk>;
205 clock-names = "usart";
210 compatible = "atmel,sama5d3-pwm";
211 reg = <0xf002c000 0x300>;
212 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
219 compatible = "atmel,at91sam9g45-isi";
220 reg = <0xf0034000 0x4000>;
221 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
223 clock-names = "isi_clk";
228 compatible = "atmel,sama5d3-sfr", "syscon";
229 reg = <0xf0038000 0x60>;
233 compatible = "atmel,hsmci";
234 reg = <0xf8000000 0x600>;
235 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
236 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
241 #address-cells = <1>;
243 clocks = <&mci1_clk>;
244 clock-names = "mci_clk";
248 #address-cells = <1>;
250 compatible = "atmel,at91rm9200-spi";
251 reg = <0xf8008000 0x100>;
252 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
253 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
254 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
255 dma-names = "tx", "rx";
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_spi1>;
258 clocks = <&spi1_clk>;
259 clock-names = "spi_clk";
264 compatible = "atmel,at91sam9g45-ssc";
265 reg = <0xf800c000 0x4000>;
266 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
267 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
268 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
269 dma-names = "tx", "rx";
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
272 clocks = <&ssc1_clk>;
273 clock-names = "pclk";
278 #address-cells = <1>;
280 compatible = "atmel,at91sam9x5-adc";
281 reg = <0xf8018000 0x100>;
282 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
283 pinctrl-names = "default";
301 clock-names = "adc_clk", "adc_op_clk";
302 atmel,adc-channels-used = <0xfff>;
303 atmel,adc-startup-time = <40>;
304 atmel,adc-use-external-triggers;
305 atmel,adc-vref = <3000>;
306 atmel,adc-res = <10 12>;
307 atmel,adc-res-names = "lowres", "highres";
312 trigger-name = "external-rising";
313 trigger-value = <0x1>;
318 trigger-name = "external-falling";
319 trigger-value = <0x2>;
324 trigger-name = "external-any";
325 trigger-value = <0x3>;
330 trigger-name = "continuous";
331 trigger-value = <0x6>;
336 compatible = "atmel,at91sam9x5-i2c";
337 reg = <0xf801c000 0x4000>;
338 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
339 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
340 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
341 dma-names = "tx", "rx";
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_i2c2>;
344 #address-cells = <1>;
346 clocks = <&twi2_clk>;
350 usart2: serial@f8020000 {
351 compatible = "atmel,at91sam9260-usart";
352 reg = <0xf8020000 0x100>;
353 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
354 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
355 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
356 dma-names = "tx", "rx";
357 pinctrl-names = "default";
358 pinctrl-0 = <&pinctrl_usart2>;
359 clocks = <&usart2_clk>;
360 clock-names = "usart";
364 usart3: serial@f8024000 {
365 compatible = "atmel,at91sam9260-usart";
366 reg = <0xf8024000 0x100>;
367 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
368 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
369 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
370 dma-names = "tx", "rx";
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_usart3>;
373 clocks = <&usart3_clk>;
374 clock-names = "usart";
379 compatible = "atmel,at91sam9g46-sha";
380 reg = <0xf8034000 0x100>;
381 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
382 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
385 clock-names = "sha_clk";
389 compatible = "atmel,at91sam9g46-aes";
390 reg = <0xf8038000 0x100>;
391 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
392 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
393 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
394 dma-names = "tx", "rx";
396 clock-names = "aes_clk";
400 compatible = "atmel,at91sam9g46-tdes";
401 reg = <0xf803c000 0x100>;
402 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
403 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
404 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
405 dma-names = "tx", "rx";
406 clocks = <&tdes_clk>;
407 clock-names = "tdes_clk";
410 dma0: dma-controller@ffffe600 {
411 compatible = "atmel,at91sam9g45-dma";
412 reg = <0xffffe600 0x200>;
413 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
415 clocks = <&dma0_clk>;
416 clock-names = "dma_clk";
419 dma1: dma-controller@ffffe800 {
420 compatible = "atmel,at91sam9g45-dma";
421 reg = <0xffffe800 0x200>;
422 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
424 clocks = <&dma1_clk>;
425 clock-names = "dma_clk";
428 ramc0: ramc@ffffea00 {
429 compatible = "atmel,sama5d3-ddramc";
430 reg = <0xffffea00 0x200>;
431 clocks = <&ddrck>, <&mpddr_clk>;
432 clock-names = "ddrck", "mpddr";
435 dbgu: serial@ffffee00 {
436 compatible = "atmel,at91sam9260-usart";
437 reg = <0xffffee00 0x200>;
438 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
439 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
440 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
441 dma-names = "tx", "rx";
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_dbgu>;
444 clocks = <&dbgu_clk>;
445 clock-names = "usart";
449 aic: interrupt-controller@fffff000 {
450 #interrupt-cells = <3>;
451 compatible = "atmel,sama5d3-aic";
452 interrupt-controller;
453 reg = <0xfffff000 0x200>;
454 atmel,external-irqs = <47>;
458 #address-cells = <1>;
460 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
461 ranges = <0xfffff200 0xfffff200 0xa00>;
464 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
465 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
466 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
467 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
468 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
471 /* shared pinctrl settings */
473 pinctrl_adc0_adtrg: adc0_adtrg {
475 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
477 pinctrl_adc0_ad0: adc0_ad0 {
479 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
481 pinctrl_adc0_ad1: adc0_ad1 {
483 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
485 pinctrl_adc0_ad2: adc0_ad2 {
487 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
489 pinctrl_adc0_ad3: adc0_ad3 {
491 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
493 pinctrl_adc0_ad4: adc0_ad4 {
495 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
497 pinctrl_adc0_ad5: adc0_ad5 {
499 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
501 pinctrl_adc0_ad6: adc0_ad6 {
503 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
505 pinctrl_adc0_ad7: adc0_ad7 {
507 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
509 pinctrl_adc0_ad8: adc0_ad8 {
511 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
513 pinctrl_adc0_ad9: adc0_ad9 {
515 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
517 pinctrl_adc0_ad10: adc0_ad10 {
519 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
521 pinctrl_adc0_ad11: adc0_ad11 {
523 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
528 pinctrl_dbgu: dbgu-0 {
530 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
531 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
536 pinctrl_i2c0: i2c0-0 {
538 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
539 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
544 pinctrl_i2c1: i2c1-0 {
546 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
547 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
552 pinctrl_i2c2: i2c2-0 {
554 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
555 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
560 pinctrl_isi_data_0_7: isi-0-data-0-7 {
562 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
563 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
564 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
565 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
566 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
567 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
568 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
569 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
570 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
571 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
572 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
575 pinctrl_isi_data_8_9: isi-0-data-8-9 {
577 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
578 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
581 pinctrl_isi_data_10_11: isi-0-data-10-11 {
583 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
584 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
589 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
591 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
592 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
593 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
595 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
597 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
598 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
599 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
601 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
603 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
604 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
605 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
606 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
611 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
613 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
614 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
615 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
617 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
619 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
620 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
621 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
626 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
628 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
629 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
634 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
636 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
638 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
640 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
642 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
644 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
646 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
648 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
651 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
653 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
655 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
657 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
659 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
661 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
663 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
665 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
667 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
669 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
671 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
673 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
676 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
678 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
680 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
682 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
684 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
686 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
688 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
690 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
693 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
695 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
697 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
699 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
701 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
703 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
705 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
707 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
712 pinctrl_spi0: spi0-0 {
714 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
715 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
716 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
721 pinctrl_spi1: spi1-0 {
723 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
724 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
725 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
730 pinctrl_ssc0_tx: ssc0_tx {
732 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
733 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
734 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
737 pinctrl_ssc0_rx: ssc0_rx {
739 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
740 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
741 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
746 pinctrl_ssc1_tx: ssc1_tx {
748 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
749 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
750 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
753 pinctrl_ssc1_rx: ssc1_rx {
755 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
756 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
757 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
762 pinctrl_usart0: usart0-0 {
764 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
765 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
768 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
770 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
771 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
776 pinctrl_usart1: usart1-0 {
778 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
779 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
782 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
784 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
785 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
790 pinctrl_usart2: usart2-0 {
792 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
793 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
796 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
798 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
799 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
804 pinctrl_usart3: usart3-0 {
806 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
807 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
810 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
812 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
813 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
818 pioA: gpio@fffff200 {
819 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
820 reg = <0xfffff200 0x100>;
821 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
824 interrupt-controller;
825 #interrupt-cells = <2>;
826 clocks = <&pioA_clk>;
829 pioB: gpio@fffff400 {
830 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
831 reg = <0xfffff400 0x100>;
832 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
835 interrupt-controller;
836 #interrupt-cells = <2>;
837 clocks = <&pioB_clk>;
840 pioC: gpio@fffff600 {
841 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
842 reg = <0xfffff600 0x100>;
843 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
846 interrupt-controller;
847 #interrupt-cells = <2>;
848 clocks = <&pioC_clk>;
851 pioD: gpio@fffff800 {
852 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
853 reg = <0xfffff800 0x100>;
854 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
857 interrupt-controller;
858 #interrupt-cells = <2>;
859 clocks = <&pioD_clk>;
862 pioE: gpio@fffffa00 {
863 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
864 reg = <0xfffffa00 0x100>;
865 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
868 interrupt-controller;
869 #interrupt-cells = <2>;
870 clocks = <&pioE_clk>;
875 compatible = "atmel,sama5d3-pmc";
876 reg = <0xfffffc00 0x120>;
877 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
878 interrupt-controller;
879 #address-cells = <1>;
881 #interrupt-cells = <1>;
883 main_rc_osc: main_rc_osc {
884 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
886 interrupt-parent = <&pmc>;
887 interrupts = <AT91_PMC_MOSCRCS>;
888 clock-frequency = <12000000>;
889 clock-accuracy = <50000000>;
893 compatible = "atmel,at91rm9200-clk-main-osc";
895 interrupt-parent = <&pmc>;
896 interrupts = <AT91_PMC_MOSCS>;
897 clocks = <&main_xtal>;
901 compatible = "atmel,at91sam9x5-clk-main";
903 interrupt-parent = <&pmc>;
904 interrupts = <AT91_PMC_MOSCSELS>;
905 clocks = <&main_rc_osc &main_osc>;
909 compatible = "atmel,sama5d3-clk-pll";
911 interrupt-parent = <&pmc>;
912 interrupts = <AT91_PMC_LOCKA>;
915 atmel,clk-input-range = <8000000 50000000>;
916 #atmel,pll-clk-output-range-cells = <4>;
917 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
921 compatible = "atmel,at91sam9x5-clk-plldiv";
927 compatible = "atmel,at91sam9x5-clk-utmi";
929 interrupt-parent = <&pmc>;
930 interrupts = <AT91_PMC_LOCKU>;
935 compatible = "atmel,at91sam9x5-clk-master";
937 interrupt-parent = <&pmc>;
938 interrupts = <AT91_PMC_MCKRDY>;
939 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
940 atmel,clk-output-range = <0 166000000>;
941 atmel,clk-divisors = <1 2 4 3>;
945 compatible = "atmel,at91sam9x5-clk-usb";
947 clocks = <&plladiv>, <&utmi>;
951 compatible = "atmel,at91sam9x5-clk-programmable";
952 #address-cells = <1>;
954 interrupt-parent = <&pmc>;
955 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
960 interrupts = <AT91_PMC_PCKRDY(0)>;
966 interrupts = <AT91_PMC_PCKRDY(1)>;
972 interrupts = <AT91_PMC_PCKRDY(2)>;
977 compatible = "atmel,at91sam9x5-clk-smd";
979 clocks = <&plladiv>, <&utmi>;
983 compatible = "atmel,at91rm9200-clk-system";
984 #address-cells = <1>;
1031 compatible = "atmel,at91sam9x5-clk-peripheral";
1032 #address-cells = <1>;
1036 dbgu_clk: dbgu_clk {
1041 hsmc_clk: hsmc_clk {
1046 pioA_clk: pioA_clk {
1051 pioB_clk: pioB_clk {
1056 pioC_clk: pioC_clk {
1061 pioD_clk: pioD_clk {
1066 pioE_clk: pioE_clk {
1071 usart0_clk: usart0_clk {
1074 atmel,clk-output-range = <0 66000000>;
1077 usart1_clk: usart1_clk {
1080 atmel,clk-output-range = <0 66000000>;
1083 usart2_clk: usart2_clk {
1086 atmel,clk-output-range = <0 66000000>;
1089 usart3_clk: usart3_clk {
1092 atmel,clk-output-range = <0 66000000>;
1095 twi0_clk: twi0_clk {
1098 atmel,clk-output-range = <0 16625000>;
1101 twi1_clk: twi1_clk {
1104 atmel,clk-output-range = <0 16625000>;
1107 twi2_clk: twi2_clk {
1110 atmel,clk-output-range = <0 16625000>;
1113 mci0_clk: mci0_clk {
1118 mci1_clk: mci1_clk {
1123 spi0_clk: spi0_clk {
1126 atmel,clk-output-range = <0 133000000>;
1129 spi1_clk: spi1_clk {
1132 atmel,clk-output-range = <0 133000000>;
1135 tcb0_clk: tcb0_clk {
1138 atmel,clk-output-range = <0 133000000>;
1149 atmel,clk-output-range = <0 66000000>;
1152 dma0_clk: dma0_clk {
1157 dma1_clk: dma1_clk {
1162 uhphs_clk: uhphs_clk {
1167 udphs_clk: udphs_clk {
1177 ssc0_clk: ssc0_clk {
1180 atmel,clk-output-range = <0 66000000>;
1183 ssc1_clk: ssc1_clk {
1186 atmel,clk-output-range = <0 66000000>;
1199 tdes_clk: tdes_clk {
1204 trng_clk: trng_clk {
1209 fuse_clk: fuse_clk {
1214 mpddr_clk: mpddr_clk {
1222 compatible = "atmel,at91sam9g45-rstc";
1223 reg = <0xfffffe00 0x10>;
1226 shutdown-controller@fffffe10 {
1227 compatible = "atmel,at91sam9x5-shdwc";
1228 reg = <0xfffffe10 0x10>;
1231 pit: timer@fffffe30 {
1232 compatible = "atmel,at91sam9260-pit";
1233 reg = <0xfffffe30 0xf>;
1234 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1239 compatible = "atmel,at91sam9260-wdt";
1240 reg = <0xfffffe40 0x10>;
1241 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1242 atmel,watchdog-type = "hardware";
1243 atmel,reset-type = "all";
1246 status = "disabled";
1250 compatible = "atmel,at91sam9x5-sckc";
1251 reg = <0xfffffe50 0x4>;
1253 slow_rc_osc: slow_rc_osc {
1254 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1256 clock-frequency = <32768>;
1257 clock-accuracy = <50000000>;
1258 atmel,startup-time-usec = <75>;
1261 slow_osc: slow_osc {
1262 compatible = "atmel,at91sam9x5-clk-slow-osc";
1264 clocks = <&slow_xtal>;
1265 atmel,startup-time-usec = <1200000>;
1269 compatible = "atmel,at91sam9x5-clk-slow";
1271 clocks = <&slow_rc_osc &slow_osc>;
1276 compatible = "atmel,at91rm9200-rtc";
1277 reg = <0xfffffeb0 0x30>;
1278 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1282 usb0: gadget@00500000 {
1283 #address-cells = <1>;
1285 compatible = "atmel,at91sam9rl-udc";
1286 reg = <0x00500000 0x100000
1288 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1289 clocks = <&udphs_clk>, <&utmi>;
1290 clock-names = "pclk", "hclk";
1291 status = "disabled";
1295 atmel,fifo-size = <64>;
1296 atmel,nb-banks = <1>;
1301 atmel,fifo-size = <1024>;
1302 atmel,nb-banks = <3>;
1309 atmel,fifo-size = <1024>;
1310 atmel,nb-banks = <3>;
1317 atmel,fifo-size = <1024>;
1318 atmel,nb-banks = <2>;
1324 atmel,fifo-size = <1024>;
1325 atmel,nb-banks = <2>;
1331 atmel,fifo-size = <1024>;
1332 atmel,nb-banks = <2>;
1338 atmel,fifo-size = <1024>;
1339 atmel,nb-banks = <2>;
1345 atmel,fifo-size = <1024>;
1346 atmel,nb-banks = <2>;
1352 atmel,fifo-size = <1024>;
1353 atmel,nb-banks = <2>;
1358 atmel,fifo-size = <1024>;
1359 atmel,nb-banks = <2>;
1364 atmel,fifo-size = <1024>;
1365 atmel,nb-banks = <2>;
1370 atmel,fifo-size = <1024>;
1371 atmel,nb-banks = <2>;
1376 atmel,fifo-size = <1024>;
1377 atmel,nb-banks = <2>;
1382 atmel,fifo-size = <1024>;
1383 atmel,nb-banks = <2>;
1388 atmel,fifo-size = <1024>;
1389 atmel,nb-banks = <2>;
1394 atmel,fifo-size = <1024>;
1395 atmel,nb-banks = <2>;
1399 usb1: ohci@00600000 {
1400 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1401 reg = <0x00600000 0x100000>;
1402 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1403 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1405 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1406 status = "disabled";
1409 usb2: ehci@00700000 {
1410 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1411 reg = <0x00700000 0x100000>;
1412 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1413 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1414 clock-names = "usb_clk", "ehci_clk", "uhpck";
1415 status = "disabled";
1418 nand0: nand@60000000 {
1419 compatible = "atmel,at91rm9200-nand";
1420 #address-cells = <1>;
1423 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1424 0xffffc070 0x00000490 /* SMC PMECC regs */
1425 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1426 0x00110000 0x00018000 /* ROM code */
1428 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1429 atmel,nand-addr-offset = <21>;
1430 atmel,nand-cmd-offset = <22>;
1432 pinctrl-names = "default";
1433 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1434 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1435 status = "disabled";
1438 compatible = "atmel,sama5d3-nfc";
1439 #address-cells = <1>;
1442 0x70000000 0x10000000 /* NFC Command Registers */
1443 0xffffc000 0x00000070 /* NFC HSMC regs */
1444 0x00200000 0x00100000 /* NFC SRAM banks */
1446 clocks = <&hsmc_clk>;