2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clk/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
47 compatible = "arm,cortex-a5";
53 compatible = "arm,cortex-a5-pmu";
54 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
58 reg = <0x20000000 0x8000000>;
62 adc_op_clk: adc_op_clk{
63 compatible = "fixed-clock";
65 clock-frequency = <20000000>;
70 compatible = "simple-bus";
76 compatible = "simple-bus";
82 compatible = "atmel,hsmci";
83 reg = <0xf0000000 0x600>;
84 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
85 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
93 clock-names = "mci_clk";
99 compatible = "atmel,at91rm9200-spi";
100 reg = <0xf0004000 0x100>;
101 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
102 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
103 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
104 dma-names = "tx", "rx";
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_spi0>;
107 clocks = <&spi0_clk>;
108 clock-names = "spi_clk";
113 compatible = "atmel,at91sam9g45-ssc";
114 reg = <0xf0008000 0x4000>;
115 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
118 clocks = <&ssc0_clk>;
119 clock-names = "pclk";
123 tcb0: timer@f0010000 {
124 compatible = "atmel,at91sam9x5-tcb";
125 reg = <0xf0010000 0x100>;
126 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
127 clocks = <&tcb0_clk>;
128 clock-names = "t0_clk";
132 compatible = "atmel,at91sam9x5-i2c";
133 reg = <0xf0014000 0x4000>;
134 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
135 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
136 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
137 dma-names = "tx", "rx";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_i2c0>;
140 #address-cells = <1>;
142 clocks = <&twi0_clk>;
147 compatible = "atmel,at91sam9x5-i2c";
148 reg = <0xf0018000 0x4000>;
149 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
150 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
151 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
152 dma-names = "tx", "rx";
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_i2c1>;
155 #address-cells = <1>;
157 clocks = <&twi1_clk>;
161 usart0: serial@f001c000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xf001c000 0x100>;
164 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usart0>;
167 clocks = <&usart0_clk>;
168 clock-names = "usart";
172 usart1: serial@f0020000 {
173 compatible = "atmel,at91sam9260-usart";
174 reg = <0xf0020000 0x100>;
175 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_usart1>;
178 clocks = <&usart1_clk>;
179 clock-names = "usart";
184 compatible = "atmel,sama5d3-pwm";
185 reg = <0xf002c000 0x300>;
186 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
193 compatible = "atmel,at91sam9g45-isi";
194 reg = <0xf0034000 0x4000>;
195 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
200 compatible = "atmel,hsmci";
201 reg = <0xf8000000 0x600>;
202 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
203 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
208 #address-cells = <1>;
210 clocks = <&mci1_clk>;
211 clock-names = "mci_clk";
215 #address-cells = <1>;
217 compatible = "atmel,at91rm9200-spi";
218 reg = <0xf8008000 0x100>;
219 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
220 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
221 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
222 dma-names = "tx", "rx";
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_spi1>;
225 clocks = <&spi1_clk>;
226 clock-names = "spi_clk";
231 compatible = "atmel,at91sam9g45-ssc";
232 reg = <0xf800c000 0x4000>;
233 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
236 clocks = <&ssc1_clk>;
237 clock-names = "pclk";
242 #address-cells = <1>;
244 compatible = "atmel,at91sam9x5-adc";
245 reg = <0xf8018000 0x100>;
246 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
247 pinctrl-names = "default";
265 clock-names = "adc_clk", "adc_op_clk";
266 atmel,adc-channels-used = <0xfff>;
267 atmel,adc-startup-time = <40>;
268 atmel,adc-use-external-triggers;
269 atmel,adc-vref = <3000>;
270 atmel,adc-res = <10 12>;
271 atmel,adc-res-names = "lowres", "highres";
276 trigger-name = "external-rising";
277 trigger-value = <0x1>;
282 trigger-name = "external-falling";
283 trigger-value = <0x2>;
288 trigger-name = "external-any";
289 trigger-value = <0x3>;
294 trigger-name = "continuous";
295 trigger-value = <0x6>;
300 compatible = "atmel,at91sam9x5-i2c";
301 reg = <0xf801c000 0x4000>;
302 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
303 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
304 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
305 dma-names = "tx", "rx";
306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_i2c2>;
308 #address-cells = <1>;
310 clocks = <&twi2_clk>;
314 usart2: serial@f8020000 {
315 compatible = "atmel,at91sam9260-usart";
316 reg = <0xf8020000 0x100>;
317 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_usart2>;
320 clocks = <&usart2_clk>;
321 clock-names = "usart";
325 usart3: serial@f8024000 {
326 compatible = "atmel,at91sam9260-usart";
327 reg = <0xf8024000 0x100>;
328 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_usart3>;
331 clocks = <&usart3_clk>;
332 clock-names = "usart";
337 compatible = "atmel,at91sam9g46-sha";
338 reg = <0xf8034000 0x100>;
339 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
340 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
343 clock-names = "sha_clk";
347 compatible = "atmel,at91sam9g46-aes";
348 reg = <0xf8038000 0x100>;
349 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
350 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
351 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
352 dma-names = "tx", "rx";
354 clock-names = "aes_clk";
358 compatible = "atmel,at91sam9g46-tdes";
359 reg = <0xf803c000 0x100>;
360 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
361 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
362 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
363 dma-names = "tx", "rx";
364 clocks = <&tdes_clk>;
365 clock-names = "tdes_clk";
368 dma0: dma-controller@ffffe600 {
369 compatible = "atmel,at91sam9g45-dma";
370 reg = <0xffffe600 0x200>;
371 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
373 clocks = <&dma0_clk>;
374 clock-names = "dma_clk";
377 dma1: dma-controller@ffffe800 {
378 compatible = "atmel,at91sam9g45-dma";
379 reg = <0xffffe800 0x200>;
380 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
382 clocks = <&dma1_clk>;
383 clock-names = "dma_clk";
386 ramc0: ramc@ffffea00 {
387 compatible = "atmel,at91sam9g45-ddramc";
388 reg = <0xffffea00 0x200>;
391 dbgu: serial@ffffee00 {
392 compatible = "atmel,at91sam9260-usart";
393 reg = <0xffffee00 0x200>;
394 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
395 pinctrl-names = "default";
396 pinctrl-0 = <&pinctrl_dbgu>;
397 clocks = <&dbgu_clk>;
398 clock-names = "usart";
402 aic: interrupt-controller@fffff000 {
403 #interrupt-cells = <3>;
404 compatible = "atmel,sama5d3-aic";
405 interrupt-controller;
406 reg = <0xfffff000 0x200>;
407 atmel,external-irqs = <47>;
411 #address-cells = <1>;
413 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
414 ranges = <0xfffff200 0xfffff200 0xa00>;
417 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
418 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
419 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
420 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
421 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
424 /* shared pinctrl settings */
426 pinctrl_adc0_adtrg: adc0_adtrg {
428 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
430 pinctrl_adc0_ad0: adc0_ad0 {
432 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
434 pinctrl_adc0_ad1: adc0_ad1 {
436 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
438 pinctrl_adc0_ad2: adc0_ad2 {
440 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
442 pinctrl_adc0_ad3: adc0_ad3 {
444 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
446 pinctrl_adc0_ad4: adc0_ad4 {
448 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
450 pinctrl_adc0_ad5: adc0_ad5 {
452 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
454 pinctrl_adc0_ad6: adc0_ad6 {
456 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
458 pinctrl_adc0_ad7: adc0_ad7 {
460 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
462 pinctrl_adc0_ad8: adc0_ad8 {
464 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
466 pinctrl_adc0_ad9: adc0_ad9 {
468 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
470 pinctrl_adc0_ad10: adc0_ad10 {
472 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
474 pinctrl_adc0_ad11: adc0_ad11 {
476 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
481 pinctrl_dbgu: dbgu-0 {
483 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
484 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
489 pinctrl_i2c0: i2c0-0 {
491 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
492 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
497 pinctrl_i2c1: i2c1-0 {
499 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
500 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
505 pinctrl_i2c2: i2c2-0 {
507 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
508 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
515 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
516 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
517 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
518 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
519 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
520 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
521 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
522 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
523 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
524 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
525 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
526 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
527 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
529 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
531 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
536 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
538 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
539 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
540 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
542 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
544 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
545 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
546 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
548 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
550 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
551 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
552 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
553 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
558 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
560 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
561 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
562 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
564 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
566 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
567 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
568 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
573 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
575 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
576 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
581 pinctrl_spi0: spi0-0 {
583 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
584 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
585 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
590 pinctrl_spi1: spi1-0 {
592 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
593 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
594 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
599 pinctrl_ssc0_tx: ssc0_tx {
601 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
602 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
603 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
606 pinctrl_ssc0_rx: ssc0_rx {
608 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
609 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
610 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
615 pinctrl_ssc1_tx: ssc1_tx {
617 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
618 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
619 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
622 pinctrl_ssc1_rx: ssc1_rx {
624 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
625 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
626 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
631 pinctrl_usart0: usart0-0 {
633 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
634 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
637 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
639 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
640 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
645 pinctrl_usart1: usart1-0 {
647 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
648 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
651 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
653 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
654 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
659 pinctrl_usart2: usart2-0 {
661 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
662 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
665 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
667 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
668 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
673 pinctrl_usart3: usart3-0 {
675 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
676 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
679 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
681 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
682 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
687 pioA: gpio@fffff200 {
688 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
689 reg = <0xfffff200 0x100>;
690 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
693 interrupt-controller;
694 #interrupt-cells = <2>;
695 clocks = <&pioA_clk>;
698 pioB: gpio@fffff400 {
699 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
700 reg = <0xfffff400 0x100>;
701 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
704 interrupt-controller;
705 #interrupt-cells = <2>;
706 clocks = <&pioB_clk>;
709 pioC: gpio@fffff600 {
710 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
711 reg = <0xfffff600 0x100>;
712 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
715 interrupt-controller;
716 #interrupt-cells = <2>;
717 clocks = <&pioC_clk>;
720 pioD: gpio@fffff800 {
721 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
722 reg = <0xfffff800 0x100>;
723 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
726 interrupt-controller;
727 #interrupt-cells = <2>;
728 clocks = <&pioD_clk>;
731 pioE: gpio@fffffa00 {
732 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
733 reg = <0xfffffa00 0x100>;
734 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
737 interrupt-controller;
738 #interrupt-cells = <2>;
739 clocks = <&pioE_clk>;
744 compatible = "atmel,sama5d3-pmc";
745 reg = <0xfffffc00 0x120>;
746 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
747 interrupt-controller;
748 #address-cells = <1>;
750 #interrupt-cells = <1>;
753 compatible = "fixed-clock";
755 clock-frequency = <32768>;
759 compatible = "atmel,at91rm9200-clk-main";
761 interrupt-parent = <&pmc>;
762 interrupts = <AT91_PMC_MOSCS>;
767 compatible = "atmel,sama5d3-clk-pll";
769 interrupt-parent = <&pmc>;
770 interrupts = <AT91_PMC_LOCKA>;
773 atmel,clk-input-range = <8000000 50000000>;
774 #atmel,pll-clk-output-range-cells = <4>;
775 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
779 compatible = "atmel,at91sam9x5-clk-plldiv";
785 compatible = "atmel,at91sam9x5-clk-utmi";
787 interrupt-parent = <&pmc>;
788 interrupts = <AT91_PMC_LOCKU>;
793 compatible = "atmel,at91sam9x5-clk-master";
795 interrupt-parent = <&pmc>;
796 interrupts = <AT91_PMC_MCKRDY>;
797 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
798 atmel,clk-output-range = <0 166000000>;
799 atmel,clk-divisors = <1 2 4 3>;
803 compatible = "atmel,at91sam9x5-clk-usb";
805 clocks = <&plladiv>, <&utmi>;
809 compatible = "atmel,at91sam9x5-clk-programmable";
810 #address-cells = <1>;
812 interrupt-parent = <&pmc>;
813 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
818 interrupts = <AT91_PMC_PCKRDY(0)>;
824 interrupts = <AT91_PMC_PCKRDY(1)>;
830 interrupts = <AT91_PMC_PCKRDY(2)>;
835 compatible = "atmel,at91sam9x5-clk-smd";
837 clocks = <&plladiv>, <&utmi>;
841 compatible = "atmel,at91rm9200-clk-system";
842 #address-cells = <1>;
889 compatible = "atmel,at91sam9x5-clk-peripheral";
890 #address-cells = <1>;
924 usart0_clk: usart0_clk {
927 atmel,clk-output-range = <0 66000000>;
930 usart1_clk: usart1_clk {
933 atmel,clk-output-range = <0 66000000>;
936 usart2_clk: usart2_clk {
939 atmel,clk-output-range = <0 66000000>;
942 usart3_clk: usart3_clk {
945 atmel,clk-output-range = <0 66000000>;
951 atmel,clk-output-range = <0 16625000>;
957 atmel,clk-output-range = <0 16625000>;
963 atmel,clk-output-range = <0 16625000>;
979 atmel,clk-output-range = <0 133000000>;
985 atmel,clk-output-range = <0 133000000>;
991 atmel,clk-output-range = <0 133000000>;
1002 atmel,clk-output-range = <0 66000000>;
1005 dma0_clk: dma0_clk {
1010 dma1_clk: dma1_clk {
1015 uhphs_clk: uhphs_clk {
1020 udphs_clk: udphs_clk {
1030 ssc0_clk: ssc0_clk {
1033 atmel,clk-output-range = <0 66000000>;
1036 ssc1_clk: ssc1_clk {
1039 atmel,clk-output-range = <0 66000000>;
1052 tdes_clk: tdes_clk {
1057 trng_clk: trng_clk {
1062 fuse_clk: fuse_clk {
1070 compatible = "atmel,at91sam9g45-rstc";
1071 reg = <0xfffffe00 0x10>;
1074 pit: timer@fffffe30 {
1075 compatible = "atmel,at91sam9260-pit";
1076 reg = <0xfffffe30 0xf>;
1077 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1082 compatible = "atmel,at91sam9260-wdt";
1083 reg = <0xfffffe40 0x10>;
1084 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1085 atmel,watchdog-type = "hardware";
1086 atmel,reset-type = "all";
1089 status = "disabled";
1093 compatible = "atmel,at91rm9200-rtc";
1094 reg = <0xfffffeb0 0x30>;
1095 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1099 usb0: gadget@00500000 {
1100 #address-cells = <1>;
1102 compatible = "atmel,at91sam9rl-udc";
1103 reg = <0x00500000 0x100000
1105 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1106 clocks = <&udphs_clk>, <&utmi>;
1107 clock-names = "pclk", "hclk";
1108 status = "disabled";
1112 atmel,fifo-size = <64>;
1113 atmel,nb-banks = <1>;
1118 atmel,fifo-size = <1024>;
1119 atmel,nb-banks = <3>;
1126 atmel,fifo-size = <1024>;
1127 atmel,nb-banks = <3>;
1134 atmel,fifo-size = <1024>;
1135 atmel,nb-banks = <2>;
1141 atmel,fifo-size = <1024>;
1142 atmel,nb-banks = <2>;
1148 atmel,fifo-size = <1024>;
1149 atmel,nb-banks = <2>;
1155 atmel,fifo-size = <1024>;
1156 atmel,nb-banks = <2>;
1162 atmel,fifo-size = <1024>;
1163 atmel,nb-banks = <2>;
1169 atmel,fifo-size = <1024>;
1170 atmel,nb-banks = <2>;
1175 atmel,fifo-size = <1024>;
1176 atmel,nb-banks = <2>;
1181 atmel,fifo-size = <1024>;
1182 atmel,nb-banks = <2>;
1187 atmel,fifo-size = <1024>;
1188 atmel,nb-banks = <2>;
1193 atmel,fifo-size = <1024>;
1194 atmel,nb-banks = <2>;
1199 atmel,fifo-size = <1024>;
1200 atmel,nb-banks = <2>;
1205 atmel,fifo-size = <1024>;
1206 atmel,nb-banks = <2>;
1211 atmel,fifo-size = <1024>;
1212 atmel,nb-banks = <2>;
1216 usb1: ohci@00600000 {
1217 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1218 reg = <0x00600000 0x100000>;
1219 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1220 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1222 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1223 status = "disabled";
1226 usb2: ehci@00700000 {
1227 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1228 reg = <0x00700000 0x100000>;
1229 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1230 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1231 clock-names = "usb_clk", "ehci_clk", "uhpck";
1232 status = "disabled";
1235 nand0: nand@60000000 {
1236 compatible = "atmel,at91rm9200-nand";
1237 #address-cells = <1>;
1240 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1241 0xffffc070 0x00000490 /* SMC PMECC regs */
1242 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1243 0x00110000 0x00018000 /* ROM code */
1245 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1246 atmel,nand-addr-offset = <21>;
1247 atmel,nand-cmd-offset = <22>;
1249 pinctrl-names = "default";
1250 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1251 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1252 status = "disabled";
1255 compatible = "atmel,sama5d3-nfc";
1256 #address-cells = <1>;
1259 0x70000000 0x10000000 /* NFC Command Registers */
1260 0xffffc000 0x00000070 /* NFC HSMC regs */
1261 0x00200000 0x00100000 /* NFC SRAM banks */