2 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
4 * Copyright (C) 2014 Atmel,
5 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
46 #include "skeleton.dtsi"
47 #include <dt-bindings/clock/at91.h>
48 #include <dt-bindings/dma/at91.h>
49 #include <dt-bindings/pinctrl/at91.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51 #include <dt-bindings/gpio/gpio.h>
54 model = "Atmel SAMA5D4 family SoC";
55 compatible = "atmel,sama5d4";
56 interrupt-parent = <&aic>;
76 compatible = "arm,cortex-a5";
78 next-level-cache = <&L2>;
83 reg = <0x20000000 0x20000000>;
87 slow_xtal: slow_xtal {
88 compatible = "fixed-clock";
90 clock-frequency = <0>;
93 main_xtal: main_xtal {
94 compatible = "fixed-clock";
96 clock-frequency = <0>;
99 adc_op_clk: adc_op_clk{
100 compatible = "fixed-clock";
102 clock-frequency = <1000000>;
107 compatible = "simple-bus";
108 #address-cells = <1>;
112 usb0: gadget@00400000 {
113 #address-cells = <1>;
115 compatible = "atmel,at91sam9rl-udc";
116 reg = <0x00400000 0x100000
118 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
119 clocks = <&udphs_clk>, <&utmi>;
120 clock-names = "pclk", "hclk";
125 atmel,fifo-size = <64>;
126 atmel,nb-banks = <1>;
131 atmel,fifo-size = <1024>;
132 atmel,nb-banks = <3>;
139 atmel,fifo-size = <1024>;
140 atmel,nb-banks = <3>;
147 atmel,fifo-size = <1024>;
148 atmel,nb-banks = <2>;
155 atmel,fifo-size = <1024>;
156 atmel,nb-banks = <2>;
163 atmel,fifo-size = <1024>;
164 atmel,nb-banks = <2>;
171 atmel,fifo-size = <1024>;
172 atmel,nb-banks = <2>;
179 atmel,fifo-size = <1024>;
180 atmel,nb-banks = <2>;
187 atmel,fifo-size = <1024>;
188 atmel,nb-banks = <2>;
194 atmel,fifo-size = <1024>;
195 atmel,nb-banks = <2>;
201 atmel,fifo-size = <1024>;
202 atmel,nb-banks = <2>;
208 atmel,fifo-size = <1024>;
209 atmel,nb-banks = <2>;
215 atmel,fifo-size = <1024>;
216 atmel,nb-banks = <2>;
222 atmel,fifo-size = <1024>;
223 atmel,nb-banks = <2>;
229 atmel,fifo-size = <1024>;
230 atmel,nb-banks = <2>;
236 atmel,fifo-size = <1024>;
237 atmel,nb-banks = <2>;
242 usb1: ohci@00500000 {
243 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
244 reg = <0x00500000 0x100000>;
245 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
246 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
248 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
252 usb2: ehci@00600000 {
253 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
254 reg = <0x00600000 0x100000>;
255 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
256 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
257 clock-names = "usb_clk", "ehci_clk", "uhpck";
261 L2: cache-controller@00a00000 {
262 compatible = "arm,pl310-cache";
263 reg = <0x00a00000 0x1000>;
264 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
269 nand0: nand@80000000 {
270 compatible = "atmel,at91rm9200-nand";
271 #address-cells = <1>;
274 reg = < 0x80000000 0x08000000 /* EBI CS3 */
275 0xfc05c070 0x00000490 /* SMC PMECC regs */
276 0xfc05c500 0x00000100 /* SMC PMECC Error Location regs */
278 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
279 atmel,nand-addr-offset = <21>;
280 atmel,nand-cmd-offset = <22>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_nand>;
287 compatible = "atmel,sama5d3-nfc";
288 #address-cells = <1>;
291 0x90000000 0x10000000 /* NFC Command Registers */
292 0xfc05c000 0x00000070 /* NFC HSMC regs */
293 0x00100000 0x00100000 /* NFC SRAM banks */
295 clocks = <&hsmc_clk>;
301 compatible = "simple-bus";
302 #address-cells = <1>;
306 dma1: dma-controller@f0004000 {
307 compatible = "atmel,sama5d4-dma";
308 reg = <0xf0004000 0x200>;
309 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
311 clocks = <&dma1_clk>;
312 clock-names = "dma_clk";
315 ramc0: ramc@f0010000 {
316 compatible = "atmel,sama5d3-ddramc";
317 reg = <0xf0010000 0x200>;
318 clocks = <&ddrck>, <&mpddr_clk>;
319 clock-names = "ddrck", "mpddr";
322 dma0: dma-controller@f0014000 {
323 compatible = "atmel,sama5d4-dma";
324 reg = <0xf0014000 0x200>;
325 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
327 clocks = <&dma0_clk>;
328 clock-names = "dma_clk";
332 compatible = "atmel,sama5d3-pmc";
333 reg = <0xf0018000 0x120>;
334 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
335 interrupt-controller;
336 #address-cells = <1>;
338 #interrupt-cells = <1>;
340 main_rc_osc: main_rc_osc {
341 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
343 interrupt-parent = <&pmc>;
344 interrupts = <AT91_PMC_MOSCRCS>;
345 clock-frequency = <12000000>;
346 clock-accuracy = <100000000>;
350 compatible = "atmel,at91rm9200-clk-main-osc";
352 interrupt-parent = <&pmc>;
353 interrupts = <AT91_PMC_MOSCS>;
354 clocks = <&main_xtal>;
358 compatible = "atmel,at91sam9x5-clk-main";
360 interrupt-parent = <&pmc>;
361 interrupts = <AT91_PMC_MOSCSELS>;
362 clocks = <&main_rc_osc &main_osc>;
366 compatible = "atmel,sama5d3-clk-pll";
368 interrupt-parent = <&pmc>;
369 interrupts = <AT91_PMC_LOCKA>;
372 atmel,clk-input-range = <12000000 12000000>;
373 #atmel,pll-clk-output-range-cells = <4>;
374 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
378 compatible = "atmel,at91sam9x5-clk-plldiv";
384 compatible = "atmel,at91sam9x5-clk-utmi";
386 interrupt-parent = <&pmc>;
387 interrupts = <AT91_PMC_LOCKU>;
392 compatible = "atmel,at91sam9x5-clk-master";
394 interrupt-parent = <&pmc>;
395 interrupts = <AT91_PMC_MCKRDY>;
396 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
397 atmel,clk-output-range = <125000000 177000000>;
398 atmel,clk-divisors = <1 2 4 3>;
403 compatible = "atmel,sama5d4-clk-h32mx";
408 compatible = "atmel,at91sam9x5-clk-usb";
410 clocks = <&plladiv>, <&utmi>;
414 compatible = "atmel,at91sam9x5-clk-programmable";
415 #address-cells = <1>;
417 interrupt-parent = <&pmc>;
418 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
423 interrupts = <AT91_PMC_PCKRDY(0)>;
429 interrupts = <AT91_PMC_PCKRDY(1)>;
435 interrupts = <AT91_PMC_PCKRDY(2)>;
440 compatible = "atmel,at91sam9x5-clk-smd";
442 clocks = <&plladiv>, <&utmi>;
446 compatible = "atmel,at91rm9200-clk-system";
447 #address-cells = <1>;
500 compatible = "atmel,at91sam9x5-clk-peripheral";
501 #address-cells = <1>;
510 usart0_clk: usart0_clk {
515 usart1_clk: usart1_clk {
540 matrix1_clk: matrix1_clk {
570 uart0_clk: uart0_clk {
575 uart1_clk: uart1_clk {
580 usart2_clk: usart2_clk {
585 usart3_clk: usart3_clk {
590 usart4_clk: usart4_clk {
665 uhphs_clk: uhphs_clk {
670 udphs_clk: udphs_clk {
690 macb0_clk: macb0_clk {
695 macb1_clk: macb1_clk {
705 securam_clk: securam_clk {
727 compatible = "atmel,at91sam9x5-clk-peripheral";
728 #address-cells = <1>;
737 cpkcc_clk: cpkcc_clk {
747 mpddr_clk: mpddr_clk {
752 matrix0_clk: matrix0_clk {
780 compatible = "atmel,hsmci";
781 reg = <0xf8000000 0x600>;
782 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
784 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
785 | AT91_XDMAC_DT_PERID(0))>;
787 pinctrl-names = "default";
788 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
790 #address-cells = <1>;
792 clocks = <&mci0_clk>;
793 clock-names = "mci_clk";
797 #address-cells = <1>;
799 compatible = "atmel,at91rm9200-spi";
800 reg = <0xf8010000 0x100>;
801 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
803 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
804 | AT91_XDMAC_DT_PERID(10))>,
806 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
807 | AT91_XDMAC_DT_PERID(11))>;
808 dma-names = "tx", "rx";
809 pinctrl-names = "default";
810 pinctrl-0 = <&pinctrl_spi0>;
811 clocks = <&spi0_clk>;
812 clock-names = "spi_clk";
817 compatible = "atmel,at91sam9x5-i2c";
818 reg = <0xf8014000 0x4000>;
819 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
821 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
822 | AT91_XDMAC_DT_PERID(2))>,
824 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
825 | AT91_XDMAC_DT_PERID(3))>;
826 dma-names = "tx", "rx";
827 pinctrl-names = "default";
828 pinctrl-0 = <&pinctrl_i2c0>;
829 #address-cells = <1>;
831 clocks = <&twi0_clk>;
835 tcb0: timer@f801c000 {
836 compatible = "atmel,at91sam9x5-tcb";
837 reg = <0xf801c000 0x100>;
838 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
839 clocks = <&tcb0_clk>;
840 clock-names = "t0_clk";
843 macb0: ethernet@f8020000 {
844 compatible = "atmel,sama5d4-gem";
845 reg = <0xf8020000 0x100>;
846 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
847 pinctrl-names = "default";
848 pinctrl-0 = <&pinctrl_macb0_rmii>;
849 clocks = <&macb0_clk>, <&macb0_clk>;
850 clock-names = "hclk", "pclk";
855 compatible = "atmel,at91sam9x5-i2c";
856 reg = <0xf8024000 0x4000>;
857 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
859 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
860 | AT91_XDMAC_DT_PERID(6))>,
862 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
863 | AT91_XDMAC_DT_PERID(7))>;
864 dma-names = "tx", "rx";
865 pinctrl-names = "default";
866 pinctrl-0 = <&pinctrl_i2c2>;
867 #address-cells = <1>;
869 clocks = <&twi2_clk>;
874 compatible = "atmel,hsmci";
875 reg = <0xfc000000 0x600>;
876 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
878 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
879 | AT91_XDMAC_DT_PERID(1))>;
881 pinctrl-names = "default";
882 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
884 #address-cells = <1>;
886 clocks = <&mci1_clk>;
887 clock-names = "mci_clk";
890 usart2: serial@fc008000 {
891 compatible = "atmel,at91sam9260-usart";
892 reg = <0xfc008000 0x100>;
893 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
895 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
896 | AT91_XDMAC_DT_PERID(16))>,
898 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
899 | AT91_XDMAC_DT_PERID(17))>;
900 dma-names = "tx", "rx";
901 pinctrl-names = "default";
902 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
903 clocks = <&usart2_clk>;
904 clock-names = "usart";
908 usart3: serial@fc00c000 {
909 compatible = "atmel,at91sam9260-usart";
910 reg = <0xfc00c000 0x100>;
911 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
913 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
914 | AT91_XDMAC_DT_PERID(18))>,
916 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
917 | AT91_XDMAC_DT_PERID(19))>;
918 dma-names = "tx", "rx";
919 pinctrl-names = "default";
920 pinctrl-0 = <&pinctrl_usart3>;
921 clocks = <&usart3_clk>;
922 clock-names = "usart";
926 usart4: serial@fc010000 {
927 compatible = "atmel,at91sam9260-usart";
928 reg = <0xfc010000 0x100>;
929 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
931 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
932 | AT91_XDMAC_DT_PERID(20))>,
934 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
935 | AT91_XDMAC_DT_PERID(21))>;
936 dma-names = "tx", "rx";
937 pinctrl-names = "default";
938 pinctrl-0 = <&pinctrl_usart4>;
939 clocks = <&usart4_clk>;
940 clock-names = "usart";
944 tcb1: timer@fc020000 {
945 compatible = "atmel,at91sam9x5-tcb";
946 reg = <0xfc020000 0x100>;
947 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
948 clocks = <&tcb1_clk>;
949 clock-names = "t0_clk";
953 compatible = "atmel,at91sam9x5-adc";
954 reg = <0xfc034000 0x100>;
955 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
956 pinctrl-names = "default";
958 /* external trigger is conflict with USBA_VBUS */
967 clock-names = "adc_clk", "adc_op_clk";
968 atmel,adc-channels-used = <0x01f>;
969 atmel,adc-startup-time = <40>;
970 atmel,adc-use-external;
971 atmel,adc-vref = <3000>;
972 atmel,adc-res = <8 10>;
973 atmel,adc-sample-hold-time = <11>;
974 atmel,adc-res-names = "lowres", "highres";
975 atmel,adc-ts-pressure-threshold = <10000>;
979 trigger-name = "external-rising";
980 trigger-value = <0x1>;
984 trigger-name = "external-falling";
985 trigger-value = <0x2>;
989 trigger-name = "external-any";
990 trigger-value = <0x3>;
994 trigger-name = "continuous";
995 trigger-value = <0x6>;
1000 compatible = "atmel,at91sam9g45-rstc";
1001 reg = <0xfc068600 0x10>;
1005 compatible = "atmel,at91sam9x5-shdwc";
1006 reg = <0xfc068610 0x10>;
1009 pit: timer@fc068630 {
1010 compatible = "atmel,at91sam9260-pit";
1011 reg = <0xfc068630 0xf>;
1012 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1017 compatible = "atmel,at91sam9260-wdt";
1018 reg = <0xfc068640 0x10>;
1019 status = "disabled";
1023 compatible = "atmel,at91sam9x5-sckc";
1024 reg = <0xfc068650 0x4>;
1026 slow_rc_osc: slow_rc_osc {
1027 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1029 clock-frequency = <32768>;
1030 clock-accuracy = <250000000>;
1031 atmel,startup-time-usec = <75>;
1034 slow_osc: slow_osc {
1035 compatible = "atmel,at91sam9x5-clk-slow-osc";
1037 clocks = <&slow_xtal>;
1038 atmel,startup-time-usec = <1200000>;
1042 compatible = "atmel,at91sam9x5-clk-slow";
1044 clocks = <&slow_rc_osc &slow_osc>;
1049 compatible = "atmel,at91rm9200-rtc";
1050 reg = <0xfc0686b0 0x30>;
1051 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1054 dbgu: serial@fc069000 {
1055 compatible = "atmel,at91sam9260-usart";
1056 reg = <0xfc069000 0x200>;
1057 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
1058 pinctrl-names = "default";
1059 pinctrl-0 = <&pinctrl_dbgu>;
1060 clocks = <&dbgu_clk>;
1061 clock-names = "usart";
1062 status = "disabled";
1067 #address-cells = <1>;
1069 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
1070 ranges = <0xfc06a000 0xfc06a000 0x4000>;
1071 /* WARNING: revisit as pin spec has changed */
1074 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
1075 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
1076 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
1077 0x00000000 0x00000000 0x00000000 /* pioD */
1078 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
1081 pioA: gpio@fc06a000 {
1082 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1083 reg = <0xfc06a000 0x100>;
1084 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
1087 interrupt-controller;
1088 #interrupt-cells = <2>;
1089 clocks = <&pioA_clk>;
1092 pioB: gpio@fc06b000 {
1093 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1094 reg = <0xfc06b000 0x100>;
1095 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
1098 interrupt-controller;
1099 #interrupt-cells = <2>;
1100 clocks = <&pioB_clk>;
1103 pioC: gpio@fc06c000 {
1104 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1105 reg = <0xfc06c000 0x100>;
1106 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
1109 interrupt-controller;
1110 #interrupt-cells = <2>;
1111 clocks = <&pioC_clk>;
1114 pioE: gpio@fc06d000 {
1115 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1116 reg = <0xfc06d000 0x100>;
1117 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1120 interrupt-controller;
1121 #interrupt-cells = <2>;
1122 clocks = <&pioE_clk>;
1125 /* pinctrl pin settings */
1127 pinctrl_adc0_adtrg: adc0_adtrg {
1129 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1131 pinctrl_adc0_ad0: adc0_ad0 {
1133 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1135 pinctrl_adc0_ad1: adc0_ad1 {
1137 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1139 pinctrl_adc0_ad2: adc0_ad2 {
1141 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1143 pinctrl_adc0_ad3: adc0_ad3 {
1145 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1147 pinctrl_adc0_ad4: adc0_ad4 {
1149 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1154 pinctrl_dbgu: dbgu-0 {
1156 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, /* conflicts with D14 and TDI */
1157 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with D15 and TDO */
1162 pinctrl_i2c0: i2c0-0 {
1164 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1165 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1170 pinctrl_i2c2: i2c2-0 {
1172 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1173 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1178 pinctrl_macb0_rmii: macb0_rmii-0 {
1180 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1181 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1182 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1183 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1184 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1185 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1186 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1187 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1188 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1189 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1195 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1197 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1198 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDB, conflict with NAND_D0 */
1199 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB0, conflict with NAND_D1 */
1202 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1204 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB1, conflict with NAND_D2 */
1205 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB2, conflict with NAND_D3 */
1206 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB3, conflict with NAND_D4 */
1212 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1214 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1215 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1216 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1219 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1221 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1222 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1223 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1229 pinctrl_nand: nand-0 {
1231 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1232 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1234 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1235 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1237 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1238 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1239 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1240 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1241 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1242 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1243 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1244 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1245 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1246 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1251 pinctrl_spi0: spi0-0 {
1253 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1254 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1255 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1261 pinctrl_usart2: usart2-0 {
1263 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1264 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD - conflicts with G0_COL, PCK2 */
1267 pinctrl_usart2_rts: usart2_rts-0 {
1268 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1270 pinctrl_usart2_cts: usart2_cts-0 {
1271 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1276 pinctrl_usart3: usart3-0 {
1278 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1279 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1285 pinctrl_usart4: usart4-0 {
1287 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1288 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1291 pinctrl_usart4_rts: usart4_rts-0 {
1292 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1294 pinctrl_usart4_cts: usart4_cts-0 {
1295 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1300 aic: interrupt-controller@fc06e000 {
1301 #interrupt-cells = <3>;
1302 compatible = "atmel,sama5d4-aic";
1303 interrupt-controller;
1304 reg = <0xfc06e000 0x200>;
1305 atmel,external-irqs = <56>;