2 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
4 * Copyright (C) 2014 Atmel,
5 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
12 * a) This library is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
46 #include "skeleton.dtsi"
47 #include <dt-bindings/clock/at91.h>
48 #include <dt-bindings/pinctrl/at91.h>
49 #include <dt-bindings/interrupt-controller/irq.h>
50 #include <dt-bindings/gpio/gpio.h>
53 model = "Atmel SAMA5D4 family SoC";
54 compatible = "atmel,sama5d4";
55 interrupt-parent = <&aic>;
75 compatible = "arm,cortex-a5";
77 next-level-cache = <&L2>;
82 reg = <0x20000000 0x20000000>;
86 slow_xtal: slow_xtal {
87 compatible = "fixed-clock";
89 clock-frequency = <0>;
92 main_xtal: main_xtal {
93 compatible = "fixed-clock";
95 clock-frequency = <0>;
98 adc_op_clk: adc_op_clk{
99 compatible = "fixed-clock";
101 clock-frequency = <1000000>;
106 compatible = "simple-bus";
107 #address-cells = <1>;
111 usb0: gadget@00400000 {
112 #address-cells = <1>;
114 compatible = "atmel,at91sam9rl-udc";
115 reg = <0x00400000 0x100000
117 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
118 clocks = <&udphs_clk>, <&utmi>;
119 clock-names = "pclk", "hclk";
124 atmel,fifo-size = <64>;
125 atmel,nb-banks = <1>;
130 atmel,fifo-size = <1024>;
131 atmel,nb-banks = <3>;
138 atmel,fifo-size = <1024>;
139 atmel,nb-banks = <3>;
146 atmel,fifo-size = <1024>;
147 atmel,nb-banks = <2>;
154 atmel,fifo-size = <1024>;
155 atmel,nb-banks = <2>;
162 atmel,fifo-size = <1024>;
163 atmel,nb-banks = <2>;
170 atmel,fifo-size = <1024>;
171 atmel,nb-banks = <2>;
178 atmel,fifo-size = <1024>;
179 atmel,nb-banks = <2>;
186 atmel,fifo-size = <1024>;
187 atmel,nb-banks = <2>;
193 atmel,fifo-size = <1024>;
194 atmel,nb-banks = <2>;
200 atmel,fifo-size = <1024>;
201 atmel,nb-banks = <2>;
207 atmel,fifo-size = <1024>;
208 atmel,nb-banks = <2>;
214 atmel,fifo-size = <1024>;
215 atmel,nb-banks = <2>;
221 atmel,fifo-size = <1024>;
222 atmel,nb-banks = <2>;
228 atmel,fifo-size = <1024>;
229 atmel,nb-banks = <2>;
235 atmel,fifo-size = <1024>;
236 atmel,nb-banks = <2>;
241 usb1: ohci@00500000 {
242 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
243 reg = <0x00500000 0x100000>;
244 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
245 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
247 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
251 usb2: ehci@00600000 {
252 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
253 reg = <0x00600000 0x100000>;
254 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
255 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
256 clock-names = "usb_clk", "ehci_clk", "uhpck";
260 L2: cache-controller@00a00000 {
261 compatible = "arm,pl310-cache";
262 reg = <0x00a00000 0x1000>;
263 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
268 nand0: nand@80000000 {
269 compatible = "atmel,at91rm9200-nand";
270 #address-cells = <1>;
273 reg = < 0x80000000 0x08000000 /* EBI CS3 */
274 0xfc05c070 0x00000490 /* SMC PMECC regs */
275 0xfc05c500 0x00000100 /* SMC PMECC Error Location regs */
277 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
278 atmel,nand-addr-offset = <21>;
279 atmel,nand-cmd-offset = <22>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_nand>;
286 compatible = "atmel,sama5d3-nfc";
287 #address-cells = <1>;
290 0x90000000 0x10000000 /* NFC Command Registers */
291 0xfc05c000 0x00000070 /* NFC HSMC regs */
292 0x00100000 0x00100000 /* NFC SRAM banks */
294 clocks = <&hsmc_clk>;
300 compatible = "simple-bus";
301 #address-cells = <1>;
305 ramc0: ramc@f0010000 {
306 compatible = "atmel,sama5d3-ddramc";
307 reg = <0xf0010000 0x200>;
308 clocks = <&ddrck>, <&mpddr_clk>;
309 clock-names = "ddrck", "mpddr";
313 compatible = "atmel,sama5d3-pmc";
314 reg = <0xf0018000 0x120>;
315 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
316 interrupt-controller;
317 #address-cells = <1>;
319 #interrupt-cells = <1>;
321 main_rc_osc: main_rc_osc {
322 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
324 interrupt-parent = <&pmc>;
325 interrupts = <AT91_PMC_MOSCRCS>;
326 clock-frequency = <12000000>;
327 clock-accuracy = <100000000>;
331 compatible = "atmel,at91rm9200-clk-main-osc";
333 interrupt-parent = <&pmc>;
334 interrupts = <AT91_PMC_MOSCS>;
335 clocks = <&main_xtal>;
339 compatible = "atmel,at91sam9x5-clk-main";
341 interrupt-parent = <&pmc>;
342 interrupts = <AT91_PMC_MOSCSELS>;
343 clocks = <&main_rc_osc &main_osc>;
347 compatible = "atmel,sama5d3-clk-pll";
349 interrupt-parent = <&pmc>;
350 interrupts = <AT91_PMC_LOCKA>;
353 atmel,clk-input-range = <12000000 12000000>;
354 #atmel,pll-clk-output-range-cells = <4>;
355 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
359 compatible = "atmel,at91sam9x5-clk-plldiv";
365 compatible = "atmel,at91sam9x5-clk-utmi";
367 interrupt-parent = <&pmc>;
368 interrupts = <AT91_PMC_LOCKU>;
373 compatible = "atmel,at91sam9x5-clk-master";
375 interrupt-parent = <&pmc>;
376 interrupts = <AT91_PMC_MCKRDY>;
377 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
378 atmel,clk-output-range = <125000000 177000000>;
379 atmel,clk-divisors = <1 2 4 3>;
384 compatible = "atmel,sama5d4-clk-h32mx";
389 compatible = "atmel,at91sam9x5-clk-usb";
391 clocks = <&plladiv>, <&utmi>;
395 compatible = "atmel,at91sam9x5-clk-programmable";
396 #address-cells = <1>;
398 interrupt-parent = <&pmc>;
399 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
404 interrupts = <AT91_PMC_PCKRDY(0)>;
410 interrupts = <AT91_PMC_PCKRDY(1)>;
416 interrupts = <AT91_PMC_PCKRDY(2)>;
421 compatible = "atmel,at91sam9x5-clk-smd";
423 clocks = <&plladiv>, <&utmi>;
427 compatible = "atmel,at91rm9200-clk-system";
428 #address-cells = <1>;
481 compatible = "atmel,at91sam9x5-clk-peripheral";
482 #address-cells = <1>;
491 usart0_clk: usart0_clk {
496 usart1_clk: usart1_clk {
521 matrix1_clk: matrix1_clk {
551 uart0_clk: uart0_clk {
556 uart1_clk: uart1_clk {
561 usart2_clk: usart2_clk {
566 usart3_clk: usart3_clk {
571 usart4_clk: usart4_clk {
646 uhphs_clk: uhphs_clk {
651 udphs_clk: udphs_clk {
671 macb0_clk: macb0_clk {
676 macb1_clk: macb1_clk {
686 securam_clk: securam_clk {
708 compatible = "atmel,at91sam9x5-clk-peripheral";
709 #address-cells = <1>;
718 cpkcc_clk: cpkcc_clk {
728 mpddr_clk: mpddr_clk {
733 matrix0_clk: matrix0_clk {
761 compatible = "atmel,hsmci";
762 reg = <0xf8000000 0x600>;
763 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
764 pinctrl-names = "default";
765 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
767 #address-cells = <1>;
769 clocks = <&mci0_clk>;
770 clock-names = "mci_clk";
774 #address-cells = <1>;
776 compatible = "atmel,at91rm9200-spi";
777 reg = <0xf8010000 0x100>;
778 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
779 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_spi0>;
781 clocks = <&spi0_clk>;
782 clock-names = "spi_clk";
787 compatible = "atmel,at91sam9x5-i2c";
788 reg = <0xf8014000 0x4000>;
789 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
790 pinctrl-names = "default";
791 pinctrl-0 = <&pinctrl_i2c0>;
792 #address-cells = <1>;
794 clocks = <&twi0_clk>;
798 tcb0: timer@f801c000 {
799 compatible = "atmel,at91sam9x5-tcb";
800 reg = <0xf801c000 0x100>;
801 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
802 clocks = <&tcb0_clk>;
803 clock-names = "t0_clk";
806 macb0: ethernet@f8020000 {
807 compatible = "atmel,sama5d4-gem";
808 reg = <0xf8020000 0x100>;
809 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
810 pinctrl-names = "default";
811 pinctrl-0 = <&pinctrl_macb0_rmii>;
812 clocks = <&macb0_clk>, <&macb0_clk>;
813 clock-names = "hclk", "pclk";
818 compatible = "atmel,at91sam9x5-i2c";
819 reg = <0xf8024000 0x4000>;
820 interrupts = <34 4 6>;
821 pinctrl-names = "default";
822 pinctrl-0 = <&pinctrl_i2c2>;
823 #address-cells = <1>;
825 clocks = <&twi2_clk>;
830 compatible = "atmel,hsmci";
831 reg = <0xfc000000 0x600>;
832 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
833 pinctrl-names = "default";
834 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
836 #address-cells = <1>;
838 clocks = <&mci1_clk>;
839 clock-names = "mci_clk";
842 usart2: serial@fc008000 {
843 compatible = "atmel,at91sam9260-usart";
844 reg = <0xfc008000 0x100>;
845 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
846 pinctrl-names = "default";
847 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
848 clocks = <&usart2_clk>;
849 clock-names = "usart";
853 usart3: serial@fc00c000 {
854 compatible = "atmel,at91sam9260-usart";
855 reg = <0xfc00c000 0x100>;
856 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_usart3>;
859 clocks = <&usart3_clk>;
860 clock-names = "usart";
864 usart4: serial@fc010000 {
865 compatible = "atmel,at91sam9260-usart";
866 reg = <0xfc010000 0x100>;
867 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
868 pinctrl-names = "default";
869 pinctrl-0 = <&pinctrl_usart4>;
870 clocks = <&usart4_clk>;
871 clock-names = "usart";
875 tcb1: timer@fc020000 {
876 compatible = "atmel,at91sam9x5-tcb";
877 reg = <0xfc020000 0x100>;
878 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
879 clocks = <&tcb1_clk>;
880 clock-names = "t0_clk";
884 compatible = "atmel,at91sam9x5-adc";
885 reg = <0xfc034000 0x100>;
886 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
887 pinctrl-names = "default";
889 /* external trigger is conflict with USBA_VBUS */
898 clock-names = "adc_clk", "adc_op_clk";
899 atmel,adc-channels-used = <0x01f>;
900 atmel,adc-startup-time = <40>;
901 atmel,adc-use-external;
902 atmel,adc-vref = <3000>;
903 atmel,adc-res = <8 10>;
904 atmel,adc-sample-hold-time = <11>;
905 atmel,adc-res-names = "lowres", "highres";
906 atmel,adc-ts-pressure-threshold = <10000>;
910 trigger-name = "external-rising";
911 trigger-value = <0x1>;
915 trigger-name = "external-falling";
916 trigger-value = <0x2>;
920 trigger-name = "external-any";
921 trigger-value = <0x3>;
925 trigger-name = "continuous";
926 trigger-value = <0x6>;
931 compatible = "atmel,at91sam9g45-rstc";
932 reg = <0xfc068600 0x10>;
936 compatible = "atmel,at91sam9x5-shdwc";
937 reg = <0xfc068610 0x10>;
940 pit: timer@fc068630 {
941 compatible = "atmel,at91sam9260-pit";
942 reg = <0xfc068630 0xf>;
943 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
948 compatible = "atmel,at91sam9260-wdt";
949 reg = <0xfc068640 0x10>;
954 compatible = "atmel,at91sam9x5-sckc";
955 reg = <0xfc068650 0x4>;
957 slow_rc_osc: slow_rc_osc {
958 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
960 clock-frequency = <32768>;
961 clock-accuracy = <250000000>;
962 atmel,startup-time-usec = <75>;
966 compatible = "atmel,at91sam9x5-clk-slow-osc";
968 clocks = <&slow_xtal>;
969 atmel,startup-time-usec = <1200000>;
973 compatible = "atmel,at91sam9x5-clk-slow";
975 clocks = <&slow_rc_osc &slow_osc>;
980 compatible = "atmel,at91rm9200-rtc";
981 reg = <0xfc0686b0 0x30>;
982 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
985 dbgu: serial@fc069000 {
986 compatible = "atmel,at91sam9260-usart";
987 reg = <0xfc069000 0x200>;
988 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
989 pinctrl-names = "default";
990 pinctrl-0 = <&pinctrl_dbgu>;
991 clocks = <&dbgu_clk>;
992 clock-names = "usart";
998 #address-cells = <1>;
1000 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
1001 ranges = <0xfc06a000 0xfc06a000 0x4000>;
1002 /* WARNING: revisit as pin spec has changed */
1005 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
1006 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
1007 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
1008 0x00000000 0x00000000 0x00000000 /* pioD */
1009 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
1012 pioA: gpio@fc06a000 {
1013 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1014 reg = <0xfc06a000 0x100>;
1015 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
1018 interrupt-controller;
1019 #interrupt-cells = <2>;
1020 clocks = <&pioA_clk>;
1023 pioB: gpio@fc06b000 {
1024 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1025 reg = <0xfc06b000 0x100>;
1026 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
1029 interrupt-controller;
1030 #interrupt-cells = <2>;
1031 clocks = <&pioB_clk>;
1034 pioC: gpio@fc06c000 {
1035 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1036 reg = <0xfc06c000 0x100>;
1037 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
1040 interrupt-controller;
1041 #interrupt-cells = <2>;
1042 clocks = <&pioC_clk>;
1045 pioE: gpio@fc06d000 {
1046 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1047 reg = <0xfc06d000 0x100>;
1048 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1051 interrupt-controller;
1052 #interrupt-cells = <2>;
1053 clocks = <&pioE_clk>;
1056 /* pinctrl pin settings */
1058 pinctrl_adc0_adtrg: adc0_adtrg {
1060 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1062 pinctrl_adc0_ad0: adc0_ad0 {
1064 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1066 pinctrl_adc0_ad1: adc0_ad1 {
1068 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1070 pinctrl_adc0_ad2: adc0_ad2 {
1072 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1074 pinctrl_adc0_ad3: adc0_ad3 {
1076 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1078 pinctrl_adc0_ad4: adc0_ad4 {
1080 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1085 pinctrl_dbgu: dbgu-0 {
1087 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, /* conflicts with D14 and TDI */
1088 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with D15 and TDO */
1093 pinctrl_i2c0: i2c0-0 {
1095 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1096 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1101 pinctrl_i2c2: i2c2-0 {
1103 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1104 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1109 pinctrl_macb0_rmii: macb0_rmii-0 {
1111 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1112 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1113 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1114 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1115 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1116 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1117 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1118 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1119 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1120 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1126 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1128 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1129 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDB, conflict with NAND_D0 */
1130 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB0, conflict with NAND_D1 */
1133 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1135 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB1, conflict with NAND_D2 */
1136 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB2, conflict with NAND_D3 */
1137 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB3, conflict with NAND_D4 */
1143 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1145 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1146 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1147 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1150 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1152 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1153 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1154 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1160 pinctrl_nand: nand-0 {
1162 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1163 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1165 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1166 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1168 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1169 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1170 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1171 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1172 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1173 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1174 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1175 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1176 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1177 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1182 pinctrl_spi0: spi0-0 {
1184 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1185 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1186 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1192 pinctrl_usart2: usart2-0 {
1194 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1195 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD - conflicts with G0_COL, PCK2 */
1198 pinctrl_usart2_rts: usart2_rts-0 {
1199 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1201 pinctrl_usart2_cts: usart2_cts-0 {
1202 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1207 pinctrl_usart3: usart3-0 {
1209 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1210 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1216 pinctrl_usart4: usart4-0 {
1218 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1219 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1222 pinctrl_usart4_rts: usart4_rts-0 {
1223 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1225 pinctrl_usart4_cts: usart4_cts-0 {
1226 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1231 aic: interrupt-controller@fc06e000 {
1232 #interrupt-cells = <3>;
1233 compatible = "atmel,sama5d4-aic";
1234 interrupt-controller;
1235 reg = <0xfc06e000 0x200>;
1236 atmel,external-irqs = <56>;