2 * Device Tree Source for the SH73A0 SoC
4 * Copyright (C) 2012 Renesas Solutions Corp.
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 /include/ "skeleton.dtsi"
14 compatible = "renesas,sh73a0";
22 compatible = "arm,cortex-a9";
27 compatible = "arm,cortex-a9";
32 gic: interrupt-controller@f0001000 {
33 compatible = "arm,cortex-a9-gic";
34 #interrupt-cells = <3>;
37 reg = <0xf0001000 0x1000>,
41 i2c0: i2c@0xe6820000 {
44 compatible = "renesas,rmobile-iic";
45 reg = <0xe6820000 0x425>;
46 interrupt-parent = <&gic>;
47 interrupts = <0 167 0x4
53 i2c1: i2c@0xe6822000 {
56 compatible = "renesas,rmobile-iic";
57 reg = <0xe6822000 0x425>;
58 interrupt-parent = <&gic>;
59 interrupts = <0 51 0x4
65 i2c2: i2c@0xe6824000 {
68 compatible = "renesas,rmobile-iic";
69 reg = <0xe6824000 0x425>;
70 interrupt-parent = <&gic>;
71 interrupts = <0 171 0x4
77 i2c3: i2c@0xe6826000 {
80 compatible = "renesas,rmobile-iic";
81 reg = <0xe6826000 0x425>;
82 interrupt-parent = <&gic>;
83 interrupts = <0 183 0x4
89 i2c4: i2c@0xe6828000 {
92 compatible = "renesas,rmobile-iic";
93 reg = <0xe6828000 0x425>;
94 interrupt-parent = <&gic>;
95 interrupts = <0 187 0x4
101 mmcif: mmcif@0x10010000 {
102 compatible = "renesas,sh-mmcif";
103 reg = <0xe6bd0000 0x100>;
104 interrupt-parent = <&gic>;
105 interrupts = <0 140 0x4
111 sdhi0: sdhi@0xee100000 {
112 compatible = "renesas,r8a7740-sdhi";
113 reg = <0xee100000 0x100>;
114 interrupt-parent = <&gic>;
122 /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
123 sdhi1: sdhi@0xee120000 {
124 compatible = "renesas,r8a7740-sdhi";
125 reg = <0xee120000 0x100>;
126 interrupt-parent = <&gic>;
129 toshiba,mmc-wrprotect-disable;
134 sdhi2: sdhi@0xee140000 {
135 compatible = "renesas,r8a7740-sdhi";
136 reg = <0xee140000 0x100>;
137 interrupt-parent = <&gic>;
138 interrupts = <0 104 4
140 toshiba,mmc-wrprotect-disable;