arch/arm/boot/dts/socfpga_arria10.dtsi

   1 /*
   2  * Copyright Altera Corporation (C) 2014. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 #include "skeleton.dtsi"
  18 #include <dt-bindings/interrupt-controller/arm-gic.h>
  19
  20 / {
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23
  24         aliases {
  25                 ethernet0 = &gmac0;
  26                 ethernet1 = &gmac1;
  27                 ethernet2 = &gmac2;
  28                 serial0 = &uart0;
  29                 serial1 = &uart1;
  30                 timer0 = &timer0;
  31                 timer1 = &timer1;
  32                 timer2 = &timer2;
  33                 timer3 = &timer3;
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39                 enable-method = "altr,socfpga-a10-smp";
  40
  41                 cpu@0 {
  42                         compatible = "arm,cortex-a9";
  43                         device_type = "cpu";
  44                         reg = <0>;
  45                         next-level-cache = <&L2>;
  46                 };
  47                 cpu@1 {
  48                         compatible = "arm,cortex-a9";
  49                         device_type = "cpu";
  50                         reg = <1>;
  51                         next-level-cache = <&L2>;
  52                 };
  53         };
  54
  55         intc: intc@ffffd000 {
  56                 compatible = "arm,cortex-a9-gic";
  57                 #interrupt-cells = <3>;
  58                 interrupt-controller;
  59                 reg = <0xffffd000 0x1000>,
  60                       <0xffffc100 0x100>;
  61         };
  62
  63         soc {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 compatible = "simple-bus";
  67                 device_type = "soc";
  68                 interrupt-parent = <&intc>;
  69                 ranges;
  70
  71                 amba {
  72                         compatible = "arm,amba-bus";
  73                         #address-cells = <1>;
  74                         #size-cells = <1>;
  75                         ranges;
  76
  77                         pdma: pdma@ffda1000 {
  78                                 compatible = "arm,pl330", "arm,primecell";
  79                                 reg = <0xffda1000 0x1000>;
  80                                 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
  81                                              <0 84 IRQ_TYPE_LEVEL_HIGH>,
  82                                              <0 85 IRQ_TYPE_LEVEL_HIGH>,
  83                                              <0 86 IRQ_TYPE_LEVEL_HIGH>,
  84                                              <0 87 IRQ_TYPE_LEVEL_HIGH>,
  85                                              <0 88 IRQ_TYPE_LEVEL_HIGH>,
  86                                              <0 89 IRQ_TYPE_LEVEL_HIGH>,
  87                                              <0 90 IRQ_TYPE_LEVEL_HIGH>;
  88                                 #dma-cells = <1>;
  89                                 #dma-channels = <8>;
  90                                 #dma-requests = <32>;
  91                         };
  92                 };
  93
  94                 clkmgr@ffd04000 {
  95                                 compatible = "altr,clk-mgr";
  96                                 reg = <0xffd04000 0x1000>;
  97
  98                                 clocks {
  99                                         #address-cells = <1>;
 100                                         #size-cells = <0>;
 101
 102                                         osc1: osc1 {
 103                                                 #clock-cells = <0>;
 104                                                 compatible = "fixed-clock";
 105                                         };
 106
 107                                         main_pll: main_pll {
 108                                                 #address-cells = <1>;
 109                                                 #size-cells = <0>;
 110                                                 #clock-cells = <0>;
 111                                                 compatible = "altr,socfpga-pll-clock";
 112                                                 clocks = <&osc1>;
 113                                         };
 114
 115                                         periph_pll: periph_pll {
 116                                                 #address-cells = <1>;
 117                                                 #size-cells = <0>;
 118                                                 #clock-cells = <0>;
 119                                                 compatible = "altr,socfpga-pll-clock";
 120                                                 clocks = <&osc1>;
 121                                         };
 122                                 };
 123                 };
 124
 125                 gmac0: ethernet@ff800000 {
 126                         compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
 127                         reg = <0xff800000 0x2000>;
 128                         interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
 129                         interrupt-names = "macirq";
 130                         /* Filled in by bootloader */
 131                         mac-address = [00 00 00 00 00 00];
 132                         status = "disabled";
 133                 };
 134
 135                 gmac1: ethernet@ff802000 {
 136                         compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
 137                         reg = <0xff802000 0x2000>;
 138                         interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
 139                         interrupt-names = "macirq";
 140                         /* Filled in by bootloader */
 141                         mac-address = [00 00 00 00 00 00];
 142                         status = "disabled";
 143                 };
 144
 145                 gmac2: ethernet@ff804000 {
 146                         compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
 147                         reg = <0xff804000 0x2000>;
 148                         interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
 149                         interrupt-names = "macirq";
 150                         /* Filled in by bootloader */
 151                         mac-address = [00 00 00 00 00 00];
 152                         status = "disabled";
 153                 };
 154
 155                 gpio0: gpio@ffc02900 {
 156                         #address-cells = <1>;
 157                         #size-cells = <0>;
 158                         compatible = "snps,dw-apb-gpio";
 159                         reg = <0xffc02900 0x100>;
 160                         status = "disabled";
 161
 162                         porta: gpio-controller@0 {
 163                                 compatible = "snps,dw-apb-gpio-port";
 164                                 gpio-controller;
 165                                 #gpio-cells = <2>;
 166                                 snps,nr-gpios = <29>;
 167                                 reg = <0>;
 168                                 interrupt-controller;
 169                                 #interrupt-cells = <2>;
 170                                 interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
 171                         };
 172                 };
 173
 174                 gpio1: gpio@ffc02a00 {
 175                         #address-cells = <1>;
 176                         #size-cells = <0>;
 177                         compatible = "snps,dw-apb-gpio";
 178                         reg = <0xffc02a00 0x100>;
 179                         status = "disabled";
 180
 181                         portb: gpio-controller@0 {
 182                                 compatible = "snps,dw-apb-gpio-port";
 183                                 gpio-controller;
 184                                 #gpio-cells = <2>;
 185                                 snps,nr-gpios = <29>;
 186                                 reg = <0>;
 187                                 interrupt-controller;
 188                                 #interrupt-cells = <2>;
 189                                 interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
 190                         };
 191                 };
 192
 193                 gpio2: gpio@ffc02b00 {
 194                         #address-cells = <1>;
 195                         #size-cells = <0>;
 196                         compatible = "snps,dw-apb-gpio";
 197                         reg = <0xffc02b00 0x100>;
 198                         status = "disabled";
 199
 200                         portc: gpio-controller@0 {
 201                                 compatible = "snps,dw-apb-gpio-port";
 202                                 gpio-controller;
 203                                 #gpio-cells = <2>;
 204                                 snps,nr-gpios = <27>;
 205                                 reg = <0>;
 206                                 interrupt-controller;
 207                                 #interrupt-cells = <2>;
 208                                 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
 209                         };
 210                 };
 211
 212                 i2c0: i2c@ffc02200 {
 213                         #address-cells = <1>;
 214                         #size-cells = <0>;
 215                         compatible = "snps,designware-i2c";
 216                         reg = <0xffc02200 0x100>;
 217                         interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
 218                         status = "disabled";
 219                 };
 220
 221                 i2c1: i2c@ffc02300 {
 222                         #address-cells = <1>;
 223                         #size-cells = <0>;
 224                         compatible = "snps,designware-i2c";
 225                         reg = <0xffc02300 0x100>;
 226                         interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
 227                         status = "disabled";
 228                 };
 229
 230                 i2c2: i2c@ffc02400 {
 231                         #address-cells = <1>;
 232                         #size-cells = <0>;
 233                         compatible = "snps,designware-i2c";
 234                         reg = <0xffc02400 0x100>;
 235                         interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
 236                         status = "disabled";
 237                 };
 238
 239                 i2c3: i2c@ffc02500 {
 240                         #address-cells = <1>;
 241                         #size-cells = <0>;
 242                         compatible = "snps,designware-i2c";
 243                         reg = <0xffc02500 0x100>;
 244                         interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
 245                         status = "disabled";
 246                 };
 247
 248                 i2c4: i2c@ffc02600 {
 249                         #address-cells = <1>;
 250                         #size-cells = <0>;
 251                         compatible = "snps,designware-i2c";
 252                         reg = <0xffc02600 0x100>;
 253                         interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
 254                         status = "disabled";
 255                 };
 256
 257                 L2: l2-cache@fffff000 {
 258                         compatible = "arm,pl310-cache";
 259                         reg = <0xfffff000 0x1000>;
 260                         interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
 261                         cache-unified;
 262                         cache-level = <2>;
 263                 };
 264
 265                 mmc: dwmmc0@ff808000 {
 266                         #address-cells = <1>;
 267                         #size-cells = <0>;
 268                         compatible = "altr,socfpga-dw-mshc";
 269                         reg = <0xff808000 0x1000>;
 270                         interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
 271                         fifo-depth = <0x400>;
 272                 };
 273
 274                 ocram: sram@ffe00000 {
 275                         compatible = "mmio-sram";
 276                         reg = <0xffe00000 0x40000>;
 277                 };
 278
 279                 rst: rstmgr@ffd05000 {
 280                         #reset-cells = <1>;
 281                         compatible = "altr,rst-mgr";
 282                         reg = <0xffd05000 0x100>;
 283                 };
 284
 285                 scu: snoop-control-unit@ffffc000 {
 286                         compatible = "arm,cortex-a9-scu";
 287                         reg = <0xffffc000 0x100>;
 288                 };
 289
 290                 sysmgr: sysmgr@ffd06000 {
 291                         compatible = "altr,sys-mgr", "syscon";
 292                         reg = <0xffd06000 0x300>;
 293                 };
 294
 295                 /* Local timer */
 296                 timer@ffffc600 {
 297                         compatible = "arm,cortex-a9-twd-timer";
 298                         reg = <0xffffc600 0x100>;
 299                         interrupts = <1 13 0xf04>;
 300                 };
 301
 302                 timer0: timer0@ffc02700 {
 303                         compatible = "snps,dw-apb-timer";
 304                         interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
 305                         reg = <0xffc02700 0x100>;
 306                 };
 307
 308                 timer1: timer1@ffc02800 {
 309                         compatible = "snps,dw-apb-timer";
 310                         interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
 311                         reg = <0xffc02800 0x100>;
 312                 };
 313
 314                 timer2: timer2@ffd00000 {
 315                         compatible = "snps,dw-apb-timer";
 316                         interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
 317                         reg = <0xffd00000 0x100>;
 318                 };
 319
 320                 timer3: timer3@ffd00100 {
 321                         compatible = "snps,dw-apb-timer";
 322                         interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
 323                         reg = <0xffd01000 0x100>;
 324                 };
 325
 326                 uart0: serial0@ffc02000 {
 327                         compatible = "snps,dw-apb-uart";
 328                         reg = <0xffc02000 0x100>;
 329                         interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
 330                         reg-shift = <2>;
 331                         reg-io-width = <4>;
 332                 };
 333
 334                 uart1: serial1@ffc02100 {
 335                         compatible = "snps,dw-apb-uart";
 336                         reg = <0xffc02100 0x100>;
 337                         interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
 338                         reg-shift = <2>;
 339                         reg-io-width = <4>;
 340                 };
 341
 342                 usbphy0: usbphy@0 {
 343                         #phy-cells = <0>;
 344                         compatible = "usb-nop-xceiv";
 345                         status = "okay";
 346                 };
 347
 348                 usb0: usb@ffb00000 {
 349                         compatible = "snps,dwc2";
 350                         reg = <0xffb00000 0xffff>;
 351                         interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
 352                         phys = <&usbphy0>;
 353                         phy-names = "usb2-phy";
 354                         status = "disabled";
 355                 };
 356
 357                 usb1: usb@ffb40000 {
 358                         compatible = "snps,dwc2";
 359                         reg = <0xffb40000 0xffff>;
 360                         interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
 361                         phys = <&usbphy0>;
 362                         phy-names = "usb2-phy";
 363                         status = "disabled";
 364                 };
 365
 366                 watchdog0: watchdog@ffd00200 {
 367                         compatible = "snps,dw-wdt";
 368                         reg = <0xffd00200 0x100>;
 369                         interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
 370                         status = "disabled";
 371                 };
 372
 373                 watchdog1: watchdog@ffd00300 {
 374                         compatible = "snps,dw-wdt";
 375                         reg = <0xffd00300 0x100>;
 376                         interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
 377                         status = "disabled";
 378                 };
 379         };
 380 };