arch/arm/boot/dts/ste-nomadik-stn8815.dtsi

   1 /*
   2  * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
   3  */
   4 /include/ "skeleton.dtsi"
   5
   6 / {
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9
  10         memory {
  11                 reg = <0x00000000 0x04000000>,
  12                     <0x08000000 0x04000000>;
  13         };
  14
  15         L2: l2-cache {
  16                 compatible = "arm,l210-cache";
  17                 reg = <0x10210000 0x1000>;
  18                 interrupt-parent = <&vica>;
  19                 interrupts = <30>;
  20                 cache-unified;
  21                 cache-level = <2>;
  22         };
  23
  24         mtu0 {
  25                 /* Nomadik system timer */
  26                 reg = <0x101e2000 0x1000>;
  27                 interrupt-parent = <&vica>;
  28                 interrupts = <4>;
  29         };
  30
  31         mtu1 {
  32                 /* Secondary timer */
  33                 reg = <0x101e3000 0x1000>;
  34                 interrupt-parent = <&vica>;
  35                 interrupts = <5>;
  36         };
  37
  38         gpio0: gpio@101e4000 {
  39                 compatible = "st,nomadik-gpio";
  40                 reg =  <0x101e4000 0x80>;
  41                 interrupt-parent = <&vica>;
  42                 interrupts = <6>;
  43                 interrupt-controller;
  44                 #interrupt-cells = <2>;
  45                 gpio-controller;
  46                 #gpio-cells = <2>;
  47                 gpio-bank = <0>;
  48         };
  49
  50         gpio1: gpio@101e5000 {
  51                 compatible = "st,nomadik-gpio";
  52                 reg =  <0x101e5000 0x80>;
  53                 interrupt-parent = <&vica>;
  54                 interrupts = <7>;
  55                 interrupt-controller;
  56                 #interrupt-cells = <2>;
  57                 gpio-controller;
  58                 #gpio-cells = <2>;
  59                 gpio-bank = <1>;
  60         };
  61
  62         gpio2: gpio@101e6000 {
  63                 compatible = "st,nomadik-gpio";
  64                 reg =  <0x101e6000 0x80>;
  65                 interrupt-parent = <&vica>;
  66                 interrupts = <8>;
  67                 interrupt-controller;
  68                 #interrupt-cells = <2>;
  69                 gpio-controller;
  70                 #gpio-cells = <2>;
  71                 gpio-bank = <2>;
  72         };
  73
  74         gpio3: gpio@101e7000 {
  75                 compatible = "st,nomadik-gpio";
  76                 reg =  <0x101e7000 0x80>;
  77                 interrupt-parent = <&vica>;
  78                 interrupts = <9>;
  79                 interrupt-controller;
  80                 #interrupt-cells = <2>;
  81                 gpio-controller;
  82                 #gpio-cells = <2>;
  83                 gpio-bank = <3>;
  84         };
  85
  86         pinctrl {
  87                 compatible = "stericsson,nmk-pinctrl-stn8815";
  88         };
  89
  90         /* A NAND flash of 128 MiB */
  91         fsmc: flash@40000000 {
  92                 compatible = "stericsson,fsmc-nand";
  93                 #address-cells = <1>;
  94                 #size-cells = <1>;
  95                 reg = <0x10100000 0x1000>,      /* FSMC Register*/
  96                         <0x40000000 0x2000>,    /* NAND Base DATA */
  97                         <0x41000000 0x2000>,    /* NAND Base ADDR */
  98                         <0x40800000 0x2000>;    /* NAND Base CMD */
  99                 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 100                 status = "okay";
 101
 102                 partition@0 {
 103                 label = "X-Loader(NAND)";
 104                         reg = <0x0 0x40000>;
 105                 };
 106                 partition@40000 {
 107                         label = "MemInit(NAND)";
 108                         reg = <0x40000 0x40000>;
 109                 };
 110                 partition@80000 {
 111                         label = "BootLoader(NAND)";
 112                         reg = <0x80000 0x200000>;
 113                 };
 114                 partition@280000 {
 115                         label = "Kernel zImage(NAND)";
 116                         reg = <0x280000 0x300000>;
 117                 };
 118                 partition@580000 {
 119                         label = "Root Filesystem(NAND)";
 120                         reg = <0x580000 0x1600000>;
 121                 };
 122                 partition@1b80000 {
 123                         label = "User Filesystem(NAND)";
 124                         reg = <0x1b80000 0x6480000>;
 125                 };
 126         };
 127
 128         external-bus@34000000 {
 129                 compatible = "simple-bus";
 130                 reg = <0x34000000 0x1000000>;
 131                 #address-cells = <1>;
 132                 #size-cells = <1>;
 133                 ranges = <0 0x34000000 0x1000000>;
 134                 ethernet@300 {
 135                         compatible = "smsc,lan91c111";
 136                         reg = <0x300 0x0fd00>;
 137                 };
 138         };
 139
 140         /* I2C0 connected to the STw4811 power management chip */
 141         i2c0 {
 142                 compatible = "i2c-gpio";
 143                 gpios = <&gpio1 31 0>, /* sda */
 144                         <&gpio1 30 0>; /* scl */
 145                 #address-cells = <1>;
 146                 #size-cells = <0>;
 147
 148                 stw4811@2d {
 149                            compatible = "st,stw4811";
 150                            reg = <0x2d>;
 151                 };
 152         };
 153
 154         /* I2C1 connected to various sensors */
 155         i2c1 {
 156                 compatible = "i2c-gpio";
 157                 gpios = <&gpio1 22 0>, /* sda */
 158                         <&gpio1 21 0>; /* scl */
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161
 162                 camera@2d {
 163                            compatible = "st,camera";
 164                            reg = <0x10>;
 165                 };
 166                 stw5095@1a {
 167                            compatible = "st,stw5095";
 168                            reg = <0x1a>;
 169                 };
 170                 lis3lv02dl@1d {
 171                            compatible = "st,lis3lv02dl";
 172                            reg = <0x1d>;
 173                 };
 174         };
 175
 176         /* I2C2 connected to the USB portions of the STw4811 only */
 177         i2c2 {
 178                 compatible = "i2c-gpio";
 179                 gpios = <&gpio2 10 0>, /* sda */
 180                         <&gpio2 9 0>; /* scl */
 181                 #address-cells = <1>;
 182                 #size-cells = <0>;
 183                 stw4811@2d {
 184                            compatible = "st,stw4811-usb";
 185                            reg = <0x2d>;
 186                 };
 187         };
 188
 189         amba {
 190                 compatible = "arm,amba-bus";
 191                 #address-cells = <1>;
 192                 #size-cells = <1>;
 193                 ranges;
 194
 195                 vica: intc@0x10140000 {
 196                         compatible = "arm,versatile-vic";
 197                         interrupt-controller;
 198                         #interrupt-cells = <1>;
 199                         reg = <0x10140000 0x20>;
 200                 };
 201
 202                 vicb: intc@0x10140020 {
 203                         compatible = "arm,versatile-vic";
 204                         interrupt-controller;
 205                         #interrupt-cells = <1>;
 206                         reg = <0x10140020 0x20>;
 207                 };
 208
 209                 uart0: uart@101fd000 {
 210                         compatible = "arm,pl011", "arm,primecell";
 211                         reg = <0x101fd000 0x1000>;
 212                         interrupt-parent = <&vica>;
 213                         interrupts = <12>;
 214                 };
 215
 216                 uart1: uart@101fb000 {
 217                         compatible = "arm,pl011", "arm,primecell";
 218                         reg = <0x101fb000 0x1000>;
 219                         interrupt-parent = <&vica>;
 220                         interrupts = <17>;
 221                 };
 222
 223                 uart2: uart@101f2000 {
 224                         compatible = "arm,pl011", "arm,primecell";
 225                         reg = <0x101f2000 0x1000>;
 226                         interrupt-parent = <&vica>;
 227                         interrupts = <28>;
 228                         status = "disabled";
 229                 };
 230
 231                 rng: rng@101b0000 {
 232                         compatible = "arm,primecell";
 233                         reg = <0x101b0000 0x1000>;
 234                 };
 235
 236                 rtc: rtc@101e8000 {
 237                         compatible = "arm,pl031", "arm,primecell";
 238                         reg = <0x101e8000 0x1000>;
 239                         interrupt-parent = <&vica>;
 240                         interrupts = <10>;
 241                 };
 242
 243                 mmcsd: sdi@101f6000 {
 244                         compatible = "arm,pl18x", "arm,primecell";
 245                         reg = <0x101f6000 0x1000>;
 246                         interrupt-parent = <&vica>;
 247                         interrupts = <22>;
 248                         max-frequency = <48000000>;
 249                         bus-width = <4>;
 250                         mmc-cap-mmc-highspeed;
 251                         mmc-cap-sd-highspeed;
 252                         cd-gpios = <&gpio3 15 0x1>;
 253                         cd-inverted;
 254                 };
 255         };
 256 };