2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
4 /include/ "skeleton.dtsi"
11 reg = <0x00000000 0x04000000>,
12 <0x08000000 0x04000000>;
16 compatible = "arm,l210-cache";
17 reg = <0x10210000 0x1000>;
18 interrupt-parent = <&vica>;
25 /* Nomadik system timer */
26 compatible = "st,nomadik-mtu";
27 reg = <0x101e2000 0x1000>;
28 interrupt-parent = <&vica>;
30 clocks = <&timclk>, <&pclk>;
31 clock-names = "timclk", "apb_pclk";
36 reg = <0x101e3000 0x1000>;
37 interrupt-parent = <&vica>;
39 clocks = <&timclk>, <&pclk>;
40 clock-names = "timclk", "apb_pclk";
43 gpio0: gpio@101e4000 {
44 compatible = "st,nomadik-gpio";
45 reg = <0x101e4000 0x80>;
46 interrupt-parent = <&vica>;
49 #interrupt-cells = <2>;
56 gpio1: gpio@101e5000 {
57 compatible = "st,nomadik-gpio";
58 reg = <0x101e5000 0x80>;
59 interrupt-parent = <&vica>;
62 #interrupt-cells = <2>;
69 gpio2: gpio@101e6000 {
70 compatible = "st,nomadik-gpio";
71 reg = <0x101e6000 0x80>;
72 interrupt-parent = <&vica>;
75 #interrupt-cells = <2>;
82 gpio3: gpio@101e7000 {
83 compatible = "st,nomadik-gpio";
84 reg = <0x101e7000 0x80>;
85 interrupt-parent = <&vica>;
88 #interrupt-cells = <2>;
96 compatible = "stericsson,stn8815-pinctrl";
97 /* Pin configurations */
99 uart0_default_mux: uart0_mux {
107 uart1_default_mux: uart1_mux {
115 mmcsd_default_mux: mmcsd_mux {
117 ste,function = "mmcsd";
118 ste,pins = "mmcsd_a_1";
121 mmcsd_default_mode: mmcsd_default {
124 ste,pins = "GPIO8_B10";
128 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR */
129 ste,pins = "GPIO10_C11", "GPIO15_A12",
134 /* MCCMD, MCDAT3-0, MCMSFBCLK */
135 ste,pins = "GPIO9_A10", "GPIO11_B11",
136 "GPIO12_A11", "GPIO13_C12",
137 "GPIO14_B12", "GPIO24_C15";
143 i2c0_default_mode: i2c0_default {
145 ste,pins = "GPIO62_D3", "GPIO63_D2";
151 i2c1_default_mode: i2c1_default {
153 ste,pins = "GPIO53_L4", "GPIO54_L3";
159 i2c2_default_mode: i2c2_default {
161 ste,pins = "GPIO73_C21", "GPIO74_C20";
169 compatible = "stericsson,nomadik-src";
170 reg = <0x101e0000 0x1000>;
175 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
176 * that is parent of TIMCLK, PLL1 and PLL2
180 compatible = "fixed-clock";
181 clock-frequency = <19200000>;
185 * The 2.4 MHz TIMCLK reference clock is active at
186 * boot time, this is actually the MXTALCLK @19.2 MHz
187 * divided by 8. This clock is used by the timers and
188 * watchdog. See page 105 ff.
190 timclk: timclk@2.4M {
192 compatible = "fixed-factor-clock";
198 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
201 compatible = "st,nomadik-pll-clock";
206 /* HCLK divides the PLL1 with 1,2,3 or 4 */
209 compatible = "st,nomadik-hclk-clock";
212 /* The PCLK domain uses HCLK right off */
215 compatible = "fixed-factor-clock";
221 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
224 compatible = "st,nomadik-pll-clock";
228 clk216: clk216@216M {
230 compatible = "fixed-factor-clock";
235 clk108: clk108@108M {
237 compatible = "fixed-factor-clock";
244 compatible = "fixed-factor-clock";
245 /* The data sheet does not say how this is derived */
252 compatible = "fixed-factor-clock";
253 /* The data sheet does not say how this is derived */
260 compatible = "fixed-factor-clock";
266 /* This apparently exists as well */
267 ulpiclk: ulpiclk@60M {
269 compatible = "fixed-clock";
270 clock-frequency = <60000000>;
274 * IP AMBA bus clocks, driving the bus side of the
275 * peripheral clocking, clock gates.
278 hclkdma0: hclkdma0@48M {
280 compatible = "st,nomadik-src-clock";
284 hclksmc: hclksmc@48M {
286 compatible = "st,nomadik-src-clock";
290 hclksdram: hclksdram@48M {
292 compatible = "st,nomadik-src-clock";
296 hclkdma1: hclkdma1@48M {
298 compatible = "st,nomadik-src-clock";
302 hclkclcd: hclkclcd@48M {
304 compatible = "st,nomadik-src-clock";
308 pclkirda: pclkirda@48M {
310 compatible = "st,nomadik-src-clock";
314 pclkssp: pclkssp@48M {
316 compatible = "st,nomadik-src-clock";
320 pclkuart0: pclkuart0@48M {
322 compatible = "st,nomadik-src-clock";
326 pclksdi: pclksdi@48M {
328 compatible = "st,nomadik-src-clock";
332 pclki2c0: pclki2c0@48M {
334 compatible = "st,nomadik-src-clock";
338 pclki2c1: pclki2c1@48M {
340 compatible = "st,nomadik-src-clock";
344 pclkuart1: pclkuart1@48M {
346 compatible = "st,nomadik-src-clock";
350 pclkmsp0: pclkmsp0@48M {
352 compatible = "st,nomadik-src-clock";
356 hclkusb: hclkusb@48M {
358 compatible = "st,nomadik-src-clock";
362 hclkdif: hclkdif@48M {
364 compatible = "st,nomadik-src-clock";
368 hclksaa: hclksaa@48M {
370 compatible = "st,nomadik-src-clock";
374 hclksva: hclksva@48M {
376 compatible = "st,nomadik-src-clock";
380 pclkhsi: pclkhsi@48M {
382 compatible = "st,nomadik-src-clock";
386 pclkxti: pclkxti@48M {
388 compatible = "st,nomadik-src-clock";
392 pclkuart2: pclkuart2@48M {
394 compatible = "st,nomadik-src-clock";
398 pclkmsp1: pclkmsp1@48M {
400 compatible = "st,nomadik-src-clock";
404 pclkmsp2: pclkmsp2@48M {
406 compatible = "st,nomadik-src-clock";
410 pclkowm: pclkowm@48M {
412 compatible = "st,nomadik-src-clock";
416 hclkhpi: hclkhpi@48M {
418 compatible = "st,nomadik-src-clock";
422 pclkske: pclkske@48M {
424 compatible = "st,nomadik-src-clock";
428 pclkhsem: pclkhsem@48M {
430 compatible = "st,nomadik-src-clock";
436 compatible = "st,nomadik-src-clock";
440 hclkhash: hclkhash@48M {
442 compatible = "st,nomadik-src-clock";
446 hclkcryp: hclkcryp@48M {
448 compatible = "st,nomadik-src-clock";
452 pclkmshc: pclkmshc@48M {
454 compatible = "st,nomadik-src-clock";
458 hclkusbm: hclkusbm@48M {
460 compatible = "st,nomadik-src-clock";
464 hclkrng: hclkrng@48M {
466 compatible = "st,nomadik-src-clock";
471 /* IP kernel clocks */
474 compatible = "st,nomadik-src-clock";
476 clocks = <&clk72 &clk48>;
478 irdaclk: irdaclk@48M {
480 compatible = "st,nomadik-src-clock";
484 sspiclk: sspiclk@48M {
486 compatible = "st,nomadik-src-clock";
490 uart0clk: uart0clk@48M {
492 compatible = "st,nomadik-src-clock";
497 /* Also called MCCLK in some documents */
499 compatible = "st,nomadik-src-clock";
503 i2c0clk: i2c0clk@48M {
505 compatible = "st,nomadik-src-clock";
509 i2c1clk: i2c1clk@48M {
511 compatible = "st,nomadik-src-clock";
515 uart1clk: uart1clk@48M {
517 compatible = "st,nomadik-src-clock";
521 mspclk0: mspclk0@48M {
523 compatible = "st,nomadik-src-clock";
529 compatible = "st,nomadik-src-clock";
531 clocks = <&clk48>; /* 48 MHz not ULPI */
535 compatible = "st,nomadik-src-clock";
539 ipi2cclk: ipi2cclk@48M {
541 compatible = "st,nomadik-src-clock";
543 clocks = <&clk48>; /* Guess */
545 ipbmcclk: ipbmcclk@48M {
547 compatible = "st,nomadik-src-clock";
549 clocks = <&clk48>; /* Guess */
551 hsiclkrx: hsiclkrx@216M {
553 compatible = "st,nomadik-src-clock";
557 hsiclktx: hsiclktx@108M {
559 compatible = "st,nomadik-src-clock";
563 uart2clk: uart2clk@48M {
565 compatible = "st,nomadik-src-clock";
569 mspclk1: mspclk1@48M {
571 compatible = "st,nomadik-src-clock";
575 mspclk2: mspclk2@48M {
577 compatible = "st,nomadik-src-clock";
583 compatible = "st,nomadik-src-clock";
585 clocks = <&clk48>; /* Guess */
589 compatible = "st,nomadik-src-clock";
591 clocks = <&clk48>; /* Guess */
595 compatible = "st,nomadik-src-clock";
597 clocks = <&clk48>; /* Guess */
599 pclkmsp3: pclkmsp3@48M {
601 compatible = "st,nomadik-src-clock";
605 mspclk3: mspclk3@48M {
607 compatible = "st,nomadik-src-clock";
611 mshcclk: mshcclk@48M {
613 compatible = "st,nomadik-src-clock";
615 clocks = <&clk48>; /* Guess */
617 usbmclk: usbmclk@48M {
619 compatible = "st,nomadik-src-clock";
621 /* Stated as "48 MHz not ULPI clock" */
624 rngcclk: rngcclk@48M {
626 compatible = "st,nomadik-src-clock";
628 clocks = <&clk48>; /* Guess */
632 /* A NAND flash of 128 MiB */
633 fsmc: flash@40000000 {
634 compatible = "stericsson,fsmc-nand";
635 #address-cells = <1>;
637 reg = <0x10100000 0x1000>, /* FSMC Register*/
638 <0x40000000 0x2000>, /* NAND Base DATA */
639 <0x41000000 0x2000>, /* NAND Base ADDR */
640 <0x40800000 0x2000>; /* NAND Base CMD */
641 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
646 label = "X-Loader(NAND)";
650 label = "MemInit(NAND)";
651 reg = <0x40000 0x40000>;
654 label = "BootLoader(NAND)";
655 reg = <0x80000 0x200000>;
658 label = "Kernel zImage(NAND)";
659 reg = <0x280000 0x300000>;
662 label = "Root Filesystem(NAND)";
663 reg = <0x580000 0x1600000>;
666 label = "User Filesystem(NAND)";
667 reg = <0x1b80000 0x6480000>;
671 external-bus@34000000 {
672 compatible = "simple-bus";
673 reg = <0x34000000 0x1000000>;
674 #address-cells = <1>;
676 ranges = <0 0x34000000 0x1000000>;
678 compatible = "smsc,lan91c111";
679 reg = <0x300 0x0fd00>;
683 /* I2C0 connected to the STw4811 power management chip */
685 compatible = "i2c-gpio";
686 gpios = <&gpio1 31 0>, /* sda */
687 <&gpio1 30 0>; /* scl */
688 #address-cells = <1>;
690 pinctrl-names = "default";
691 pinctrl-0 = <&i2c0_default_mode>;
694 compatible = "st,stw4811";
699 /* I2C1 connected to various sensors */
701 compatible = "i2c-gpio";
702 gpios = <&gpio1 22 0>, /* sda */
703 <&gpio1 21 0>; /* scl */
704 #address-cells = <1>;
706 pinctrl-names = "default";
707 pinctrl-0 = <&i2c1_default_mode>;
710 compatible = "st,camera";
714 compatible = "st,stw5095";
718 compatible = "st,lis3lv02dl";
723 /* I2C2 connected to the USB portions of the STw4811 only */
725 compatible = "i2c-gpio";
726 gpios = <&gpio2 10 0>, /* sda */
727 <&gpio2 9 0>; /* scl */
728 #address-cells = <1>;
730 pinctrl-names = "default";
731 pinctrl-0 = <&i2c2_default_mode>;
734 compatible = "st,stw4811-usb";
740 compatible = "arm,amba-bus";
741 #address-cells = <1>;
745 vica: intc@0x10140000 {
746 compatible = "arm,versatile-vic";
747 interrupt-controller;
748 #interrupt-cells = <1>;
749 reg = <0x10140000 0x20>;
752 vicb: intc@0x10140020 {
753 compatible = "arm,versatile-vic";
754 interrupt-controller;
755 #interrupt-cells = <1>;
756 reg = <0x10140020 0x20>;
759 uart0: uart@101fd000 {
760 compatible = "arm,pl011", "arm,primecell";
761 reg = <0x101fd000 0x1000>;
762 interrupt-parent = <&vica>;
764 clocks = <&uart0clk>, <&pclkuart0>;
765 clock-names = "uartclk", "apb_pclk";
766 pinctrl-names = "default";
767 pinctrl-0 = <&uart0_default_mux>;
770 uart1: uart@101fb000 {
771 compatible = "arm,pl011", "arm,primecell";
772 reg = <0x101fb000 0x1000>;
773 interrupt-parent = <&vica>;
775 clocks = <&uart1clk>, <&pclkuart1>;
776 clock-names = "uartclk", "apb_pclk";
777 pinctrl-names = "default";
778 pinctrl-0 = <&uart1_default_mux>;
781 uart2: uart@101f2000 {
782 compatible = "arm,pl011", "arm,primecell";
783 reg = <0x101f2000 0x1000>;
784 interrupt-parent = <&vica>;
786 clocks = <&uart2clk>, <&pclkuart2>;
787 clock-names = "uartclk", "apb_pclk";
792 compatible = "arm,primecell";
793 reg = <0x101b0000 0x1000>;
794 clocks = <&rngcclk>, <&hclkrng>;
795 clock-names = "rng", "apb_pclk";
799 compatible = "arm,pl031", "arm,primecell";
800 reg = <0x101e8000 0x1000>;
802 clock-names = "apb_pclk";
803 interrupt-parent = <&vica>;
807 mmcsd: sdi@101f6000 {
808 compatible = "arm,pl18x", "arm,primecell";
809 reg = <0x101f6000 0x1000>;
810 clocks = <&sdiclk>, <&pclksdi>;
811 clock-names = "mclk", "apb_pclk";
812 interrupt-parent = <&vica>;
814 max-frequency = <48000000>;
816 mmc-cap-mmc-highspeed;
817 mmc-cap-sd-highspeed;
818 cd-gpios = <&gpio3 15 0x1>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;