arch/arm/boot/dts/stih407.dtsi

   1 /*
   2  * Copyright (C) 2014 STMicroelectronics Limited.
   3  * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * publishhed by the Free Software Foundation.
   8  */
   9 #include "stih407-clock.dtsi"
  10 #include "stih407-pinctrl.dtsi"
  11 #include <dt-bindings/reset-controller/stih407-resets.h>
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         cpus {
  17                 #address-cells = <1>;
  18                 #size-cells = <0>;
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "arm,cortex-a9";
  22                         reg = <0>;
  23                 };
  24                 cpu@1 {
  25                         device_type = "cpu";
  26                         compatible = "arm,cortex-a9";
  27                         reg = <1>;
  28                 };
  29         };
  30
  31         intc: interrupt-controller@08761000 {
  32                 compatible = "arm,cortex-a9-gic";
  33                 #interrupt-cells = <3>;
  34                 interrupt-controller;
  35                 reg = <0x08761000 0x1000>, <0x08760100 0x100>;
  36         };
  37
  38         scu@08760000 {
  39                 compatible = "arm,cortex-a9-scu";
  40                 reg = <0x08760000 0x1000>;
  41         };
  42
  43         timer@08760200 {
  44                 interrupt-parent = <&intc>;
  45                 compatible = "arm,cortex-a9-global-timer";
  46                 reg = <0x08760200 0x100>;
  47                 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
  48                 clocks = <&arm_periph_clk>;
  49         };
  50
  51         l2: cache-controller {
  52                 compatible = "arm,pl310-cache";
  53                 reg = <0x08762000 0x1000>;
  54                 arm,data-latency = <3 3 3>;
  55                 arm,tag-latency = <2 2 2>;
  56                 cache-unified;
  57                 cache-level = <2>;
  58         };
  59
  60         soc {
  61                 #address-cells = <1>;
  62                 #size-cells = <1>;
  63                 interrupt-parent = <&intc>;
  64                 ranges;
  65                 compatible = "simple-bus";
  66
  67                 powerdown: powerdown-controller {
  68                         compatible = "st,stih407-powerdown";
  69                         #reset-cells = <1>;
  70                 };
  71
  72                 softreset: softreset-controller {
  73                         compatible = "st,stih407-softreset";
  74                         #reset-cells = <1>;
  75                 };
  76
  77                 picophyreset: picophyreset-controller {
  78                         compatible = "st,stih407-picophyreset";
  79                         #reset-cells = <1>;
  80                 };
  81
  82                 syscfg_sbc: sbc-syscfg@9620000 {
  83                         compatible = "st,stih407-sbc-syscfg", "syscon";
  84                         reg = <0x9620000 0x1000>;
  85                 };
  86
  87                 syscfg_front: front-syscfg@9280000 {
  88                         compatible = "st,stih407-front-syscfg", "syscon";
  89                         reg = <0x9280000 0x1000>;
  90                 };
  91
  92                 syscfg_rear: rear-syscfg@9290000 {
  93                         compatible = "st,stih407-rear-syscfg", "syscon";
  94                         reg = <0x9290000 0x1000>;
  95                 };
  96
  97                 syscfg_flash: flash-syscfg@92a0000 {
  98                         compatible = "st,stih407-flash-syscfg", "syscon";
  99                         reg = <0x92a0000 0x1000>;
 100                 };
 101
 102                 syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
 103                         compatible = "st,stih407-sbc-reg-syscfg", "syscon";
 104                         reg = <0x9600000 0x1000>;
 105                 };
 106
 107                 syscfg_core: core-syscfg@92b0000 {
 108                         compatible = "st,stih407-core-syscfg", "syscon";
 109                         reg = <0x92b0000 0x1000>;
 110                 };
 111
 112                 syscfg_lpm: lpm-syscfg@94b5100 {
 113                         compatible = "st,stih407-lpm-syscfg", "syscon";
 114                         reg = <0x94b5100 0x1000>;
 115                 };
 116
 117                 serial@9830000 {
 118                         compatible = "st,asc";
 119                         reg = <0x9830000 0x2c>;
 120                         interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
 121                         pinctrl-names = "default";
 122                         pinctrl-0 = <&pinctrl_serial0>;
 123                         clocks = <&clk_ext2f_a9>;
 124
 125                         status = "disabled";
 126                 };
 127
 128                 serial@9831000 {
 129                         compatible = "st,asc";
 130                         reg = <0x9831000 0x2c>;
 131                         interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
 132                         pinctrl-names = "default";
 133                         pinctrl-0 = <&pinctrl_serial1>;
 134                         clocks = <&clk_ext2f_a9>;
 135
 136                         status = "disabled";
 137                 };
 138
 139                 serial@9832000 {
 140                         compatible = "st,asc";
 141                         reg = <0x9832000 0x2c>;
 142                         interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
 143                         pinctrl-names = "default";
 144                         pinctrl-0 = <&pinctrl_serial2>;
 145                         clocks = <&clk_ext2f_a9>;
 146
 147                         status = "disabled";
 148                 };
 149
 150                 /* SBC_ASC0 - UART10 */
 151                 sbc_serial0: serial@9530000 {
 152                         compatible = "st,asc";
 153                         reg = <0x9530000 0x2c>;
 154                         interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>;
 155                         pinctrl-names = "default";
 156                         pinctrl-0 = <&pinctrl_sbc_serial0>;
 157                         clocks = <&clk_sysin>;
 158
 159                         status = "disabled";
 160                 };
 161
 162                 serial@9531000 {
 163                         compatible = "st,asc";
 164                         reg = <0x9531000 0x2c>;
 165                         interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;
 166                         pinctrl-names = "default";
 167                         pinctrl-0 = <&pinctrl_sbc_serial1>;
 168                         clocks = <&clk_sysin>;
 169
 170                         status = "disabled";
 171                 };
 172
 173                 i2c@9840000 {
 174                         compatible = "st,comms-ssc4-i2c";
 175                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 176                         reg = <0x9840000 0x110>;
 177                         clocks = <&clk_ext2f_a9>;
 178                         clock-names = "ssc";
 179                         clock-frequency = <400000>;
 180                         pinctrl-names = "default";
 181                         pinctrl-0 = <&pinctrl_i2c0_default>;
 182
 183                         status = "disabled";
 184                 };
 185
 186                 i2c@9841000 {
 187                         compatible = "st,comms-ssc4-i2c";
 188                         reg = <0x9841000 0x110>;
 189                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 190                         clocks = <&clk_ext2f_a9>;
 191                         clock-names = "ssc";
 192                         clock-frequency = <400000>;
 193                         pinctrl-names = "default";
 194                         pinctrl-0 = <&pinctrl_i2c1_default>;
 195
 196                         status = "disabled";
 197                 };
 198
 199                 i2c@9842000 {
 200                         compatible = "st,comms-ssc4-i2c";
 201                         reg = <0x9842000 0x110>;
 202                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 203                         clocks = <&clk_ext2f_a9>;
 204                         clock-names = "ssc";
 205                         clock-frequency = <400000>;
 206                         pinctrl-names = "default";
 207                         pinctrl-0 = <&pinctrl_i2c2_default>;
 208
 209                         status = "disabled";
 210                 };
 211
 212                 i2c@9843000 {
 213                         compatible = "st,comms-ssc4-i2c";
 214                         reg = <0x9843000 0x110>;
 215                         interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
 216                         clocks = <&clk_ext2f_a9>;
 217                         clock-names = "ssc";
 218                         clock-frequency = <400000>;
 219                         pinctrl-names = "default";
 220                         pinctrl-0 = <&pinctrl_i2c3_default>;
 221
 222                         status = "disabled";
 223                 };
 224
 225                 i2c@9844000 {
 226                         compatible = "st,comms-ssc4-i2c";
 227                         reg = <0x9844000 0x110>;
 228                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 229                         clocks = <&clk_ext2f_a9>;
 230                         clock-names = "ssc";
 231                         clock-frequency = <400000>;
 232                         pinctrl-names = "default";
 233                         pinctrl-0 = <&pinctrl_i2c4_default>;
 234
 235                         status = "disabled";
 236                 };
 237
 238                 i2c@9845000 {
 239                         compatible = "st,comms-ssc4-i2c";
 240                         reg = <0x9845000 0x110>;
 241                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 242                         clocks = <&clk_ext2f_a9>;
 243                         clock-names = "ssc";
 244                         clock-frequency = <400000>;
 245                         pinctrl-names = "default";
 246                         pinctrl-0 = <&pinctrl_i2c5_default>;
 247
 248                         status = "disabled";
 249                 };
 250
 251
 252                 /* SSCs on SBC */
 253                 i2c@9540000 {
 254                         compatible = "st,comms-ssc4-i2c";
 255                         reg = <0x9540000 0x110>;
 256                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 257                         clocks = <&clk_sysin>;
 258                         clock-names = "ssc";
 259                         clock-frequency = <400000>;
 260                         pinctrl-names = "default";
 261                         pinctrl-0 = <&pinctrl_i2c10_default>;
 262
 263                         status = "disabled";
 264                 };
 265
 266                 i2c@9541000 {
 267                         compatible = "st,comms-ssc4-i2c";
 268                         reg = <0x9541000 0x110>;
 269                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 270                         clocks = <&clk_sysin>;
 271                         clock-names = "ssc";
 272                         clock-frequency = <400000>;
 273                         pinctrl-names = "default";
 274                         pinctrl-0 = <&pinctrl_i2c11_default>;
 275
 276                         status = "disabled";
 277                 };
 278         };
 279 };