2 * Copyright (C) 2012 STMicroelectronics Limited.
3 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
9 #include "stih41x.dtsi"
10 #include "stih416-clock.dtsi"
11 #include "stih416-pinctrl.dtsi"
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/reset-controller/stih416-resets.h>
17 L2: cache-controller {
18 compatible = "arm,pl310-cache";
19 reg = <0xfffe2000 0x1000>;
20 arm,data-latency = <3 3 3>;
21 arm,tag-latency = <2 2 2>;
29 interrupt-parent = <&intc>;
31 compatible = "simple-bus";
33 powerdown: powerdown-controller {
35 compatible = "st,stih416-powerdown";
38 softreset: softreset-controller {
40 compatible = "st,stih416-softreset";
43 syscfg_sbc:sbc-syscfg@fe600000{
44 compatible = "st,stih416-sbc-syscfg", "syscon";
45 reg = <0xfe600000 0x1000>;
48 syscfg_front:front-syscfg@fee10000{
49 compatible = "st,stih416-front-syscfg", "syscon";
50 reg = <0xfee10000 0x1000>;
53 syscfg_rear:rear-syscfg@fe830000{
54 compatible = "st,stih416-rear-syscfg", "syscon";
55 reg = <0xfe830000 0x1000>;
59 syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
60 compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
61 reg = <0xfddf0000 0x1000>;
64 syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
65 compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
66 reg = <0xfd6a0000 0x1000>;
69 syscfg_cpu:cpu-syscfg@fdde0000{
70 compatible = "st,stih416-cpu-syscfg", "syscon";
71 reg = <0xfdde0000 0x1000>;
74 syscfg_compo:compo-syscfg@fd320000{
75 compatible = "st,stih416-compo-syscfg", "syscon";
76 reg = <0xfd320000 0x1000>;
79 syscfg_transport:transport-syscfg@fd690000{
80 compatible = "st,stih416-transport-syscfg", "syscon";
81 reg = <0xfd690000 0x1000>;
84 syscfg_lpm:lpm-syscfg@fe4b5100{
85 compatible = "st,stih416-lpm-syscfg", "syscon";
86 reg = <0xfe4b5100 0x8>;
89 serial2: serial@fed32000{
90 compatible = "st,asc";
92 reg = <0xfed32000 0x2c>;
93 interrupts = <0 197 0>;
94 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
100 sbc_serial1: serial@fe531000 {
101 compatible = "st,asc";
103 reg = <0xfe531000 0x2c>;
104 interrupts = <0 210 0>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_sbc_serial1>;
107 clocks = <&clk_sysin>;
111 compatible = "st,comms-ssc4-i2c";
112 reg = <0xfed40000 0x110>;
113 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
114 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
116 clock-frequency = <400000>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_i2c0_default>;
124 compatible = "st,comms-ssc4-i2c";
125 reg = <0xfed41000 0x110>;
126 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
127 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
129 clock-frequency = <400000>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_i2c1_default>;
137 compatible = "st,comms-ssc4-i2c";
138 reg = <0xfe540000 0x110>;
139 interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
140 clocks = <&clk_sysin>;
142 clock-frequency = <400000>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
150 compatible = "st,comms-ssc4-i2c";
151 reg = <0xfe541000 0x110>;
152 interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&clk_sysin>;
155 clock-frequency = <400000>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
162 ethernet0: dwmac@fe810000 {
163 device_type = "network";
164 compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
166 reg = <0xfe810000 0x8000>;
167 reg-names = "stmmaceth";
169 interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
170 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
175 st,syscon = <&syscfg_rear 0x8bc>;
176 resets = <&softreset STIH416_ETH0_SOFTRESET>;
177 reset-names = "stmmaceth";
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_mii0>;
180 clock-names = "stmmaceth", "sti-ethclk";
181 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
184 ethernet1: dwmac@fef08000 {
185 device_type = "network";
186 compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
188 reg = <0xfef08000 0x8000>;
189 reg-names = "stmmaceth";
190 interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
191 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
196 st,syscon = <&syscfg_sbc 0x7f0>;
198 resets = <&softreset STIH416_ETH1_SOFTRESET>;
199 reset-names = "stmmaceth";
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_mii1>;
202 clock-names = "stmmaceth", "sti-ethclk";
203 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
207 compatible = "st,comms-irb";
208 reg = <0xfe518000 0x234>;
209 interrupts = <0 203 0>;
210 rx-mode = "infrared";
211 clocks = <&clk_sysin>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_ir>;
214 resets = <&softreset STIH416_IRB_SOFTRESET>;
218 spifsm: spifsm@fe902000 {
219 compatible = "st,spi-fsm";
220 reg = <0xfe902000 0x1000>;
221 pinctrl-0 = <&pinctrl_fsm>;
223 st,syscfg = <&syscfg_rear>;
224 st,boot-device-reg = <0x958>;
225 st,boot-device-spi = <0x1a>;
230 keyscan: keyscan@fe4b0000 {
231 compatible = "st,sti-keyscan";
233 reg = <0xfe4b0000 0x2000>;
234 interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
235 clocks = <&clk_sysin>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_keyscan>;
238 resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
239 <&softreset STIH416_KEYSCAN_SOFTRESET>;
243 compatible = "st,stih416-sas-thermal";
244 clock-names = "thermal";
245 clocks = <&clockgen_c_vcc 14>;
251 compatible = "st,stih416-mpe-thermal";
252 reg = <0xfdfe8000 0x10>;
253 clocks = <&clockgen_e 3>;
254 clock-names = "thermal";
255 interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
260 mmc0: sdhci@fe81e000 {
261 compatible = "st,sdhci";
263 reg = <0xfe81e000 0x1000>;
264 interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
265 interrupt-names = "mmcirq";
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_mmc0>;
269 clocks = <&clk_s_a1_ls 1>;
272 mmc1: sdhci@fe81f000 {
273 compatible = "st,sdhci";
275 reg = <0xfe81f000 0x1000>;
276 interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>;
277 interrupt-names = "mmcirq";
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_mmc1>;
281 clocks = <&clk_s_a1_ls 8>;
284 miphy365x_phy: phy@fe382000 {
285 compatible = "st,miphy365x-phy";
286 st,syscfg = <&syscfg_rear 0x824 0x828>;
287 #address-cells = <1>;
291 phy_port0: port@fe382000 {
293 reg = <0xfe382000 0x100>, <0xfe394000 0x100>;
294 reg-names = "sata", "pcie";
297 phy_port1: port@fe38a000 {
299 reg = <0xfe38a000 0x100>, <0xfe804000 0x100>;
300 reg-names = "sata", "pcie";
304 sata0: sata@fe380000 {
305 compatible = "st,sti-ahci";
306 reg = <0xfe380000 0x1000>;
307 interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
308 interrupt-names = "hostc";
309 phys = <&phy_port0 PHY_TYPE_SATA>;
310 phy-names = "sata-phy";
311 resets = <&powerdown STIH416_SATA0_POWERDOWN>,
312 <&softreset STIH416_SATA0_SOFTRESET>;
313 reset-names = "pwr-dwn", "sw-rst";
314 clock-names = "ahci_clk";
315 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
321 compatible = "st,stih416-usb-phy";
323 st,syscfg = <&syscfg_rear>;
324 clocks = <&clk_sysin>;
325 clock-names = "osc_phy";
328 ehci0: usb@fe1ffe00 {
329 compatible = "st,st-ehci-300x";
330 reg = <0xfe1ffe00 0x100>;
331 interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
332 pinctrl-names = "default";
333 pinctrl-0 = <&pinctrl_usb0>;
334 clocks = <&clk_s_a1_ls 0>,
336 clock-names = "ic", "clk48";
339 resets = <&powerdown STIH416_USB0_POWERDOWN>,
340 <&softreset STIH416_USB0_SOFTRESET>;
341 reset-names = "power", "softreset";
344 ohci0: usb@fe1ffc00 {
345 compatible = "st,st-ohci-300x";
346 reg = <0xfe1ffc00 0x100>;
347 interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
348 clocks = <&clk_s_a1_ls 0>,
350 clock-names = "ic", "clk48";
354 resets = <&powerdown STIH416_USB0_POWERDOWN>,
355 <&softreset STIH416_USB0_SOFTRESET>;
356 reset-names = "power", "softreset";
359 ehci1: usb@fe203e00 {
360 compatible = "st,st-ehci-300x";
361 reg = <0xfe203e00 0x100>;
362 interrupts = <GIC_SPI 150 IRQ_TYPE_NONE>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_usb1>;
365 clocks = <&clk_s_a1_ls 0>,
367 clock-names = "ic", "clk48";
370 resets = <&powerdown STIH416_USB1_POWERDOWN>,
371 <&softreset STIH416_USB1_SOFTRESET>;
372 reset-names = "power", "softreset";
375 ohci1: usb@fe203c00 {
376 compatible = "st,st-ohci-300x";
377 reg = <0xfe203c00 0x100>;
378 interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
379 clocks = <&clk_s_a1_ls 0>,
381 clock-names = "ic", "clk48";
384 resets = <&powerdown STIH416_USB1_POWERDOWN>,
385 <&softreset STIH416_USB1_SOFTRESET>;
386 reset-names = "power", "softreset";
389 ehci2: usb@fe303e00 {
390 compatible = "st,st-ehci-300x";
391 reg = <0xfe303e00 0x100>;
392 interrupts = <GIC_SPI 152 IRQ_TYPE_NONE>;
393 pinctrl-names = "default";
394 pinctrl-0 = <&pinctrl_usb2>;
395 clocks = <&clk_s_a1_ls 0>,
397 clock-names = "ic", "clk48";
400 resets = <&powerdown STIH416_USB2_POWERDOWN>,
401 <&softreset STIH416_USB2_SOFTRESET>;
402 reset-names = "power", "softreset";
405 ohci2: usb@fe303c00 {
406 compatible = "st,st-ohci-300x";
407 reg = <0xfe303c00 0x100>;
408 interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
409 clocks = <&clk_s_a1_ls 0>,
411 clock-names = "ic", "clk48";
414 resets = <&powerdown STIH416_USB2_POWERDOWN>,
415 <&softreset STIH416_USB2_SOFTRESET>;
416 reset-names = "power", "softreset";
419 ehci3: usb@fe343e00 {
420 compatible = "st,st-ehci-300x";
421 reg = <0xfe343e00 0x100>;
422 interrupts = <GIC_SPI 154 IRQ_TYPE_NONE>;
423 pinctrl-names = "default";
424 pinctrl-0 = <&pinctrl_usb3>;
425 clocks = <&clk_s_a1_ls 0>,
427 clock-names = "ic", "clk48";
430 resets = <&powerdown STIH416_USB3_POWERDOWN>,
431 <&softreset STIH416_USB3_SOFTRESET>;
432 reset-names = "power", "softreset";
435 ohci3: usb@fe343c00 {
436 compatible = "st,st-ohci-300x";
437 reg = <0xfe343c00 0x100>;
438 interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>;
439 clocks = <&clk_s_a1_ls 0>,
441 clock-names = "ic", "clk48";
444 resets = <&powerdown STIH416_USB3_POWERDOWN>,
445 <&softreset STIH416_USB3_SOFTRESET>;
446 reset-names = "power", "softreset";