1 /include/ "tegra20.dtsi"
4 model = "Avionic Design Tamonten SOM";
5 compatible = "ad,tamonten", "nvidia,tegra20";
8 reg = <0x00000000 0x20000000>;
13 vdd-supply = <&hdmi_vdd_reg>;
14 pll-supply = <&hdmi_pll_reg>;
16 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
17 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 pinctrl-names = "default";
23 pinctrl-0 = <&state_default>;
25 state_default: pinmux {
28 nvidia,function = "ide";
31 nvidia,pins = "atb", "gma", "gme";
32 nvidia,function = "sdio4";
36 nvidia,function = "nand";
39 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
40 "spia", "spib", "spic";
41 nvidia,function = "gmi";
44 nvidia,pins = "cdev1";
45 nvidia,function = "plla_out";
48 nvidia,pins = "cdev2";
49 nvidia,function = "pllp_out4";
53 nvidia,function = "crt";
57 nvidia,function = "vi_sensor_clk";
61 nvidia,function = "dap1";
65 nvidia,function = "dap2";
69 nvidia,function = "dap3";
73 nvidia,function = "dap4";
76 nvidia,pins = "dta", "dtd";
77 nvidia,function = "sdio2";
80 nvidia,pins = "dtb", "dtc", "dte";
81 nvidia,function = "rsvd1";
85 nvidia,function = "i2c3";
89 nvidia,function = "uartd";
93 nvidia,function = "rtck";
96 nvidia,pins = "gpv", "slxa", "slxk";
97 nvidia,function = "pcie";
100 nvidia,pins = "hdint";
101 nvidia,function = "hdmi";
104 nvidia,pins = "i2cp";
105 nvidia,function = "i2cp";
108 nvidia,pins = "irrx", "irtx";
109 nvidia,function = "uarta";
112 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
114 nvidia,function = "kbc";
117 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
118 "ld3", "ld4", "ld5", "ld6", "ld7",
119 "ld8", "ld9", "ld10", "ld11", "ld12",
120 "ld13", "ld14", "ld15", "ld16", "ld17",
121 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
122 "lhs", "lm0", "lm1", "lpp", "lpw0",
123 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
124 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
126 nvidia,function = "displaya";
129 nvidia,pins = "owc", "spdi", "spdo", "uac";
130 nvidia,function = "rsvd2";
134 nvidia,function = "pwr_on";
138 nvidia,function = "i2c1";
141 nvidia,pins = "sdb", "sdc", "sdd";
142 nvidia,function = "pwm";
145 nvidia,pins = "sdio1";
146 nvidia,function = "sdio1";
149 nvidia,pins = "slxc", "slxd";
150 nvidia,function = "spdif";
153 nvidia,pins = "spid", "spie", "spif";
154 nvidia,function = "spi1";
157 nvidia,pins = "spig", "spih";
158 nvidia,function = "spi2_alt";
161 nvidia,pins = "uaa", "uab", "uda";
162 nvidia,function = "ulpi";
166 nvidia,function = "irda";
169 nvidia,pins = "uca", "ucb";
170 nvidia,function = "uartc";
173 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
174 "cdev1", "cdev2", "dap1", "dtb", "gma",
175 "gmb", "gmc", "gmd", "gme", "gpu7",
176 "gpv", "i2cp", "pta", "rm", "slxa",
177 "slxk", "spia", "spib", "uac";
179 nvidia,tristate = <0>;
182 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
183 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
187 nvidia,pins = "csus", "spid", "spif";
189 nvidia,tristate = <1>;
192 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
193 "dtc", "dte", "dtf", "gpu", "sdio1",
194 "slxc", "slxd", "spdi", "spdo", "spig",
197 nvidia,tristate = <1>;
200 nvidia,pins = "ddc", "dta", "dtd", "kbca",
201 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
204 nvidia,tristate = <0>;
207 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
208 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
209 "lvp0", "owc", "sdb";
210 nvidia,tristate = <1>;
213 nvidia,pins = "irrx", "irtx", "sdd", "spic",
214 "spie", "spih", "uaa", "uab", "uad",
217 nvidia,tristate = <1>;
220 nvidia,pins = "lc", "ls";
224 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
225 "ld5", "ld6", "ld7", "ld8", "ld9",
226 "ld10", "ld11", "ld12", "ld13", "ld14",
227 "ld15", "ld16", "ld17", "ldi", "lhp0",
228 "lhp1", "lhp2", "lhs", "lm0", "lpp",
229 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
231 nvidia,tristate = <0>;
234 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
240 state_i2cmux_ddc: pinmux_i2cmux_ddc {
243 nvidia,function = "i2c2";
247 nvidia,function = "rsvd4";
251 state_i2cmux_pta: pinmux_i2cmux_pta {
254 nvidia,function = "rsvd4";
258 nvidia,function = "i2c2";
262 state_i2cmux_idle: pinmux_i2cmux_idle {
265 nvidia,function = "rsvd4";
269 nvidia,function = "rsvd4";
279 clock-frequency = <216000000>;
284 clock-frequency = <400000>;
289 clock-frequency = <100000>;
294 compatible = "i2c-mux-pinctrl";
295 #address-cells = <1>;
298 i2c-parent = <&{/i2c@7000c400}>;
300 pinctrl-names = "ddc", "pta", "idle";
301 pinctrl-0 = <&state_i2cmux_ddc>;
302 pinctrl-1 = <&state_i2cmux_pta>;
303 pinctrl-2 = <&state_i2cmux_idle>;
307 #address-cells = <1>;
313 #address-cells = <1>;
319 clock-frequency = <400000>;
323 compatible = "ti,tps6586x";
325 interrupts = <0 86 0x4>;
327 ti,system-power-controller;
332 sys-supply = <&vdd_5v0_reg>;
333 vin-sm0-supply = <&sys_reg>;
334 vin-sm1-supply = <&sys_reg>;
335 vin-sm2-supply = <&sys_reg>;
336 vinldo01-supply = <&sm2_reg>;
337 vinldo23-supply = <&sm2_reg>;
338 vinldo4-supply = <&sm2_reg>;
339 vinldo678-supply = <&sm2_reg>;
340 vinldo9-supply = <&sm2_reg>;
344 regulator-name = "vdd_sys";
349 regulator-name = "vdd_sys_sm0,vdd_core";
350 regulator-min-microvolt = <1200000>;
351 regulator-max-microvolt = <1200000>;
356 regulator-name = "vdd_sys_sm1,vdd_cpu";
357 regulator-min-microvolt = <1000000>;
358 regulator-max-microvolt = <1000000>;
363 regulator-name = "vdd_sys_sm2,vin_ldo*";
364 regulator-min-microvolt = <3700000>;
365 regulator-max-microvolt = <3700000>;
370 regulator-name = "vdd_ldo0,vddio_pex_clk";
371 regulator-min-microvolt = <3300000>;
372 regulator-max-microvolt = <3300000>;
376 regulator-name = "vdd_ldo1,avdd_pll*";
377 regulator-min-microvolt = <1100000>;
378 regulator-max-microvolt = <1100000>;
383 regulator-name = "vdd_ldo2,vdd_rtc";
384 regulator-min-microvolt = <1200000>;
385 regulator-max-microvolt = <1200000>;
389 regulator-name = "vdd_ldo3,avdd_usb*";
390 regulator-min-microvolt = <3300000>;
391 regulator-max-microvolt = <3300000>;
396 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
397 regulator-min-microvolt = <1800000>;
398 regulator-max-microvolt = <1800000>;
403 regulator-name = "vdd_ldo5,vcore_mmc";
404 regulator-min-microvolt = <2850000>;
405 regulator-max-microvolt = <2850000>;
409 regulator-name = "vdd_ldo6,avdd_vdac";
411 * According to the Tegra 2 Automotive
412 * DataSheet, a typical value for this
413 * would be 2.8V, but the PMIC only
416 regulator-min-microvolt = <2850000>;
417 regulator-max-microvolt = <2850000>;
421 regulator-name = "vdd_ldo7,avdd_hdmi";
422 regulator-min-microvolt = <3300000>;
423 regulator-max-microvolt = <3300000>;
427 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
428 regulator-min-microvolt = <1800000>;
429 regulator-max-microvolt = <1800000>;
433 regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
435 * According to the Tegra 2 Automotive
436 * DataSheet, a typical value for this
437 * would be 2.8V, but the PMIC only
440 regulator-min-microvolt = <2850000>;
441 regulator-max-microvolt = <2850000>;
446 regulator-name = "vdd_rtc_out";
447 regulator-min-microvolt = <3300000>;
448 regulator-max-microvolt = <3300000>;
454 temperature-sensor@4c {
455 compatible = "onnn,nct1008";
461 nvidia,invert-interrupt;
469 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
470 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
476 compatible = "simple-bus";
478 #address-cells = <1>;
481 vdd_5v0_reg: regulator@0 {
482 compatible = "regulator-fixed";
484 regulator-name = "vdd_5v0";
485 regulator-min-microvolt = <5000000>;
486 regulator-max-microvolt = <5000000>;