1 #include "tegra20.dtsi"
4 model = "Avionic Design Tamonten SOM";
5 compatible = "ad,tamonten", "nvidia,tegra20";
8 rtc0 = "/i2c@7000d000/tps6586x@34";
9 rtc1 = "/rtc@7000e000";
13 reg = <0x00000000 0x20000000>;
18 vdd-supply = <&hdmi_vdd_reg>;
19 pll-supply = <&hdmi_pll_reg>;
21 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
22 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
28 pinctrl-names = "default";
29 pinctrl-0 = <&state_default>;
31 state_default: pinmux {
34 nvidia,function = "ide";
37 nvidia,pins = "atb", "gma", "gme";
38 nvidia,function = "sdio4";
42 nvidia,function = "nand";
45 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
46 "spia", "spib", "spic";
47 nvidia,function = "gmi";
50 nvidia,pins = "cdev1";
51 nvidia,function = "plla_out";
54 nvidia,pins = "cdev2";
55 nvidia,function = "pllp_out4";
59 nvidia,function = "crt";
63 nvidia,function = "vi_sensor_clk";
67 nvidia,function = "dap1";
71 nvidia,function = "dap2";
75 nvidia,function = "dap3";
79 nvidia,function = "dap4";
82 nvidia,pins = "dta", "dtd";
83 nvidia,function = "sdio2";
86 nvidia,pins = "dtb", "dtc", "dte";
87 nvidia,function = "rsvd1";
91 nvidia,function = "i2c3";
95 nvidia,function = "uartd";
99 nvidia,function = "rtck";
102 nvidia,pins = "gpv", "slxa", "slxk";
103 nvidia,function = "pcie";
106 nvidia,pins = "hdint";
107 nvidia,function = "hdmi";
110 nvidia,pins = "i2cp";
111 nvidia,function = "i2cp";
114 nvidia,pins = "irrx", "irtx";
115 nvidia,function = "uarta";
118 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
120 nvidia,function = "kbc";
123 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
124 "ld3", "ld4", "ld5", "ld6", "ld7",
125 "ld8", "ld9", "ld10", "ld11", "ld12",
126 "ld13", "ld14", "ld15", "ld16", "ld17",
127 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
128 "lhs", "lm0", "lm1", "lpp", "lpw0",
129 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
130 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
132 nvidia,function = "displaya";
135 nvidia,pins = "owc", "spdi", "spdo", "uac";
136 nvidia,function = "rsvd2";
140 nvidia,function = "pwr_on";
144 nvidia,function = "i2c1";
147 nvidia,pins = "sdb", "sdc", "sdd";
148 nvidia,function = "pwm";
151 nvidia,pins = "sdio1";
152 nvidia,function = "sdio1";
155 nvidia,pins = "slxc", "slxd";
156 nvidia,function = "spdif";
159 nvidia,pins = "spid", "spie", "spif";
160 nvidia,function = "spi1";
163 nvidia,pins = "spig", "spih";
164 nvidia,function = "spi2_alt";
167 nvidia,pins = "uaa", "uab", "uda";
168 nvidia,function = "ulpi";
172 nvidia,function = "irda";
175 nvidia,pins = "uca", "ucb";
176 nvidia,function = "uartc";
179 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
180 "cdev1", "cdev2", "dap1", "dtb", "gma",
181 "gmb", "gmc", "gmd", "gme", "gpu7",
182 "gpv", "i2cp", "pta", "rm", "slxa",
183 "slxk", "spia", "spib", "uac";
184 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
185 nvidia,tristate = <TEGRA_PIN_DISABLE>;
188 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
189 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
190 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193 nvidia,pins = "csus", "spid", "spif";
194 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
195 nvidia,tristate = <TEGRA_PIN_ENABLE>;
198 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
199 "dtc", "dte", "dtf", "gpu", "sdio1",
200 "slxc", "slxd", "spdi", "spdo", "spig",
202 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
203 nvidia,tristate = <TEGRA_PIN_ENABLE>;
206 nvidia,pins = "ddc", "dta", "dtd", "kbca",
207 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
209 nvidia,pull = <TEGRA_PIN_PULL_UP>;
210 nvidia,tristate = <TEGRA_PIN_DISABLE>;
213 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
214 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
215 "lvp0", "owc", "sdb";
216 nvidia,tristate = <TEGRA_PIN_ENABLE>;
219 nvidia,pins = "irrx", "irtx", "sdd", "spic",
220 "spie", "spih", "uaa", "uab", "uad",
222 nvidia,pull = <TEGRA_PIN_PULL_UP>;
223 nvidia,tristate = <TEGRA_PIN_ENABLE>;
226 nvidia,pins = "lc", "ls";
227 nvidia,pull = <TEGRA_PIN_PULL_UP>;
230 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
231 "ld5", "ld6", "ld7", "ld8", "ld9",
232 "ld10", "ld11", "ld12", "ld13", "ld14",
233 "ld15", "ld16", "ld17", "ldi", "lhp0",
234 "lhp1", "lhp2", "lhs", "lm0", "lpp",
235 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
237 nvidia,tristate = <TEGRA_PIN_DISABLE>;
240 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
242 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
246 state_i2cmux_ddc: pinmux_i2cmux_ddc {
249 nvidia,function = "i2c2";
253 nvidia,function = "rsvd4";
257 state_i2cmux_pta: pinmux_i2cmux_pta {
260 nvidia,function = "rsvd4";
264 nvidia,function = "i2c2";
268 state_i2cmux_idle: pinmux_i2cmux_idle {
271 nvidia,function = "rsvd4";
275 nvidia,function = "rsvd4";
289 clock-frequency = <400000>;
294 clock-frequency = <100000>;
299 compatible = "i2c-mux-pinctrl";
300 #address-cells = <1>;
303 i2c-parent = <&{/i2c@7000c400}>;
305 pinctrl-names = "ddc", "pta", "idle";
306 pinctrl-0 = <&state_i2cmux_ddc>;
307 pinctrl-1 = <&state_i2cmux_pta>;
308 pinctrl-2 = <&state_i2cmux_idle>;
312 #address-cells = <1>;
318 #address-cells = <1>;
324 clock-frequency = <400000>;
328 compatible = "ti,tps6586x";
330 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
332 ti,system-power-controller;
337 /* vdd_5v0_reg must be provided by the base board */
338 sys-supply = <&vdd_5v0_reg>;
339 vin-sm0-supply = <&sys_reg>;
340 vin-sm1-supply = <&sys_reg>;
341 vin-sm2-supply = <&sys_reg>;
342 vinldo01-supply = <&sm2_reg>;
343 vinldo23-supply = <&sm2_reg>;
344 vinldo4-supply = <&sm2_reg>;
345 vinldo678-supply = <&sm2_reg>;
346 vinldo9-supply = <&sm2_reg>;
350 regulator-name = "vdd_sys";
355 regulator-name = "vdd_sys_sm0,vdd_core";
356 regulator-min-microvolt = <1200000>;
357 regulator-max-microvolt = <1200000>;
362 regulator-name = "vdd_sys_sm1,vdd_cpu";
363 regulator-min-microvolt = <1000000>;
364 regulator-max-microvolt = <1000000>;
369 regulator-name = "vdd_sys_sm2,vin_ldo*";
370 regulator-min-microvolt = <3700000>;
371 regulator-max-microvolt = <3700000>;
376 regulator-name = "vdd_ldo0,vddio_pex_clk";
377 regulator-min-microvolt = <3300000>;
378 regulator-max-microvolt = <3300000>;
382 regulator-name = "vdd_ldo1,avdd_pll*";
383 regulator-min-microvolt = <1100000>;
384 regulator-max-microvolt = <1100000>;
389 regulator-name = "vdd_ldo2,vdd_rtc";
390 regulator-min-microvolt = <1200000>;
391 regulator-max-microvolt = <1200000>;
395 regulator-name = "vdd_ldo3,avdd_usb*";
396 regulator-min-microvolt = <3300000>;
397 regulator-max-microvolt = <3300000>;
402 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
403 regulator-min-microvolt = <1800000>;
404 regulator-max-microvolt = <1800000>;
409 regulator-name = "vdd_ldo5,vcore_mmc";
410 regulator-min-microvolt = <2850000>;
411 regulator-max-microvolt = <2850000>;
415 regulator-name = "vdd_ldo6,avdd_vdac";
417 * According to the Tegra 2 Automotive
418 * DataSheet, a typical value for this
419 * would be 2.8V, but the PMIC only
422 regulator-min-microvolt = <2850000>;
423 regulator-max-microvolt = <2850000>;
427 regulator-name = "vdd_ldo7,avdd_hdmi";
428 regulator-min-microvolt = <3300000>;
429 regulator-max-microvolt = <3300000>;
433 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
434 regulator-min-microvolt = <1800000>;
435 regulator-max-microvolt = <1800000>;
439 regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
441 * According to the Tegra 2 Automotive
442 * DataSheet, a typical value for this
443 * would be 2.8V, but the PMIC only
446 regulator-min-microvolt = <2850000>;
447 regulator-max-microvolt = <2850000>;
452 regulator-name = "vdd_rtc_out";
453 regulator-min-microvolt = <3300000>;
454 regulator-max-microvolt = <3300000>;
460 temperature-sensor@4c {
461 compatible = "onnn,nct1008";
467 nvidia,invert-interrupt;
468 nvidia,suspend-mode = <1>;
469 nvidia,cpu-pwr-good-time = <5000>;
470 nvidia,cpu-pwr-off-time = <5000>;
471 nvidia,core-pwr-good-time = <3845 3845>;
472 nvidia,core-pwr-off-time = <3875>;
473 nvidia,sys-clock-req-active-high;
476 pcie-controller@80003000 {
477 avdd-pex-supply = <&pci_vdd_reg>;
478 vdd-pex-supply = <&pci_vdd_reg>;
479 avdd-pex-pll-supply = <&pci_vdd_reg>;
480 avdd-plle-supply = <&pci_vdd_reg>;
481 vddio-pex-clk-supply = <&pci_clk_reg>;
493 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
494 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
500 compatible = "simple-bus";
501 #address-cells = <1>;
505 compatible = "fixed-clock";
508 clock-frequency = <32768>;
513 compatible = "simple-bus";
515 #address-cells = <1>;
518 pci_vdd_reg: regulator@1 {
519 compatible = "regulator-fixed";
521 regulator-name = "vdd_1v05";
522 regulator-min-microvolt = <1050000>;
523 regulator-max-microvolt = <1050000>;