arch/arm/boot/dts/tegra20-ventana.dts

   1 /dts-v1/;
   2
   3 /include/ "tegra20.dtsi"
   4
   5 / {
   6         model = "NVIDIA Tegra2 Ventana evaluation board";
   7         compatible = "nvidia,ventana", "nvidia,tegra20";
   8
   9         memory {
  10                 reg = <0x00000000 0x40000000>;
  11         };
  12
  13         pinmux {
  14                 pinctrl-names = "default";
  15                 pinctrl-0 = <&state_default>;
  16
  17                 state_default: pinmux {
  18                         ata {
  19                                 nvidia,pins = "ata";
  20                                 nvidia,function = "ide";
  21                         };
  22                         atb {
  23                                 nvidia,pins = "atb", "gma", "gme";
  24                                 nvidia,function = "sdio4";
  25                         };
  26                         atc {
  27                                 nvidia,pins = "atc";
  28                                 nvidia,function = "nand";
  29                         };
  30                         atd {
  31                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  32                                         "spib", "spic";
  33                                 nvidia,function = "gmi";
  34                         };
  35                         cdev1 {
  36                                 nvidia,pins = "cdev1";
  37                                 nvidia,function = "plla_out";
  38                         };
  39                         cdev2 {
  40                                 nvidia,pins = "cdev2";
  41                                 nvidia,function = "pllp_out4";
  42                         };
  43                         crtp {
  44                                 nvidia,pins = "crtp", "lm1";
  45                                 nvidia,function = "crt";
  46                         };
  47                         csus {
  48                                 nvidia,pins = "csus";
  49                                 nvidia,function = "vi_sensor_clk";
  50                         };
  51                         dap1 {
  52                                 nvidia,pins = "dap1";
  53                                 nvidia,function = "dap1";
  54                         };
  55                         dap2 {
  56                                 nvidia,pins = "dap2";
  57                                 nvidia,function = "dap2";
  58                         };
  59                         dap3 {
  60                                 nvidia,pins = "dap3";
  61                                 nvidia,function = "dap3";
  62                         };
  63                         dap4 {
  64                                 nvidia,pins = "dap4";
  65                                 nvidia,function = "dap4";
  66                         };
  67                         ddc {
  68                                 nvidia,pins = "ddc", "owc", "spdi", "spdo",
  69                                         "uac";
  70                                 nvidia,function = "rsvd2";
  71                         };
  72                         dta {
  73                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  74                                 nvidia,function = "vi";
  75                         };
  76                         dtf {
  77                                 nvidia,pins = "dtf";
  78                                 nvidia,function = "i2c3";
  79                         };
  80                         gmc {
  81                                 nvidia,pins = "gmc";
  82                                 nvidia,function = "uartd";
  83                         };
  84                         gmd {
  85                                 nvidia,pins = "gmd";
  86                                 nvidia,function = "sflash";
  87                         };
  88                         gpu {
  89                                 nvidia,pins = "gpu";
  90                                 nvidia,function = "pwm";
  91                         };
  92                         gpu7 {
  93                                 nvidia,pins = "gpu7";
  94                                 nvidia,function = "rtck";
  95                         };
  96                         gpv {
  97                                 nvidia,pins = "gpv", "slxa", "slxk";
  98                                 nvidia,function = "pcie";
  99                         };
 100                         hdint {
 101                                 nvidia,pins = "hdint", "pta";
 102                                 nvidia,function = "hdmi";
 103                         };
 104                         i2cp {
 105                                 nvidia,pins = "i2cp";
 106                                 nvidia,function = "i2cp";
 107                         };
 108                         irrx {
 109                                 nvidia,pins = "irrx", "irtx";
 110                                 nvidia,function = "uartb";
 111                         };
 112                         kbca {
 113                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 114                                         "kbce", "kbcf";
 115                                 nvidia,function = "kbc";
 116                         };
 117                         lcsn {
 118                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 119                                         "lsdi", "lvp0";
 120                                 nvidia,function = "rsvd4";
 121                         };
 122                         ld0 {
 123                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 124                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 125                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 126                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 127                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
 128                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
 129                                         "lspi", "lvp1", "lvs";
 130                                 nvidia,function = "displaya";
 131                         };
 132                         pmc {
 133                                 nvidia,pins = "pmc";
 134                                 nvidia,function = "pwr_on";
 135                         };
 136                         rm {
 137                                 nvidia,pins = "rm";
 138                                 nvidia,function = "i2c1";
 139                         };
 140                         sdb {
 141                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
 142                                 nvidia,function = "sdio3";
 143                         };
 144                         sdio1 {
 145                                 nvidia,pins = "sdio1";
 146                                 nvidia,function = "sdio1";
 147                         };
 148                         slxd {
 149                                 nvidia,pins = "slxd";
 150                                 nvidia,function = "spdif";
 151                         };
 152                         spid {
 153                                 nvidia,pins = "spid", "spie", "spif";
 154                                 nvidia,function = "spi1";
 155                         };
 156                         spig {
 157                                 nvidia,pins = "spig", "spih";
 158                                 nvidia,function = "spi2_alt";
 159                         };
 160                         uaa {
 161                                 nvidia,pins = "uaa", "uab", "uda";
 162                                 nvidia,function = "ulpi";
 163                         };
 164                         uad {
 165                                 nvidia,pins = "uad";
 166                                 nvidia,function = "irda";
 167                         };
 168                         uca {
 169                                 nvidia,pins = "uca", "ucb";
 170                                 nvidia,function = "uartc";
 171                         };
 172                         conf_ata {
 173                                 nvidia,pins = "ata", "atb", "atc", "atd",
 174                                         "cdev1", "cdev2", "dap1", "dap2",
 175                                         "dap4", "ddc", "dtf", "gma", "gmc",
 176                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 177                                         "irtx", "pta", "rm", "sdc", "sdd",
 178                                         "slxc", "slxd", "slxk", "spdi", "spdo",
 179                                         "uac", "uad", "uca", "ucb", "uda";
 180                                 nvidia,pull = <0>;
 181                                 nvidia,tristate = <0>;
 182                         };
 183                         conf_ate {
 184                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
 185                                         "gpv", "owc", "spia", "spib", "spic",
 186                                         "spid", "spie", "spig";
 187                                 nvidia,pull = <0>;
 188                                 nvidia,tristate = <1>;
 189                         };
 190                         conf_ck32 {
 191                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 192                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 193                                 nvidia,pull = <0>;
 194                         };
 195                         conf_crtp {
 196                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
 197                                 nvidia,pull = <2>;
 198                                 nvidia,tristate = <1>;
 199                         };
 200                         conf_dta {
 201                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 202                                 nvidia,pull = <1>;
 203                                 nvidia,tristate = <0>;
 204                         };
 205                         conf_dte {
 206                                 nvidia,pins = "dte", "spif";
 207                                 nvidia,pull = <1>;
 208                                 nvidia,tristate = <1>;
 209                         };
 210                         conf_hdint {
 211                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 212                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
 213                                 nvidia,tristate = <1>;
 214                         };
 215                         conf_kbca {
 216                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 217                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
 218                                 nvidia,pull = <2>;
 219                                 nvidia,tristate = <0>;
 220                         };
 221                         conf_lc {
 222                                 nvidia,pins = "lc", "ls";
 223                                 nvidia,pull = <2>;
 224                         };
 225                         conf_ld0 {
 226                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 227                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 228                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 229                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 230                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 231                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 232                                         "lvp1", "lvs", "pmc", "sdb";
 233                                 nvidia,tristate = <0>;
 234                         };
 235                         conf_ld17_0 {
 236                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 237                                         "ld23_22";
 238                                 nvidia,pull = <1>;
 239                         };
 240                 };
 241         };
 242
 243         i2s@70002800 {
 244                 status = "okay";
 245         };
 246
 247         serial@70006300 {
 248                 status = "okay";
 249                 clock-frequency = <216000000>;
 250         };
 251
 252         i2c@7000c000 {
 253                 status = "okay";
 254                 clock-frequency = <400000>;
 255
 256                 wm8903: wm8903@1a {
 257                         compatible = "wlf,wm8903";
 258                         reg = <0x1a>;
 259                         interrupt-parent = <&gpio>;
 260                         interrupts = <187 0x04>;
 261
 262                         gpio-controller;
 263                         #gpio-cells = <2>;
 264
 265                         micdet-cfg = <0>;
 266                         micdet-delay = <100>;
 267                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 268                 };
 269
 270                 /* ALS and proximity sensor */
 271                 isl29018@44 {
 272                         compatible = "isil,isl29018";
 273                         reg = <0x44>;
 274                         interrupt-parent = <&gpio>;
 275                         interrupts = <202 0x04>; /*gpio PZ2 */
 276                 };
 277         };
 278
 279         i2c@7000c400 {
 280                 status = "okay";
 281                 clock-frequency = <400000>;
 282         };
 283
 284         i2c@7000c500 {
 285                 status = "okay";
 286                 clock-frequency = <400000>;
 287         };
 288
 289         i2c@7000d000 {
 290                 status = "okay";
 291                 clock-frequency = <400000>;
 292
 293                 pmic: tps6586x@34 {
 294                         compatible = "ti,tps6586x";
 295                         reg = <0x34>;
 296                         interrupts = <0 86 0x4>;
 297
 298                         ti,system-power-controller;
 299
 300                         #gpio-cells = <2>;
 301                         gpio-controller;
 302
 303                         sys-supply = <&vdd_5v0_reg>;
 304                         vin-sm0-supply = <&sys_reg>;
 305                         vin-sm1-supply = <&sys_reg>;
 306                         vin-sm2-supply = <&sys_reg>;
 307                         vinldo01-supply = <&sm2_reg>;
 308                         vinldo23-supply = <&sm2_reg>;
 309                         vinldo4-supply = <&sm2_reg>;
 310                         vinldo678-supply = <&sm2_reg>;
 311                         vinldo9-supply = <&sm2_reg>;
 312
 313                         regulators {
 314                                 #address-cells = <1>;
 315                                 #size-cells = <0>;
 316
 317                                 sys_reg: regulator@0 {
 318                                         reg = <0>;
 319                                         regulator-compatible = "sys";
 320                                         regulator-name = "vdd_sys";
 321                                         regulator-always-on;
 322                                 };
 323
 324                                 regulator@1 {
 325                                         reg = <1>;
 326                                         regulator-compatible = "sm0";
 327                                         regulator-name = "vdd_sm0,vdd_core";
 328                                         regulator-min-microvolt = <1200000>;
 329                                         regulator-max-microvolt = <1200000>;
 330                                         regulator-always-on;
 331                                 };
 332
 333                                 regulator@2 {
 334                                         reg = <2>;
 335                                         regulator-compatible = "sm1";
 336                                         regulator-name = "vdd_sm1,vdd_cpu";
 337                                         regulator-min-microvolt = <1000000>;
 338                                         regulator-max-microvolt = <1000000>;
 339                                         regulator-always-on;
 340                                 };
 341
 342                                 sm2_reg: regulator@3 {
 343                                         reg = <3>;
 344                                         regulator-compatible = "sm2";
 345                                         regulator-name = "vdd_sm2,vin_ldo*";
 346                                         regulator-min-microvolt = <3700000>;
 347                                         regulator-max-microvolt = <3700000>;
 348                                         regulator-always-on;
 349                                 };
 350
 351                                 /* LDO0 is not connected to anything */
 352
 353                                 regulator@5 {
 354                                         reg = <5>;
 355                                         regulator-compatible = "ldo1";
 356                                         regulator-name = "vdd_ldo1,avdd_pll*";
 357                                         regulator-min-microvolt = <1100000>;
 358                                         regulator-max-microvolt = <1100000>;
 359                                         regulator-always-on;
 360                                 };
 361
 362                                 regulator@6 {
 363                                         reg = <6>;
 364                                         regulator-compatible = "ldo2";
 365                                         regulator-name = "vdd_ldo2,vdd_rtc";
 366                                         regulator-min-microvolt = <1200000>;
 367                                         regulator-max-microvolt = <1200000>;
 368                                 };
 369
 370                                 regulator@7 {
 371                                         reg = <7>;
 372                                         regulator-compatible = "ldo3";
 373                                         regulator-name = "vdd_ldo3,avdd_usb*";
 374                                         regulator-min-microvolt = <3300000>;
 375                                         regulator-max-microvolt = <3300000>;
 376                                         regulator-always-on;
 377                                 };
 378
 379                                 regulator@8 {
 380                                         reg = <8>;
 381                                         regulator-compatible = "ldo4";
 382                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 383                                         regulator-min-microvolt = <1800000>;
 384                                         regulator-max-microvolt = <1800000>;
 385                                         regulator-always-on;
 386                                 };
 387
 388                                 regulator@9 {
 389                                         reg = <9>;
 390                                         regulator-compatible = "ldo5";
 391                                         regulator-name = "vdd_ldo5,vcore_mmc";
 392                                         regulator-min-microvolt = <2850000>;
 393                                         regulator-max-microvolt = <2850000>;
 394                                         regulator-always-on;
 395                                 };
 396
 397                                 regulator@10 {
 398                                         reg = <10>;
 399                                         regulator-compatible = "ldo6";
 400                                         regulator-name = "vdd_ldo6,avdd_vdac";
 401                                         regulator-min-microvolt = <1800000>;
 402                                         regulator-max-microvolt = <1800000>;
 403                                 };
 404
 405                                 regulator@11 {
 406                                         reg = <11>;
 407                                         regulator-compatible = "ldo7";
 408                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 409                                         regulator-min-microvolt = <3300000>;
 410                                         regulator-max-microvolt = <3300000>;
 411                                 };
 412
 413                                 regulator@12 {
 414                                         reg = <12>;
 415                                         regulator-compatible = "ldo8";
 416                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 417                                         regulator-min-microvolt = <1800000>;
 418                                         regulator-max-microvolt = <1800000>;
 419                                 };
 420
 421                                 regulator@13 {
 422                                         reg = <13>;
 423                                         regulator-compatible = "ldo9";
 424                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 425                                         regulator-min-microvolt = <2850000>;
 426                                         regulator-max-microvolt = <2850000>;
 427                                         regulator-always-on;
 428                                 };
 429
 430                                 regulator@14 {
 431                                         reg = <14>;
 432                                         regulator-compatible = "ldo_rtc";
 433                                         regulator-name = "vdd_rtc_out,vdd_cell";
 434                                         regulator-min-microvolt = <3300000>;
 435                                         regulator-max-microvolt = <3300000>;
 436                                         regulator-always-on;
 437                                 };
 438                         };
 439                 };
 440         };
 441
 442         pmc {
 443                 nvidia,invert-interrupt;
 444         };
 445
 446         usb@c5000000 {
 447                 status = "okay";
 448         };
 449
 450         usb@c5004000 {
 451                 status = "okay";
 452                 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
 453         };
 454
 455         usb@c5008000 {
 456                 status = "okay";
 457         };
 458
 459         sdhci@c8000400 {
 460                 status = "okay";
 461                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
 462                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
 463                 power-gpios = <&gpio 70 0>; /* gpio PI6 */
 464                 bus-width = <4>;
 465         };
 466
 467         sdhci@c8000600 {
 468                 status = "okay";
 469                 bus-width = <8>;
 470         };
 471
 472         regulators {
 473                 compatible = "simple-bus";
 474                 #address-cells = <1>;
 475                 #size-cells = <0>;
 476
 477                 vdd_5v0_reg: regulator@0 {
 478                         compatible = "regulator-fixed";
 479                         reg = <0>;
 480                         regulator-name = "vdd_5v0";
 481                         regulator-min-microvolt = <5000000>;
 482                         regulator-max-microvolt = <5000000>;
 483                         regulator-always-on;
 484                 };
 485
 486                 regulator@1 {
 487                         compatible = "regulator-fixed";
 488                         reg = <1>;
 489                         regulator-name = "vdd_1v5";
 490                         regulator-min-microvolt = <1500000>;
 491                         regulator-max-microvolt = <1500000>;
 492                         gpio = <&pmic 0 0>;
 493                 };
 494
 495                 regulator@2 {
 496                         compatible = "regulator-fixed";
 497                         reg = <2>;
 498                         regulator-name = "vdd_1v2";
 499                         regulator-min-microvolt = <1200000>;
 500                         regulator-max-microvolt = <1200000>;
 501                         gpio = <&pmic 1 0>;
 502                         enable-active-high;
 503                 };
 504
 505                 regulator@3 {
 506                         compatible = "regulator-fixed";
 507                         reg = <3>;
 508                         regulator-name = "vdd_pnl";
 509                         regulator-min-microvolt = <2800000>;
 510                         regulator-max-microvolt = <2800000>;
 511                         gpio = <&gpio 22 0>; /* gpio PC6 */
 512                         enable-active-high;
 513                 };
 514
 515                 regulator@4 {
 516                         compatible = "regulator-fixed";
 517                         reg = <4>;
 518                         regulator-name = "vdd_bl";
 519                         regulator-min-microvolt = <2800000>;
 520                         regulator-max-microvolt = <2800000>;
 521                         gpio = <&gpio 176 0>; /* gpio PW0 */
 522                         enable-active-high;
 523                 };
 524         };
 525
 526         sound {
 527                 compatible = "nvidia,tegra-audio-wm8903-ventana",
 528                              "nvidia,tegra-audio-wm8903";
 529                 nvidia,model = "NVIDIA Tegra Ventana";
 530
 531                 nvidia,audio-routing =
 532                         "Headphone Jack", "HPOUTR",
 533                         "Headphone Jack", "HPOUTL",
 534                         "Int Spk", "ROP",
 535                         "Int Spk", "RON",
 536                         "Int Spk", "LOP",
 537                         "Int Spk", "LON",
 538                         "Mic Jack", "MICBIAS",
 539                         "IN1L", "Mic Jack";
 540
 541                 nvidia,i2s-controller = <&tegra_i2s1>;
 542                 nvidia,audio-codec = <&wm8903>;
 543
 544                 nvidia,spkr-en-gpios = <&wm8903 2 0>;
 545                 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
 546                 nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */
 547                 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
 548         };
 549 };