1 #include "tegra30.dtsi"
4 * This file contains common DT entry for all fab version of Cardhu.
5 * There is multiple fab version of Cardhu starting from A01 to A07.
6 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
7 * A02 will have different sets of GPIOs for fixed regulator compare to
8 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
9 * compatible with fab version A04. Based on Cardhu fab version, the
10 * related dts file need to be chosen like for Cardhu fab version A02,
11 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
12 * tegra30-cardhu-a04.dts.
13 * The identification of board is done in two ways, by looking the sticker
14 * on PCB and by reading board id eeprom.
15 * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
16 * number is the fab version like here it is 002 and hence fab version A02.
17 * The (downstream internal) U-Boot of Cardhu display the board-id as
19 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
20 * In this Fab version is 02 i.e. A02.
21 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
22 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
27 model = "NVIDIA Tegra30 Cardhu evaluation board";
28 compatible = "nvidia,cardhu", "nvidia,tegra30";
31 rtc0 = "/i2c@7000d000/tps65911@2d";
32 rtc1 = "/rtc@7000e000";
38 reg = <0x80000000 0x40000000>;
41 pcie-controller@00003000 {
44 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
45 avdd-pexb-supply = <&ldo1_reg>;
46 vdd-pexb-supply = <&ldo1_reg>;
47 avdd-pex-pll-supply = <&ldo1_reg>;
48 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
49 vddio-pex-ctl-supply = <&sys_3v3_reg>;
50 avdd-plle-supply = <&ldo2_reg>;
53 nvidia,num-lanes = <4>;
57 nvidia,num-lanes = <1>;
62 nvidia,num-lanes = <1>;
71 nvidia,panel = <&panel>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&state_default>;
80 state_default: pinmux {
82 nvidia,pins = "sdmmc1_clk_pz0";
83 nvidia,function = "sdmmc1";
84 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
85 nvidia,tristate = <TEGRA_PIN_DISABLE>;
88 nvidia,pins = "sdmmc1_cmd_pz1",
93 nvidia,function = "sdmmc1";
94 nvidia,pull = <TEGRA_PIN_PULL_UP>;
95 nvidia,tristate = <TEGRA_PIN_DISABLE>;
98 nvidia,pins = "sdmmc3_clk_pa6";
99 nvidia,function = "sdmmc3";
100 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
101 nvidia,tristate = <TEGRA_PIN_DISABLE>;
104 nvidia,pins = "sdmmc3_cmd_pa7",
109 nvidia,function = "sdmmc3";
110 nvidia,pull = <TEGRA_PIN_PULL_UP>;
111 nvidia,tristate = <TEGRA_PIN_DISABLE>;
114 nvidia,pins = "sdmmc4_clk_pcc4",
116 nvidia,function = "sdmmc4";
117 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
118 nvidia,tristate = <TEGRA_PIN_DISABLE>;
121 nvidia,pins = "sdmmc4_dat0_paa0",
129 nvidia,function = "sdmmc4";
130 nvidia,pull = <TEGRA_PIN_PULL_UP>;
131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
134 nvidia,pins = "dap2_fs_pa2",
138 nvidia,function = "i2s1";
139 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140 nvidia,tristate = <TEGRA_PIN_DISABLE>;
143 nvidia,pins = "drive_sdio3";
144 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
145 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
146 nvidia,pull-down-strength = <46>;
147 nvidia,pull-up-strength = <42>;
148 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
149 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
152 nvidia,pins = "uart3_txd_pw6",
156 nvidia,function = "uartc";
157 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
158 nvidia,tristate = <TEGRA_PIN_DISABLE>;
168 compatible = "nvidia,tegra30-hsuart";
176 panelddc: i2c@7000c000 {
178 clock-frequency = <100000>;
183 clock-frequency = <100000>;
188 clock-frequency = <100000>;
190 /* ALS and Proximity sensor */
192 compatible = "isil,isl29028";
194 interrupt-parent = <&gpio>;
195 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
199 compatible = "nxp,pca9546";
200 #address-cells = <1>;
208 clock-frequency = <100000>;
213 clock-frequency = <100000>;
216 compatible = "wlf,wm8903";
218 interrupt-parent = <&gpio>;
219 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
225 micdet-delay = <100>;
226 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
230 compatible = "ti,tps65911";
233 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
234 #interrupt-cells = <2>;
235 interrupt-controller;
237 ti,system-power-controller;
242 vcc1-supply = <&vdd_ac_bat_reg>;
243 vcc2-supply = <&vdd_ac_bat_reg>;
244 vcc3-supply = <&vio_reg>;
245 vcc4-supply = <&vdd_5v0_reg>;
246 vcc5-supply = <&vdd_ac_bat_reg>;
247 vcc6-supply = <&vdd2_reg>;
248 vcc7-supply = <&vdd_ac_bat_reg>;
249 vccio-supply = <&vdd_ac_bat_reg>;
253 regulator-name = "vddio_ddr_1v2";
254 regulator-min-microvolt = <1200000>;
255 regulator-max-microvolt = <1200000>;
260 regulator-name = "vdd_1v5_gen";
261 regulator-min-microvolt = <1500000>;
262 regulator-max-microvolt = <1500000>;
266 vddctrl_reg: vddctrl {
267 regulator-name = "vdd_cpu,vdd_sys";
268 regulator-min-microvolt = <1000000>;
269 regulator-max-microvolt = <1000000>;
274 regulator-name = "vdd_1v8_gen";
275 regulator-min-microvolt = <1800000>;
276 regulator-max-microvolt = <1800000>;
281 regulator-name = "vdd_pexa,vdd_pexb";
282 regulator-min-microvolt = <1050000>;
283 regulator-max-microvolt = <1050000>;
287 regulator-name = "vdd_sata,avdd_plle";
288 regulator-min-microvolt = <1050000>;
289 regulator-max-microvolt = <1050000>;
292 /* LDO3 is not connected to anything */
295 regulator-name = "vdd_rtc";
296 regulator-min-microvolt = <1200000>;
297 regulator-max-microvolt = <1200000>;
302 regulator-name = "vddio_sdmmc,avdd_vdac";
303 regulator-min-microvolt = <3300000>;
304 regulator-max-microvolt = <3300000>;
309 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
310 regulator-min-microvolt = <1200000>;
311 regulator-max-microvolt = <1200000>;
315 regulator-name = "vdd_pllm,x,u,a_p_c_s";
316 regulator-min-microvolt = <1200000>;
317 regulator-max-microvolt = <1200000>;
322 regulator-name = "vdd_ddr_hs";
323 regulator-min-microvolt = <1000000>;
324 regulator-max-microvolt = <1000000>;
330 temperature-sensor@4c {
331 compatible = "onnn,nct1008";
333 vcc-supply = <&sys_3v3_reg>;
334 interrupt-parent = <&gpio>;
335 interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
339 compatible = "ti,tps62361";
342 regulator-name = "tps62361-vout";
343 regulator-min-microvolt = <500000>;
344 regulator-max-microvolt = <1500000>;
354 spi-max-frequency = <25000000>;
356 compatible = "winbond,w25q32";
358 spi-max-frequency = <20000000>;
364 nvidia,invert-interrupt;
365 nvidia,suspend-mode = <1>;
366 nvidia,cpu-pwr-good-time = <2000>;
367 nvidia,cpu-pwr-off-time = <200>;
368 nvidia,core-pwr-good-time = <3845 3845>;
369 nvidia,core-pwr-off-time = <0>;
370 nvidia,core-power-req-active-high;
371 nvidia,sys-clock-req-active-high;
382 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
383 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
384 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
399 vbus-supply = <&usb3_vbus_reg>;
403 backlight: backlight {
404 compatible = "pwm-backlight";
406 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
407 power-supply = <&vdd_bl_reg>;
408 pwms = <&pwm 0 5000000>;
410 brightness-levels = <0 4 8 16 32 64 128 255>;
411 default-brightness-level = <6>;
415 compatible = "simple-bus";
416 #address-cells = <1>;
420 compatible = "fixed-clock";
423 clock-frequency = <32768>;
428 compatible = "chunghwa,claa101wb01", "simple-panel";
429 ddc-i2c-bus = <&panelddc>;
431 power-supply = <&vdd_pnl1_reg>;
432 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
434 backlight = <&backlight>;
438 compatible = "simple-bus";
439 #address-cells = <1>;
442 vdd_ac_bat_reg: regulator@0 {
443 compatible = "regulator-fixed";
445 regulator-name = "vdd_ac_bat";
446 regulator-min-microvolt = <5000000>;
447 regulator-max-microvolt = <5000000>;
451 cam_1v8_reg: regulator@1 {
452 compatible = "regulator-fixed";
454 regulator-name = "cam_1v8";
455 regulator-min-microvolt = <1800000>;
456 regulator-max-microvolt = <1800000>;
458 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
459 vin-supply = <&vio_reg>;
462 cp_5v_reg: regulator@2 {
463 compatible = "regulator-fixed";
465 regulator-name = "cp_5v";
466 regulator-min-microvolt = <5000000>;
467 regulator-max-microvolt = <5000000>;
471 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
474 emmc_3v3_reg: regulator@3 {
475 compatible = "regulator-fixed";
477 regulator-name = "emmc_3v3";
478 regulator-min-microvolt = <3300000>;
479 regulator-max-microvolt = <3300000>;
483 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
484 vin-supply = <&sys_3v3_reg>;
487 modem_3v3_reg: regulator@4 {
488 compatible = "regulator-fixed";
490 regulator-name = "modem_3v3";
491 regulator-min-microvolt = <3300000>;
492 regulator-max-microvolt = <3300000>;
494 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
497 pex_hvdd_3v3_reg: regulator@5 {
498 compatible = "regulator-fixed";
500 regulator-name = "pex_hvdd_3v3";
501 regulator-min-microvolt = <3300000>;
502 regulator-max-microvolt = <3300000>;
504 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
505 vin-supply = <&sys_3v3_reg>;
508 vdd_cam1_ldo_reg: regulator@6 {
509 compatible = "regulator-fixed";
511 regulator-name = "vdd_cam1_ldo";
512 regulator-min-microvolt = <2800000>;
513 regulator-max-microvolt = <2800000>;
515 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
516 vin-supply = <&sys_3v3_reg>;
519 vdd_cam2_ldo_reg: regulator@7 {
520 compatible = "regulator-fixed";
522 regulator-name = "vdd_cam2_ldo";
523 regulator-min-microvolt = <2800000>;
524 regulator-max-microvolt = <2800000>;
526 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
527 vin-supply = <&sys_3v3_reg>;
530 vdd_cam3_ldo_reg: regulator@8 {
531 compatible = "regulator-fixed";
533 regulator-name = "vdd_cam3_ldo";
534 regulator-min-microvolt = <3300000>;
535 regulator-max-microvolt = <3300000>;
537 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
538 vin-supply = <&sys_3v3_reg>;
541 vdd_com_reg: regulator@9 {
542 compatible = "regulator-fixed";
544 regulator-name = "vdd_com";
545 regulator-min-microvolt = <3300000>;
546 regulator-max-microvolt = <3300000>;
550 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
551 vin-supply = <&sys_3v3_reg>;
554 vdd_fuse_3v3_reg: regulator@10 {
555 compatible = "regulator-fixed";
557 regulator-name = "vdd_fuse_3v3";
558 regulator-min-microvolt = <3300000>;
559 regulator-max-microvolt = <3300000>;
561 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
562 vin-supply = <&sys_3v3_reg>;
565 vdd_pnl1_reg: regulator@11 {
566 compatible = "regulator-fixed";
568 regulator-name = "vdd_pnl1";
569 regulator-min-microvolt = <3300000>;
570 regulator-max-microvolt = <3300000>;
574 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
575 vin-supply = <&sys_3v3_reg>;
578 vdd_vid_reg: regulator@12 {
579 compatible = "regulator-fixed";
581 regulator-name = "vddio_vid";
582 regulator-min-microvolt = <5000000>;
583 regulator-max-microvolt = <5000000>;
585 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
587 vin-supply = <&vdd_5v0_reg>;
592 compatible = "nvidia,tegra-audio-wm8903-cardhu",
593 "nvidia,tegra-audio-wm8903";
594 nvidia,model = "NVIDIA Tegra Cardhu";
596 nvidia,audio-routing =
597 "Headphone Jack", "HPOUTR",
598 "Headphone Jack", "HPOUTL",
603 "Mic Jack", "MICBIAS",
606 nvidia,i2s-controller = <&tegra_i2s1>;
607 nvidia,audio-codec = <&wm8903>;
609 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
610 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
613 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
614 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
615 <&tegra_car TEGRA30_CLK_EXTERN1>;
616 clock-names = "pll_a", "pll_a_out0", "mclk";