1 #include "tegra30.dtsi"
4 * This file contains common DT entry for all fab version of Cardhu.
5 * There is multiple fab version of Cardhu starting from A01 to A07.
6 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
7 * A02 will have different sets of GPIOs for fixed regulator compare to
8 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
9 * compatible with fab version A04. Based on Cardhu fab version, the
10 * related dts file need to be chosen like for Cardhu fab version A02,
11 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
12 * tegra30-cardhu-a04.dts.
13 * The identification of board is done in two ways, by looking the sticker
14 * on PCB and by reading board id eeprom.
15 * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
16 * number is the fab version like here it is 002 and hence fab version A02.
17 * The (downstream internal) U-Boot of Cardhu display the board-id as
19 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
20 * In this Fab version is 02 i.e. A02.
21 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
22 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
27 model = "NVIDIA Tegra30 Cardhu evaluation board";
28 compatible = "nvidia,cardhu", "nvidia,tegra30";
31 reg = <0x80000000 0x40000000>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&state_default>;
38 state_default: pinmux {
40 nvidia,pins = "sdmmc1_clk_pz0";
41 nvidia,function = "sdmmc1";
43 nvidia,tristate = <0>;
46 nvidia,pins = "sdmmc1_cmd_pz1",
51 nvidia,function = "sdmmc1";
53 nvidia,tristate = <0>;
56 nvidia,pins = "sdmmc3_clk_pa6";
57 nvidia,function = "sdmmc3";
59 nvidia,tristate = <0>;
62 nvidia,pins = "sdmmc3_cmd_pa7",
67 nvidia,function = "sdmmc3";
69 nvidia,tristate = <0>;
72 nvidia,pins = "sdmmc4_clk_pcc4",
74 nvidia,function = "sdmmc4";
76 nvidia,tristate = <0>;
79 nvidia,pins = "sdmmc4_dat0_paa0",
87 nvidia,function = "sdmmc4";
89 nvidia,tristate = <0>;
92 nvidia,pins = "dap2_fs_pa2",
96 nvidia,function = "i2s1";
98 nvidia,tristate = <0>;
101 nvidia,pins = "drive_sdio3";
102 nvidia,high-speed-mode = <0>;
103 nvidia,schmitt = <0>;
104 nvidia,pull-down-strength = <46>;
105 nvidia,pull-up-strength = <42>;
106 nvidia,slew-rate-rising = <1>;
107 nvidia,slew-rate-falling = <1>;
110 nvidia,pins = "uart3_txd_pw6",
114 nvidia,function = "uartc";
116 nvidia,tristate = <0>;
126 compatible = "nvidia,tegra30-hsuart";
132 clock-frequency = <100000>;
137 clock-frequency = <100000>;
142 clock-frequency = <100000>;
144 /* ALS and Proximity sensor */
146 compatible = "isil,isl29028";
148 interrupt-parent = <&gpio>;
149 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
155 clock-frequency = <100000>;
160 clock-frequency = <100000>;
163 compatible = "wlf,wm8903";
165 interrupt-parent = <&gpio>;
166 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
172 micdet-delay = <100>;
173 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
177 compatible = "ti,tps62361";
180 regulator-name = "tps62361-vout";
181 regulator-min-microvolt = <500000>;
182 regulator-max-microvolt = <1500000>;
190 compatible = "ti,tps65911";
193 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
194 #interrupt-cells = <2>;
195 interrupt-controller;
197 ti,system-power-controller;
202 vcc1-supply = <&vdd_ac_bat_reg>;
203 vcc2-supply = <&vdd_ac_bat_reg>;
204 vcc3-supply = <&vio_reg>;
205 vcc4-supply = <&vdd_5v0_reg>;
206 vcc5-supply = <&vdd_ac_bat_reg>;
207 vcc6-supply = <&vdd2_reg>;
208 vcc7-supply = <&vdd_ac_bat_reg>;
209 vccio-supply = <&vdd_ac_bat_reg>;
213 regulator-name = "vddio_ddr_1v2";
214 regulator-min-microvolt = <1200000>;
215 regulator-max-microvolt = <1200000>;
220 regulator-name = "vdd_1v5_gen";
221 regulator-min-microvolt = <1500000>;
222 regulator-max-microvolt = <1500000>;
226 vddctrl_reg: vddctrl {
227 regulator-name = "vdd_cpu,vdd_sys";
228 regulator-min-microvolt = <1000000>;
229 regulator-max-microvolt = <1000000>;
234 regulator-name = "vdd_1v8_gen";
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <1800000>;
241 regulator-name = "vdd_pexa,vdd_pexb";
242 regulator-min-microvolt = <1050000>;
243 regulator-max-microvolt = <1050000>;
247 regulator-name = "vdd_sata,avdd_plle";
248 regulator-min-microvolt = <1050000>;
249 regulator-max-microvolt = <1050000>;
252 /* LDO3 is not connected to anything */
255 regulator-name = "vdd_rtc";
256 regulator-min-microvolt = <1200000>;
257 regulator-max-microvolt = <1200000>;
262 regulator-name = "vddio_sdmmc,avdd_vdac";
263 regulator-min-microvolt = <3300000>;
264 regulator-max-microvolt = <3300000>;
269 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
270 regulator-min-microvolt = <1200000>;
271 regulator-max-microvolt = <1200000>;
275 regulator-name = "vdd_pllm,x,u,a_p_c_s";
276 regulator-min-microvolt = <1200000>;
277 regulator-max-microvolt = <1200000>;
282 regulator-name = "vdd_ddr_hs";
283 regulator-min-microvolt = <1000000>;
284 regulator-max-microvolt = <1000000>;
293 spi-max-frequency = <25000000>;
295 compatible = "winbond,w25q32";
297 spi-max-frequency = <20000000>;
309 nvidia,invert-interrupt;
310 nvidia,suspend-mode = <2>;
311 nvidia,cpu-pwr-good-time = <2000>;
312 nvidia,cpu-pwr-off-time = <200>;
313 nvidia,core-pwr-good-time = <3845 3845>;
314 nvidia,core-pwr-off-time = <0>;
315 nvidia,core-power-req-active-high;
316 nvidia,sys-clock-req-active-high;
321 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
322 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
323 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
334 compatible = "simple-bus";
335 #address-cells = <1>;
339 compatible = "fixed-clock";
342 clock-frequency = <32768>;
347 compatible = "simple-bus";
348 #address-cells = <1>;
351 vdd_ac_bat_reg: regulator@0 {
352 compatible = "regulator-fixed";
354 regulator-name = "vdd_ac_bat";
355 regulator-min-microvolt = <5000000>;
356 regulator-max-microvolt = <5000000>;
360 cam_1v8_reg: regulator@1 {
361 compatible = "regulator-fixed";
363 regulator-name = "cam_1v8";
364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvolt = <1800000>;
367 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
368 vin-supply = <&vio_reg>;
371 cp_5v_reg: regulator@2 {
372 compatible = "regulator-fixed";
374 regulator-name = "cp_5v";
375 regulator-min-microvolt = <5000000>;
376 regulator-max-microvolt = <5000000>;
380 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
383 emmc_3v3_reg: regulator@3 {
384 compatible = "regulator-fixed";
386 regulator-name = "emmc_3v3";
387 regulator-min-microvolt = <3300000>;
388 regulator-max-microvolt = <3300000>;
392 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
393 vin-supply = <&sys_3v3_reg>;
396 modem_3v3_reg: regulator@4 {
397 compatible = "regulator-fixed";
399 regulator-name = "modem_3v3";
400 regulator-min-microvolt = <3300000>;
401 regulator-max-microvolt = <3300000>;
403 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
406 pex_hvdd_3v3_reg: regulator@5 {
407 compatible = "regulator-fixed";
409 regulator-name = "pex_hvdd_3v3";
410 regulator-min-microvolt = <3300000>;
411 regulator-max-microvolt = <3300000>;
413 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
414 vin-supply = <&sys_3v3_reg>;
417 vdd_cam1_ldo_reg: regulator@6 {
418 compatible = "regulator-fixed";
420 regulator-name = "vdd_cam1_ldo";
421 regulator-min-microvolt = <2800000>;
422 regulator-max-microvolt = <2800000>;
424 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
425 vin-supply = <&sys_3v3_reg>;
428 vdd_cam2_ldo_reg: regulator@7 {
429 compatible = "regulator-fixed";
431 regulator-name = "vdd_cam2_ldo";
432 regulator-min-microvolt = <2800000>;
433 regulator-max-microvolt = <2800000>;
435 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
436 vin-supply = <&sys_3v3_reg>;
439 vdd_cam3_ldo_reg: regulator@8 {
440 compatible = "regulator-fixed";
442 regulator-name = "vdd_cam3_ldo";
443 regulator-min-microvolt = <3300000>;
444 regulator-max-microvolt = <3300000>;
446 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
447 vin-supply = <&sys_3v3_reg>;
450 vdd_com_reg: regulator@9 {
451 compatible = "regulator-fixed";
453 regulator-name = "vdd_com";
454 regulator-min-microvolt = <3300000>;
455 regulator-max-microvolt = <3300000>;
459 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
460 vin-supply = <&sys_3v3_reg>;
463 vdd_fuse_3v3_reg: regulator@10 {
464 compatible = "regulator-fixed";
466 regulator-name = "vdd_fuse_3v3";
467 regulator-min-microvolt = <3300000>;
468 regulator-max-microvolt = <3300000>;
470 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
471 vin-supply = <&sys_3v3_reg>;
474 vdd_pnl1_reg: regulator@11 {
475 compatible = "regulator-fixed";
477 regulator-name = "vdd_pnl1";
478 regulator-min-microvolt = <3300000>;
479 regulator-max-microvolt = <3300000>;
483 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
484 vin-supply = <&sys_3v3_reg>;
487 vdd_vid_reg: regulator@12 {
488 compatible = "regulator-fixed";
490 regulator-name = "vddio_vid";
491 regulator-min-microvolt = <5000000>;
492 regulator-max-microvolt = <5000000>;
494 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
496 vin-supply = <&vdd_5v0_reg>;
501 compatible = "nvidia,tegra-audio-wm8903-cardhu",
502 "nvidia,tegra-audio-wm8903";
503 nvidia,model = "NVIDIA Tegra Cardhu";
505 nvidia,audio-routing =
506 "Headphone Jack", "HPOUTR",
507 "Headphone Jack", "HPOUTL",
512 "Mic Jack", "MICBIAS",
515 nvidia,i2s-controller = <&tegra_i2s1>;
516 nvidia,audio-codec = <&wm8903>;
518 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
519 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
522 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
523 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
524 <&tegra_car TEGRA30_CLK_EXTERN1>;
525 clock-names = "pll_a", "pll_a_out0", "mclk";