arch/arm/boot/dts/tegra30-cardhu.dtsi

   1 /include/ "tegra30.dtsi"
   2
   3 /**
   4  * This file contains common DT entry for all fab version of Cardhu.
   5  * There is multiple fab version of Cardhu starting from A01 to A07.
   6  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
   7  * A02 will have different sets of GPIOs for fixed regulator compare to
   8  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
   9  * compatible with fab version A04. Based on Cardhu fab version, the
  10  * related dts file need to be chosen like for Cardhu fab version A02,
  11  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
  12  * tegra30-cardhu-a04.dts.
  13  * The identification of board is done in two ways, by looking the sticker
  14  * on PCB and by reading board id eeprom.
  15  * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
  16  * number is the fab version like here it is 002 and hence fab version A02.
  17  * The (downstream internal) U-Boot of Cardhu display the board-id as
  18  * follows:
  19  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
  20  * In this Fab version is 02 i.e. A02.
  21  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
  22  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
  23  * wide.
  24  */
  25
  26 / {
  27         model = "NVIDIA Tegra30 Cardhu evaluation board";
  28         compatible = "nvidia,cardhu", "nvidia,tegra30";
  29
  30         memory {
  31                 reg = <0x80000000 0x40000000>;
  32         };
  33
  34         pinmux {
  35                 pinctrl-names = "default";
  36                 pinctrl-0 = <&state_default>;
  37
  38                 state_default: pinmux {
  39                         sdmmc1_clk_pz0 {
  40                                 nvidia,pins = "sdmmc1_clk_pz0";
  41                                 nvidia,function = "sdmmc1";
  42                                 nvidia,pull = <0>;
  43                                 nvidia,tristate = <0>;
  44                         };
  45                         sdmmc1_cmd_pz1 {
  46                                 nvidia,pins =   "sdmmc1_cmd_pz1",
  47                                                 "sdmmc1_dat0_py7",
  48                                                 "sdmmc1_dat1_py6",
  49                                                 "sdmmc1_dat2_py5",
  50                                                 "sdmmc1_dat3_py4";
  51                                 nvidia,function = "sdmmc1";
  52                                 nvidia,pull = <2>;
  53                                 nvidia,tristate = <0>;
  54                         };
  55                         sdmmc3_clk_pa6 {
  56                                 nvidia,pins = "sdmmc3_clk_pa6";
  57                                 nvidia,function = "sdmmc3";
  58                                 nvidia,pull = <0>;
  59                                 nvidia,tristate = <0>;
  60                         };
  61                         sdmmc3_cmd_pa7 {
  62                                 nvidia,pins =   "sdmmc3_cmd_pa7",
  63                                                 "sdmmc3_dat0_pb7",
  64                                                 "sdmmc3_dat1_pb6",
  65                                                 "sdmmc3_dat2_pb5",
  66                                                 "sdmmc3_dat3_pb4";
  67                                 nvidia,function = "sdmmc3";
  68                                 nvidia,pull = <2>;
  69                                 nvidia,tristate = <0>;
  70                         };
  71                         sdmmc4_clk_pcc4 {
  72                                 nvidia,pins =   "sdmmc4_clk_pcc4",
  73                                                 "sdmmc4_rst_n_pcc3";
  74                                 nvidia,function = "sdmmc4";
  75                                 nvidia,pull = <0>;
  76                                 nvidia,tristate = <0>;
  77                         };
  78                         sdmmc4_dat0_paa0 {
  79                                 nvidia,pins =   "sdmmc4_dat0_paa0",
  80                                                 "sdmmc4_dat1_paa1",
  81                                                 "sdmmc4_dat2_paa2",
  82                                                 "sdmmc4_dat3_paa3",
  83                                                 "sdmmc4_dat4_paa4",
  84                                                 "sdmmc4_dat5_paa5",
  85                                                 "sdmmc4_dat6_paa6",
  86                                                 "sdmmc4_dat7_paa7";
  87                                 nvidia,function = "sdmmc4";
  88                                 nvidia,pull = <2>;
  89                                 nvidia,tristate = <0>;
  90                         };
  91                         dap2_fs_pa2 {
  92                                 nvidia,pins =   "dap2_fs_pa2",
  93                                                 "dap2_sclk_pa3",
  94                                                 "dap2_din_pa4",
  95                                                 "dap2_dout_pa5";
  96                                 nvidia,function = "i2s1";
  97                                 nvidia,pull = <0>;
  98                                 nvidia,tristate = <0>;
  99                         };
 100                         sdio3 {
 101                                 nvidia,pins = "drive_sdio3";
 102                                 nvidia,high-speed-mode = <0>;
 103                                 nvidia,schmitt = <0>;
 104                                 nvidia,pull-down-strength = <46>;
 105                                 nvidia,pull-up-strength = <42>;
 106                                 nvidia,slew-rate-rising = <1>;
 107                                 nvidia,slew-rate-falling = <1>;
 108                         };
 109                         uart3_txd_pw6 {
 110                                 nvidia,pins =   "uart3_txd_pw6",
 111                                                 "uart3_cts_n_pa1",
 112                                                 "uart3_rts_n_pc0",
 113                                                 "uart3_rxd_pw7";
 114                                 nvidia,function = "uartc";
 115                                 nvidia,pull = <0>;
 116                                 nvidia,tristate = <0>;
 117                         };
 118                 };
 119         };
 120
 121         serial@70006000 {
 122                 status = "okay";
 123         };
 124
 125         serial@70006200 {
 126                 compatible = "nvidia,tegra30-hsuart";
 127                 status = "okay";
 128         };
 129
 130         i2c@7000c000 {
 131                 status = "okay";
 132                 clock-frequency = <100000>;
 133         };
 134
 135         i2c@7000c400 {
 136                 status = "okay";
 137                 clock-frequency = <100000>;
 138         };
 139
 140         i2c@7000c500 {
 141                 status = "okay";
 142                 clock-frequency = <100000>;
 143
 144                 /* ALS and Proximity sensor */
 145                 isl29028@44 {
 146                         compatible = "isil,isl29028";
 147                         reg = <0x44>;
 148                         interrupt-parent = <&gpio>;
 149                         interrupts = <88 0x04>; /*gpio PL0 */
 150                 };
 151         };
 152
 153         i2c@7000c700 {
 154                 status = "okay";
 155                 clock-frequency = <100000>;
 156         };
 157
 158         i2c@7000d000 {
 159                 status = "okay";
 160                 clock-frequency = <100000>;
 161
 162                 wm8903: wm8903@1a {
 163                         compatible = "wlf,wm8903";
 164                         reg = <0x1a>;
 165                         interrupt-parent = <&gpio>;
 166                         interrupts = <179 0x04>; /* gpio PW3 */
 167
 168                         gpio-controller;
 169                         #gpio-cells = <2>;
 170
 171                         micdet-cfg = <0>;
 172                         micdet-delay = <100>;
 173                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 174                 };
 175
 176                 tps62361 {
 177                         compatible = "ti,tps62361";
 178                         reg = <0x60>;
 179
 180                         regulator-name = "tps62361-vout";
 181                         regulator-min-microvolt = <500000>;
 182                         regulator-max-microvolt = <1500000>;
 183                         regulator-boot-on;
 184                         regulator-always-on;
 185                         ti,vsel0-state-high;
 186                         ti,vsel1-state-high;
 187                 };
 188
 189                 pmic: tps65911@2d {
 190                         compatible = "ti,tps65911";
 191                         reg = <0x2d>;
 192
 193                         interrupts = <0 86 0x4>;
 194                         #interrupt-cells = <2>;
 195                         interrupt-controller;
 196
 197                         ti,system-power-controller;
 198
 199                         #gpio-cells = <2>;
 200                         gpio-controller;
 201
 202                         vcc1-supply = <&vdd_ac_bat_reg>;
 203                         vcc2-supply = <&vdd_ac_bat_reg>;
 204                         vcc3-supply = <&vio_reg>;
 205                         vcc4-supply = <&vdd_5v0_reg>;
 206                         vcc5-supply = <&vdd_ac_bat_reg>;
 207                         vcc6-supply = <&vdd2_reg>;
 208                         vcc7-supply = <&vdd_ac_bat_reg>;
 209                         vccio-supply = <&vdd_ac_bat_reg>;
 210
 211                         regulators {
 212                                 vdd1_reg: vdd1 {
 213                                         regulator-name = "vddio_ddr_1v2";
 214                                         regulator-min-microvolt = <1200000>;
 215                                         regulator-max-microvolt = <1200000>;
 216                                         regulator-always-on;
 217                                 };
 218
 219                                 vdd2_reg: vdd2 {
 220                                         regulator-name = "vdd_1v5_gen";
 221                                         regulator-min-microvolt = <1500000>;
 222                                         regulator-max-microvolt = <1500000>;
 223                                         regulator-always-on;
 224                                 };
 225
 226                                 vddctrl_reg: vddctrl {
 227                                         regulator-name = "vdd_cpu,vdd_sys";
 228                                         regulator-min-microvolt = <1000000>;
 229                                         regulator-max-microvolt = <1000000>;
 230                                         regulator-always-on;
 231                                 };
 232
 233                                 vio_reg: vio {
 234                                         regulator-name = "vdd_1v8_gen";
 235                                         regulator-min-microvolt = <1800000>;
 236                                         regulator-max-microvolt = <1800000>;
 237                                         regulator-always-on;
 238                                 };
 239
 240                                 ldo1_reg: ldo1 {
 241                                         regulator-name = "vdd_pexa,vdd_pexb";
 242                                         regulator-min-microvolt = <1050000>;
 243                                         regulator-max-microvolt = <1050000>;
 244                                 };
 245
 246                                 ldo2_reg: ldo2 {
 247                                         regulator-name = "vdd_sata,avdd_plle";
 248                                         regulator-min-microvolt = <1050000>;
 249                                         regulator-max-microvolt = <1050000>;
 250                                 };
 251
 252                                 /* LDO3 is not connected to anything */
 253
 254                                 ldo4_reg: ldo4 {
 255                                         regulator-name = "vdd_rtc";
 256                                         regulator-min-microvolt = <1200000>;
 257                                         regulator-max-microvolt = <1200000>;
 258                                         regulator-always-on;
 259                                 };
 260
 261                                 ldo5_reg: ldo5 {
 262                                         regulator-name = "vddio_sdmmc,avdd_vdac";
 263                                         regulator-min-microvolt = <3300000>;
 264                                         regulator-max-microvolt = <3300000>;
 265                                         regulator-always-on;
 266                                 };
 267
 268                                 ldo6_reg: ldo6 {
 269                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
 270                                         regulator-min-microvolt = <1200000>;
 271                                         regulator-max-microvolt = <1200000>;
 272                                 };
 273
 274                                 ldo7_reg: ldo7 {
 275                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
 276                                         regulator-min-microvolt = <1200000>;
 277                                         regulator-max-microvolt = <1200000>;
 278                                         regulator-always-on;
 279                                 };
 280
 281                                 ldo8_reg: ldo8 {
 282                                         regulator-name = "vdd_ddr_hs";
 283                                         regulator-min-microvolt = <1000000>;
 284                                         regulator-max-microvolt = <1000000>;
 285                                         regulator-always-on;
 286                                 };
 287                         };
 288                 };
 289         };
 290
 291         spi@7000da00 {
 292                 status = "okay";
 293                 spi-max-frequency = <25000000>;
 294                 spi-flash@1 {
 295                         compatible = "winbond,w25q32";
 296                         reg = <1>;
 297                         spi-max-frequency = <20000000>;
 298                 };
 299         };
 300
 301         ahub {
 302                 i2s@70080400 {
 303                         status = "okay";
 304                 };
 305         };
 306
 307         pmc {
 308                 status = "okay";
 309                 nvidia,invert-interrupt;
 310         };
 311
 312         sdhci@78000000 {
 313                 status = "okay";
 314                 cd-gpios = <&gpio 69 1>; /* gpio PI5 */
 315                 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
 316                 power-gpios = <&gpio 31 0>; /* gpio PD7 */
 317                 bus-width = <4>;
 318         };
 319
 320         sdhci@78000600 {
 321                 status = "okay";
 322                 bus-width = <8>;
 323         };
 324
 325         clocks {
 326                 compatible = "simple-bus";
 327                 #address-cells = <1>;
 328                 #size-cells = <0>;
 329
 330                 clk32k_in: clock {
 331                         compatible = "fixed-clock";
 332                         reg=<0>;
 333                         #clock-cells = <0>;
 334                         clock-frequency = <32768>;
 335                 };
 336         };
 337
 338         regulators {
 339                 compatible = "simple-bus";
 340                 #address-cells = <1>;
 341                 #size-cells = <0>;
 342
 343                 vdd_ac_bat_reg: regulator@0 {
 344                         compatible = "regulator-fixed";
 345                         reg = <0>;
 346                         regulator-name = "vdd_ac_bat";
 347                         regulator-min-microvolt = <5000000>;
 348                         regulator-max-microvolt = <5000000>;
 349                         regulator-always-on;
 350                 };
 351
 352                 cam_1v8_reg: regulator@1 {
 353                         compatible = "regulator-fixed";
 354                         reg = <1>;
 355                         regulator-name = "cam_1v8";
 356                         regulator-min-microvolt = <1800000>;
 357                         regulator-max-microvolt = <1800000>;
 358                         enable-active-high;
 359                         gpio = <&gpio 220 0>; /* gpio PBB4 */
 360                         vin-supply = <&vio_reg>;
 361                 };
 362
 363                 cp_5v_reg: regulator@2 {
 364                         compatible = "regulator-fixed";
 365                         reg = <2>;
 366                         regulator-name = "cp_5v";
 367                         regulator-min-microvolt = <5000000>;
 368                         regulator-max-microvolt = <5000000>;
 369                         regulator-boot-on;
 370                         regulator-always-on;
 371                         enable-active-high;
 372                         gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
 373                 };
 374
 375                 emmc_3v3_reg: regulator@3 {
 376                         compatible = "regulator-fixed";
 377                         reg = <3>;
 378                         regulator-name = "emmc_3v3";
 379                         regulator-min-microvolt = <3300000>;
 380                         regulator-max-microvolt = <3300000>;
 381                         regulator-always-on;
 382                         regulator-boot-on;
 383                         enable-active-high;
 384                         gpio = <&gpio 25 0>; /* gpio PD1 */
 385                         vin-supply = <&sys_3v3_reg>;
 386                 };
 387
 388                 modem_3v3_reg: regulator@4 {
 389                         compatible = "regulator-fixed";
 390                         reg = <4>;
 391                         regulator-name = "modem_3v3";
 392                         regulator-min-microvolt = <3300000>;
 393                         regulator-max-microvolt = <3300000>;
 394                         enable-active-high;
 395                         gpio = <&gpio 30 0>; /* gpio PD6 */
 396                 };
 397
 398                 pex_hvdd_3v3_reg: regulator@5 {
 399                         compatible = "regulator-fixed";
 400                         reg = <5>;
 401                         regulator-name = "pex_hvdd_3v3";
 402                         regulator-min-microvolt = <3300000>;
 403                         regulator-max-microvolt = <3300000>;
 404                         enable-active-high;
 405                         gpio = <&gpio 95 0>; /* gpio PL7 */
 406                         vin-supply = <&sys_3v3_reg>;
 407                 };
 408
 409                 vdd_cam1_ldo_reg: regulator@6 {
 410                         compatible = "regulator-fixed";
 411                         reg = <6>;
 412                         regulator-name = "vdd_cam1_ldo";
 413                         regulator-min-microvolt = <2800000>;
 414                         regulator-max-microvolt = <2800000>;
 415                         enable-active-high;
 416                         gpio = <&gpio 142 0>; /* gpio PR6 */
 417                         vin-supply = <&sys_3v3_reg>;
 418                 };
 419
 420                 vdd_cam2_ldo_reg: regulator@7 {
 421                         compatible = "regulator-fixed";
 422                         reg = <7>;
 423                         regulator-name = "vdd_cam2_ldo";
 424                         regulator-min-microvolt = <2800000>;
 425                         regulator-max-microvolt = <2800000>;
 426                         enable-active-high;
 427                         gpio = <&gpio 143 0>; /* gpio PR7 */
 428                         vin-supply = <&sys_3v3_reg>;
 429                 };
 430
 431                 vdd_cam3_ldo_reg: regulator@8 {
 432                         compatible = "regulator-fixed";
 433                         reg = <8>;
 434                         regulator-name = "vdd_cam3_ldo";
 435                         regulator-min-microvolt = <3300000>;
 436                         regulator-max-microvolt = <3300000>;
 437                         enable-active-high;
 438                         gpio = <&gpio 144 0>; /* gpio PS0 */
 439                         vin-supply = <&sys_3v3_reg>;
 440                 };
 441
 442                 vdd_com_reg: regulator@9 {
 443                         compatible = "regulator-fixed";
 444                         reg = <9>;
 445                         regulator-name = "vdd_com";
 446                         regulator-min-microvolt = <3300000>;
 447                         regulator-max-microvolt = <3300000>;
 448                         regulator-always-on;
 449                         regulator-boot-on;
 450                         enable-active-high;
 451                         gpio = <&gpio 24 0>; /* gpio PD0 */
 452                         vin-supply = <&sys_3v3_reg>;
 453                 };
 454
 455                 vdd_fuse_3v3_reg: regulator@10 {
 456                         compatible = "regulator-fixed";
 457                         reg = <10>;
 458                         regulator-name = "vdd_fuse_3v3";
 459                         regulator-min-microvolt = <3300000>;
 460                         regulator-max-microvolt = <3300000>;
 461                         enable-active-high;
 462                         gpio = <&gpio 94 0>; /* gpio PL6 */
 463                         vin-supply = <&sys_3v3_reg>;
 464                 };
 465
 466                 vdd_pnl1_reg: regulator@11 {
 467                         compatible = "regulator-fixed";
 468                         reg = <11>;
 469                         regulator-name = "vdd_pnl1";
 470                         regulator-min-microvolt = <3300000>;
 471                         regulator-max-microvolt = <3300000>;
 472                         regulator-always-on;
 473                         regulator-boot-on;
 474                         enable-active-high;
 475                         gpio = <&gpio 92 0>; /* gpio PL4 */
 476                         vin-supply = <&sys_3v3_reg>;
 477                 };
 478
 479                 vdd_vid_reg: regulator@12 {
 480                         compatible = "regulator-fixed";
 481                         reg = <12>;
 482                         regulator-name = "vddio_vid";
 483                         regulator-min-microvolt = <5000000>;
 484                         regulator-max-microvolt = <5000000>;
 485                         enable-active-high;
 486                         gpio = <&gpio 152 0>; /* GPIO PT0 */
 487                         gpio-open-drain;
 488                         vin-supply = <&vdd_5v0_reg>;
 489                 };
 490         };
 491
 492         sound {
 493                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
 494                              "nvidia,tegra-audio-wm8903";
 495                 nvidia,model = "NVIDIA Tegra Cardhu";
 496
 497                 nvidia,audio-routing =
 498                         "Headphone Jack", "HPOUTR",
 499                         "Headphone Jack", "HPOUTL",
 500                         "Int Spk", "ROP",
 501                         "Int Spk", "RON",
 502                         "Int Spk", "LOP",
 503                         "Int Spk", "LON",
 504                         "Mic Jack", "MICBIAS",
 505                         "IN1L", "Mic Jack";
 506
 507                 nvidia,i2s-controller = <&tegra_i2s1>;
 508                 nvidia,audio-codec = <&wm8903>;
 509
 510                 nvidia,spkr-en-gpios = <&wm8903 2 0>;
 511                 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
 512         };
 513 };