1 #include <dt-bindings/input/input.h>
2 #include "tegra30.dtsi"
5 * Toradex Colibri T30 Module Device Tree
6 * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E; IT: V1.1A
9 model = "Toradex Colibri T30";
10 compatible = "toradex,colibri_t30", "nvidia,tegra30";
13 reg = <0x80000000 0x40000000>;
18 vdd-supply = <&avdd_hdmi_3v3_reg>;
19 pll-supply = <&avdd_hdmi_pll_1v8_reg>;
22 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
23 nvidia,ddc-i2c-bus = <&hdmiddc>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&state_default>;
31 state_default: pinmux {
35 nvidia,function = "rsvd4";
36 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
37 nvidia,tristate = <TEGRA_PIN_DISABLE>;
40 /* Colibri Backlight PWM<A> */
42 nvidia,pins = "sdmmc3_dat3_pb4";
43 nvidia,function = "pwm0";
44 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
45 nvidia,tristate = <TEGRA_PIN_DISABLE>;
50 nvidia,pins = "kb_row8_ps0";
51 nvidia,function = "kbc";
52 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
53 nvidia,tristate = <TEGRA_PIN_DISABLE>;
54 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
58 * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
59 * todays display need DE, disable LCD_M1
62 nvidia,pins = "lcd_m1_pw1";
63 nvidia,function = "rsvd3";
64 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
65 nvidia,tristate = <TEGRA_PIN_DISABLE>;
66 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
71 nvidia,pins = "kb_row10_ps2";
72 nvidia,function = "sdmmc2";
73 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74 nvidia,tristate = <TEGRA_PIN_DISABLE>;
77 nvidia,pins = "kb_row11_ps3",
82 nvidia,function = "sdmmc2";
83 nvidia,pull = <TEGRA_PIN_PULL_UP>;
84 nvidia,tristate = <TEGRA_PIN_DISABLE>;
89 nvidia,pins = "ulpi_clk_py0",
93 nvidia,function = "spi1";
94 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
95 nvidia,tristate = <TEGRA_PIN_DISABLE>;
98 nvidia,pins = "sdmmc3_dat6_pd3",
100 nvidia,function = "spdif";
101 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102 nvidia,tristate = <TEGRA_PIN_ENABLE>;
107 nvidia,pins = "ulpi_data0_po1",
115 nvidia,function = "uarta";
116 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
122 nvidia,pins = "gmi_a16_pj7",
126 nvidia,function = "uartd";
127 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133 nvidia,pins = "uart2_rxd_pc3",
135 nvidia,function = "uartb";
136 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
142 nvidia,pins = "sdmmc4_clk_pcc4",
144 nvidia,function = "sdmmc4";
145 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149 nvidia,pins = "sdmmc4_dat0_paa0",
157 nvidia,function = "sdmmc4";
158 nvidia,pull = <TEGRA_PIN_PULL_UP>;
159 nvidia,tristate = <TEGRA_PIN_DISABLE>;
162 /* Power I2C (On-module) */
164 nvidia,pins = "pwr_i2c_scl_pz6",
166 nvidia,function = "i2cpwr";
167 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
170 nvidia,lock = <TEGRA_PIN_DISABLE>;
171 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
175 * THERMD_ALERT#, unlatched I2C address pin of LM95245
176 * temperature sensor therefore requires disabling for
180 nvidia,pins = "lcd_dc1_pd2";
181 nvidia,function = "rsvd3";
182 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
183 nvidia,tristate = <TEGRA_PIN_DISABLE>;
184 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
189 hdmiddc: i2c@7000c700 {
190 clock-frequency = <100000>;
194 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
195 * touch screen controller
199 clock-frequency = <100000>;
202 compatible = "ti,tps65911";
205 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
206 #interrupt-cells = <2>;
207 interrupt-controller;
209 ti,system-power-controller;
214 vcc1-supply = <&sys_3v3_reg>;
215 vcc2-supply = <&sys_3v3_reg>;
216 vcc3-supply = <&vio_reg>;
217 vcc4-supply = <&sys_3v3_reg>;
218 vcc5-supply = <&sys_3v3_reg>;
219 vcc6-supply = <&vio_reg>;
220 vcc7-supply = <&charge_pump_5v0_reg>;
221 vccio-supply = <&sys_3v3_reg>;
224 /* SW1: +V1.35_VDDIO_DDR */
226 regulator-name = "vddio_ddr_1v35";
227 regulator-min-microvolt = <1350000>;
228 regulator-max-microvolt = <1350000>;
234 /* SW CTRL: +V1.0_VDD_CPU */
235 vddctrl_reg: vddctrl {
236 regulator-name = "vdd_cpu,vdd_sys";
237 regulator-min-microvolt = <1150000>;
238 regulator-max-microvolt = <1150000>;
244 regulator-name = "vdd_1v8_gen";
245 regulator-min-microvolt = <1800000>;
246 regulator-max-microvolt = <1800000>;
253 * EN_+V3.3 switching via FET:
254 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
255 * see also 3v3 fixed supply
258 regulator-name = "en_3v3";
259 regulator-min-microvolt = <3300000>;
260 regulator-max-microvolt = <3300000>;
268 regulator-name = "vdd_rtc";
269 regulator-min-microvolt = <1200000>;
270 regulator-max-microvolt = <1200000>;
276 * only required for analog RGB
279 regulator-name = "avdd_vdac";
280 regulator-min-microvolt = <2800000>;
281 regulator-max-microvolt = <2800000>;
286 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
287 * but LDO6 can't set voltage in 50mV
291 regulator-name = "avdd_plle";
292 regulator-min-microvolt = <1100000>;
293 regulator-max-microvolt = <1100000>;
298 regulator-name = "avdd_pll";
299 regulator-min-microvolt = <1200000>;
300 regulator-max-microvolt = <1200000>;
304 /* +V1.0_VDD_DDR_HS */
306 regulator-name = "vdd_ddr_hs";
307 regulator-min-microvolt = <1000000>;
308 regulator-max-microvolt = <1000000>;
315 * LM95245 temperature sensor
316 * Note: OVERT_N directly connected to PMIC PWRDN
319 compatible = "national,lm95245";
323 /* SW: +V1.2_VDD_CORE */
325 compatible = "ti,tps62362";
328 regulator-name = "tps62362-vout";
329 regulator-min-microvolt = <900000>;
330 regulator-max-microvolt = <1400000>;
334 /* VSEL1: EN_CORE_DVFS_N low for DVFS */
340 nvidia,invert-interrupt;
341 nvidia,suspend-mode = <1>;
342 nvidia,cpu-pwr-good-time = <5000>;
343 nvidia,cpu-pwr-off-time = <5000>;
344 nvidia,core-pwr-good-time = <3845 3845>;
345 nvidia,core-pwr-off-time = <0>;
346 nvidia,core-power-req-active-high;
347 nvidia,sys-clock-req-active-high;
350 emmc: sdhci@78000600 {
356 /* EHCI instance 1: USB2_DP/N -> AX88772B */
363 nvidia,is-wired = <1>;
367 compatible = "simple-bus";
368 #address-cells = <1>;
372 compatible = "fixed-clock";
375 clock-frequency = <32768>;
380 compatible = "simple-bus";
381 #address-cells = <1>;
384 avdd_hdmi_pll_1v8_reg: regulator@100 {
385 compatible = "regulator-fixed";
387 regulator-name = "+V1.8_AVDD_HDMI_PLL";
388 regulator-min-microvolt = <1800000>;
389 regulator-max-microvolt = <1800000>;
391 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
392 vin-supply = <&vio_reg>;
395 sys_3v3_reg: regulator@101 {
396 compatible = "regulator-fixed";
398 regulator-name = "3v3";
399 regulator-min-microvolt = <3300000>;
400 regulator-max-microvolt = <3300000>;
404 avdd_hdmi_3v3_reg: regulator@102 {
405 compatible = "regulator-fixed";
407 regulator-name = "+V3.3_AVDD_HDMI";
408 regulator-min-microvolt = <3300000>;
409 regulator-max-microvolt = <3300000>;
411 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
412 vin-supply = <&sys_3v3_reg>;
415 charge_pump_5v0_reg: regulator@103 {
416 compatible = "regulator-fixed";
418 regulator-name = "5v0";
419 regulator-min-microvolt = <5000000>;
420 regulator-max-microvolt = <5000000>;