2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
14 model = "VF610 Tower Board";
15 compatible = "fsl,vf610-twr", "fsl,vf610";
18 bootargs = "console=ttyLP1,115200";
22 reg = <0x80000000 0x8000000>;
26 compatible = "fixed-clock";
28 clock-frequency = <24576000>;
32 compatible = "fixed-clock";
34 clock-frequency = <50000000>;
38 compatible = "simple-bus";
42 reg_3p3v: regulator@0 {
43 compatible = "regulator-fixed";
45 regulator-name = "3P3V";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
51 reg_vcc_3v3_mcu: regulator@1 {
52 compatible = "regulator-fixed";
54 regulator-name = "vcc_3v3_mcu";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
61 compatible = "simple-audio-card";
62 simple-audio-card,format = "i2s";
63 simple-audio-card,widgets =
64 "Microphone", "Microphone Jack",
65 "Headphone", "Headphone Jack",
66 "Speaker", "Speaker Ext",
67 "Line", "Line In Jack";
68 simple-audio-card,routing =
69 "MIC_IN", "Microphone Jack",
70 "Microphone Jack", "Mic Bias",
71 "LINE_IN", "Line In Jack",
72 "Headphone Jack", "HP_OUT",
73 "Speaker Ext", "LINE_OUT";
75 simple-audio-card,cpu {
81 simple-audio-card,codec {
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_adc0_ad5>;
92 vref-supply = <®_vcc_3v3_mcu>;
97 clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
98 clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_dspi0>;
107 sflash: at26df081a@0 {
108 #address-cells = <1>;
110 compatible = "atmel,at26df081a";
111 spi-max-frequency = <16000000>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_esdhc1>;
126 cd-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_fec0>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_fec1>;
145 clock-frequency = <100000>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_i2c0>;
151 #sound-dai-cells = <0>;
152 compatible = "fsl,sgtl5000";
154 VDDA-supply = <®_3p3v>;
155 VDDIO-supply = <®_3p3v>;
156 clocks = <&clks VF610_CLK_SAI2>;
162 pinctrl_adc0_ad5: adc0ad5grp {
164 VF610_PAD_PTC30__ADC0_SE5 0xa1
168 pinctrl_dspi0: dspi0grp {
170 VF610_PAD_PTB19__DSPI0_CS0 0x1182
171 VF610_PAD_PTB20__DSPI0_SIN 0x1181
172 VF610_PAD_PTB21__DSPI0_SOUT 0x1182
173 VF610_PAD_PTB22__DSPI0_SCK 0x1182
177 pinctrl_esdhc1: esdhc1grp {
179 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
180 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
181 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
182 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
183 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
184 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
185 VF610_PAD_PTA7__GPIO_134 0x219d
189 pinctrl_fec0: fec0grp {
191 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
192 VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
193 VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
194 VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
195 VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
196 VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
197 VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
198 VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
199 VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
200 VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
204 pinctrl_fec1: fec1grp {
206 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
207 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
208 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
209 VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
210 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
211 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
212 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
213 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
214 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
218 pinctrl_i2c0: i2c0grp {
220 VF610_PAD_PTB14__I2C0_SCL 0x30d3
221 VF610_PAD_PTB15__I2C0_SDA 0x30d3
225 pinctrl_pwm0: pwm0grp {
227 VF610_PAD_PTB0__FTM0_CH0 0x1582
228 VF610_PAD_PTB1__FTM0_CH1 0x1582
229 VF610_PAD_PTB2__FTM0_CH2 0x1582
230 VF610_PAD_PTB3__FTM0_CH3 0x1582
234 pinctrl_sai2: sai2grp {
236 VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
237 VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
238 VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
239 VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
240 VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
241 VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
242 VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
246 pinctrl_uart1: uart1grp {
248 VF610_PAD_PTB4__UART1_TX 0x21a2
249 VF610_PAD_PTB5__UART1_RX 0x21a1
253 pinctrl_uart2: uart2grp {
255 VF610_PAD_PTB6__UART2_TX 0x21a2
256 VF610_PAD_PTB7__UART2_RX 0x21a1
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_pwm0>;
269 #sound-dai-cells = <0>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_sai2>;
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_uart1>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_uart2>;
288 disable-over-current;
293 disable-over-current;